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636 giacomo 1
/*
2
 * PCI defines and function prototypes
3
 * Copyright 1994, Drew Eckhardt
4
 *
5
 * For more information, please consult
6
 *
7
 * PCI BIOS Specification Revision
8
 * PCI Local Bus Specification
9
 * PCI System Design Guide
10
 *
11
 * PCI Special Interest Group
12
 * M/S HF3-15A
13
 * 5200 N.E. Elam Young Parkway
14
 * Hillsboro, Oregon 97124-6497
15
 * +1 (503) 696-2000
16
 * +1 (800) 433-5177
17
 *
18
 * Manuals are $25 each or $50 for all three, plus $7 shipping
19
 * within the United States, $35 abroad.
20
 */
21
 
22
 
23
 
24
/*      PROCEDURE TO REPORT NEW PCI DEVICES
25
 * We are trying to collect information on new PCI devices, using
26
 * the standard PCI identification procedure. If some warning is
27
 * displayed at boot time, please report
28
 *      - /proc/pci
29
 *      - your exact hardware description. Try to find out
30
 *        which device is unknown. It may be you mainboard chipset.
31
 *        PCI-CPU bridge or PCI-ISA bridge.
32
 *      - If you can't find the actual information in your hardware
33
 *        booklet, try to read the references of the chip on the board.
34
 *      - Send all that to linux-pcisupport@cck.uni-kl.de
35
 *        and I'll add your device to the list as soon as possible
36
 *
37
 * BEFORE you send a mail, please check the latest linux releases
38
 * to be sure it has not been recently added.
39
 *
40
 *        Thanks
41
 *              Jens Maurer
42
 */
43
 
44
 
45
 
46
#ifndef LINUX_PCI_H
47
#define LINUX_PCI_H
48
 
49
/*
50
 * Under PCI, each device has 256 bytes of configuration address space,
51
 * of which the first 64 bytes are standardized as follows:
52
 */
53
#define PCI_VENDOR_ID           0x00    /* 16 bits */
54
#define PCI_DEVICE_ID           0x02    /* 16 bits */
55
#define PCI_COMMAND             0x04    /* 16 bits */
56
#define  PCI_COMMAND_IO         0x1     /* Enable response in I/O space */
57
#define  PCI_COMMAND_MEMORY     0x2     /* Enable response in Memory space */
58
#define  PCI_COMMAND_MASTER     0x4     /* Enable bus mastering */
59
#define  PCI_COMMAND_SPECIAL    0x8     /* Enable response to special cycles */
60
#define  PCI_COMMAND_INVALIDATE 0x10    /* Use memory write and invalidate */
61
#define  PCI_COMMAND_VGA_PALETTE 0x20   /* Enable palette snooping */
62
#define  PCI_COMMAND_PARITY     0x40    /* Enable parity checking */
63
#define  PCI_COMMAND_WAIT       0x80    /* Enable address/data stepping */
64
#define  PCI_COMMAND_SERR       0x100   /* Enable SERR */
65
#define  PCI_COMMAND_FAST_BACK  0x200   /* Enable back-to-back writes */
66
 
67
#define PCI_STATUS              0x06    /* 16 bits */
68
#define  PCI_STATUS_66MHZ       0x20    /* Support 66 Mhz PCI 2.1 bus */
69
#define  PCI_STATUS_UDF         0x40    /* Support User Definable Features */
70
 
71
#define  PCI_STATUS_FAST_BACK   0x80    /* Accept fast-back to back */
72
#define  PCI_STATUS_PARITY      0x100   /* Detected parity error */
73
#define  PCI_STATUS_DEVSEL_MASK 0x600   /* DEVSEL timing */
74
#define  PCI_STATUS_DEVSEL_FAST 0x000   
75
#define  PCI_STATUS_DEVSEL_MEDIUM 0x200
76
#define  PCI_STATUS_DEVSEL_SLOW 0x400
77
#define  PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */
78
#define  PCI_STATUS_REC_TARGET_ABORT 0x1000 /* Master ack of " */
79
#define  PCI_STATUS_REC_MASTER_ABORT 0x2000 /* Set on master abort */
80
#define  PCI_STATUS_SIG_SYSTEM_ERROR 0x4000 /* Set when we drive SERR */
81
#define  PCI_STATUS_DETECTED_PARITY 0x8000 /* Set on parity error */
82
 
83
#define PCI_CLASS_REVISION      0x08    /* High 24 bits are class, low 8
84
                                           revision */
85
#define PCI_REVISION_ID         0x08    /* Revision ID */
86
#define PCI_CLASS_PROG          0x09    /* Reg. Level Programming Interface */
87
#define PCI_CLASS_DEVICE        0x0a    /* Device class */
88
 
89
#define PCI_CACHE_LINE_SIZE     0x0c    /* 8 bits */
90
#define PCI_LATENCY_TIMER       0x0d    /* 8 bits */
91
#define PCI_HEADER_TYPE         0x0e    /* 8 bits */
92
#define PCI_BIST                0x0f    /* 8 bits */
93
#define PCI_BIST_CODE_MASK      0x0f    /* Return result */
94
#define PCI_BIST_START          0x40    /* 1 to start BIST, 2 secs or less */
95
#define PCI_BIST_CAPABLE        0x80    /* 1 if BIST capable */
96
 
97
/*
98
 * Base addresses specify locations in memory or I/O space.
99
 * Decoded size can be determined by writing a value of
100
 * 0xffffffff to the register, and reading it back.  Only
101
 * 1 bits are decoded.
102
 */
103
#define PCI_BASE_ADDRESS_0      0x10    /* 32 bits */
104
#define PCI_BASE_ADDRESS_1      0x14    /* 32 bits */
105
#define PCI_BASE_ADDRESS_2      0x18    /* 32 bits */
106
#define PCI_BASE_ADDRESS_3      0x1c    /* 32 bits */
107
#define PCI_BASE_ADDRESS_4      0x20    /* 32 bits */
108
#define PCI_BASE_ADDRESS_5      0x24    /* 32 bits */
109
#define  PCI_BASE_ADDRESS_SPACE 0x01    /* 0 = memory, 1 = I/O */
110
#define  PCI_BASE_ADDRESS_SPACE_IO 0x01
111
#define  PCI_BASE_ADDRESS_SPACE_MEMORY 0x00
112
#define  PCI_BASE_ADDRESS_MEM_TYPE_MASK 0x06
113
#define  PCI_BASE_ADDRESS_MEM_TYPE_32   0x00    /* 32 bit address */
114
#define  PCI_BASE_ADDRESS_MEM_TYPE_1M   0x02    /* Below 1M */
115
#define  PCI_BASE_ADDRESS_MEM_TYPE_64   0x04    /* 64 bit address */
116
#define  PCI_BASE_ADDRESS_MEM_PREFETCH  0x08    /* prefetchable? */
117
#define  PCI_BASE_ADDRESS_MEM_MASK      (~0x0f)
118
#define  PCI_BASE_ADDRESS_IO_MASK       (~0x03)
119
/* bit 1 is reserved if address_space = 1 */
120
 
121
#define PCI_CARDBUS_CIS         0x28
122
#define PCI_SUBSYSTEM_ID        0x2c
123
#define PCI_SUBSYSTEM_VENDOR_ID 0x2e  
124
#define PCI_ROM_ADDRESS         0x30    /* 32 bits */
125
#define  PCI_ROM_ADDRESS_ENABLE 0x01    /* Write 1 to enable ROM,
126
                                           bits 31..11 are address,
127
                                           10..2 are reserved */
128
/* 0x34-0x3b are reserved */
129
#define PCI_INTERRUPT_LINE      0x3c    /* 8 bits */
130
#define PCI_INTERRUPT_PIN       0x3d    /* 8 bits */
131
#define PCI_MIN_GNT             0x3e    /* 8 bits */
132
#define PCI_MAX_LAT             0x3f    /* 8 bits */
133
 
134
#define PCI_CLASS_NOT_DEFINED           0x0000
135
#define PCI_CLASS_NOT_DEFINED_VGA       0x0001
136
 
137
#define PCI_BASE_CLASS_STORAGE          0x01
138
#define PCI_CLASS_STORAGE_SCSI          0x0100
139
#define PCI_CLASS_STORAGE_IDE           0x0101
140
#define PCI_CLASS_STORAGE_FLOPPY        0x0102
141
#define PCI_CLASS_STORAGE_IPI           0x0103
142
#define PCI_CLASS_STORAGE_RAID          0x0104
143
#define PCI_CLASS_STORAGE_OTHER         0x0180
144
 
145
#define PCI_BASE_CLASS_NETWORK          0x02
146
#define PCI_CLASS_NETWORK_ETHERNET      0x0200
147
#define PCI_CLASS_NETWORK_TOKEN_RING    0x0201
148
#define PCI_CLASS_NETWORK_FDDI          0x0202
149
#define PCI_CLASS_NETWORK_ATM           0x0203
150
#define PCI_CLASS_NETWORK_OTHER         0x0280
151
 
152
#define PCI_BASE_CLASS_DISPLAY          0x03
153
#define PCI_CLASS_DISPLAY_VGA           0x0300
154
#define PCI_CLASS_DISPLAY_XGA           0x0301
155
#define PCI_CLASS_DISPLAY_OTHER         0x0380
156
 
157
#define PCI_BASE_CLASS_MULTIMEDIA       0x04
158
#define PCI_CLASS_MULTIMEDIA_VIDEO      0x0400
159
#define PCI_CLASS_MULTIMEDIA_AUDIO      0x0401
160
#define PCI_CLASS_MULTIMEDIA_OTHER      0x0480
161
 
162
#define PCI_BASE_CLASS_MEMORY           0x05
163
#define  PCI_CLASS_MEMORY_RAM           0x0500
164
#define  PCI_CLASS_MEMORY_FLASH         0x0501
165
#define  PCI_CLASS_MEMORY_OTHER         0x0580
166
 
167
#define PCI_BASE_CLASS_BRIDGE           0x06
168
#define  PCI_CLASS_BRIDGE_HOST          0x0600
169
#define  PCI_CLASS_BRIDGE_ISA           0x0601
170
#define  PCI_CLASS_BRIDGE_EISA          0x0602
171
#define  PCI_CLASS_BRIDGE_MC            0x0603
172
#define  PCI_CLASS_BRIDGE_PCI           0x0604
173
#define  PCI_CLASS_BRIDGE_PCMCIA        0x0605
174
#define  PCI_CLASS_BRIDGE_NUBUS         0x0606
175
#define  PCI_CLASS_BRIDGE_CARDBUS       0x0607
176
#define  PCI_CLASS_BRIDGE_OTHER         0x0680
177
 
178
 
179
#define PCI_BASE_CLASS_COMMUNICATION    0x07
180
#define PCI_CLASS_COMMUNICATION_SERIAL  0x0700
181
#define PCI_CLASS_COMMUNICATION_PARALLEL 0x0701
182
#define PCI_CLASS_COMMUNICATION_OTHER   0x0780
183
 
184
#define PCI_BASE_CLASS_SYSTEM           0x08
185
#define PCI_CLASS_SYSTEM_PIC            0x0800
186
#define PCI_CLASS_SYSTEM_DMA            0x0801
187
#define PCI_CLASS_SYSTEM_TIMER          0x0802
188
#define PCI_CLASS_SYSTEM_RTC            0x0803
189
#define PCI_CLASS_SYSTEM_OTHER          0x0880
190
 
191
#define PCI_BASE_CLASS_INPUT            0x09
192
#define PCI_CLASS_INPUT_KEYBOARD        0x0900
193
#define PCI_CLASS_INPUT_PEN             0x0901
194
#define PCI_CLASS_INPUT_MOUSE           0x0902
195
#define PCI_CLASS_INPUT_OTHER           0x0980
196
 
197
#define PCI_BASE_CLASS_DOCKING          0x0a
198
#define PCI_CLASS_DOCKING_GENERIC       0x0a00
199
#define PCI_CLASS_DOCKING_OTHER         0x0a01
200
 
201
#define PCI_BASE_CLASS_PROCESSOR        0x0b
202
#define PCI_CLASS_PROCESSOR_386         0x0b00
203
#define PCI_CLASS_PROCESSOR_486         0x0b01
204
#define PCI_CLASS_PROCESSOR_PENTIUM     0x0b02
205
#define PCI_CLASS_PROCESSOR_ALPHA       0x0b10
206
#define PCI_CLASS_PROCESSOR_POWERPC     0x0b20
207
#define PCI_CLASS_PROCESSOR_CO          0x0b40
208
 
209
#define PCI_BASE_CLASS_SERIAL           0x0c
210
#define PCI_CLASS_SERIAL_FIREWIRE       0x0c00
211
#define PCI_CLASS_SERIAL_ACCESS         0x0c01
212
#define PCI_CLASS_SERIAL_SSA            0x0c02
213
#define PCI_CLASS_SERIAL_USB            0x0c03
214
#define PCI_CLASS_SERIAL_FIBER          0x0c04
215
 
216
#define PCI_CLASS_OTHERS                0xff
217
 
218
/*
219
 * Vendor and card ID's: sort these numerically according to vendor
220
 * (and according to card ID within vendor). Send all updates to
221
 * <linux-pcisupport@cck.uni-kl.de>.
222
 */
223
#define PCI_VENDOR_ID_COMPAQ            0x0e11
224
#define PCI_DEVICE_ID_COMPAQ_1280       0x3033
225
#define PCI_DEVICE_ID_COMPAQ_TRIFLEX    0x4000
226
#define PCI_DEVICE_ID_COMPAQ_SMART2P    0xae10
227
#define PCI_DEVICE_ID_COMPAQ_NETEL100   0xae32
228
#define PCI_DEVICE_ID_COMPAQ_NETEL10    0xae34
229
#define PCI_DEVICE_ID_COMPAQ_NETFLEX3I  0xae35
230
#define PCI_DEVICE_ID_COMPAQ_NETEL100D  0xae40
231
#define PCI_DEVICE_ID_COMPAQ_NETEL100PI 0xae43
232
#define PCI_DEVICE_ID_COMPAQ_NETEL100I  0xb011
233
#define PCI_DEVICE_ID_COMPAQ_THUNDER    0xf130
234
#define PCI_DEVICE_ID_COMPAQ_NETFLEX3B  0xf150
235
 
236
#define PCI_VENDOR_ID_NCR               0x1000
237
#define PCI_DEVICE_ID_NCR_53C810        0x0001
238
#define PCI_DEVICE_ID_NCR_53C820        0x0002
239
#define PCI_DEVICE_ID_NCR_53C825        0x0003
240
#define PCI_DEVICE_ID_NCR_53C815        0x0004
241
#define PCI_DEVICE_ID_NCR_53C860        0x0006
242
#define PCI_DEVICE_ID_NCR_53C896        0x000b
243
#define PCI_DEVICE_ID_NCR_53C895        0x000c
244
#define PCI_DEVICE_ID_NCR_53C885        0x000d
245
#define PCI_DEVICE_ID_NCR_53C875        0x000f
246
#define PCI_DEVICE_ID_NCR_53C875J       0x008f
247
 
248
#define PCI_VENDOR_ID_ATI               0x1002
249
#define PCI_DEVICE_ID_ATI_68800         0x4158
250
#define PCI_DEVICE_ID_ATI_215CT222      0x4354
251
#define PCI_DEVICE_ID_ATI_210888CX      0x4358
252
#define PCI_DEVICE_ID_ATI_215GB         0x4742
253
#define PCI_DEVICE_ID_ATI_215GD         0x4744
254
#define PCI_DEVICE_ID_ATI_215GI         0x4749
255
#define PCI_DEVICE_ID_ATI_215GP         0x4750
256
#define PCI_DEVICE_ID_ATI_215GQ         0x4751
257
#define PCI_DEVICE_ID_ATI_215GT         0x4754
258
#define PCI_DEVICE_ID_ATI_215GTB        0x4755
259
#define PCI_DEVICE_ID_ATI_210888GX      0x4758
260
#define PCI_DEVICE_ID_ATI_215LG         0x4c47
261
#define PCI_DEVICE_ID_ATI_264LT         0x4c54
262
#define PCI_DEVICE_ID_ATI_264VT         0x5654
263
 
264
#define PCI_VENDOR_ID_VLSI              0x1004
265
#define PCI_DEVICE_ID_VLSI_82C592       0x0005
266
#define PCI_DEVICE_ID_VLSI_82C593       0x0006
267
#define PCI_DEVICE_ID_VLSI_82C594       0x0007
268
#define PCI_DEVICE_ID_VLSI_82C597       0x0009
269
#define PCI_DEVICE_ID_VLSI_82C541       0x000c
270
#define PCI_DEVICE_ID_VLSI_82C543       0x000d
271
#define PCI_DEVICE_ID_VLSI_82C532       0x0101
272
#define PCI_DEVICE_ID_VLSI_82C534       0x0102
273
#define PCI_DEVICE_ID_VLSI_82C535       0x0104
274
#define PCI_DEVICE_ID_VLSI_82C147       0x0105
275
#define PCI_DEVICE_ID_VLSI_VAS96011     0x0702
276
 
277
#define PCI_VENDOR_ID_ADL               0x1005
278
#define PCI_DEVICE_ID_ADL_2301          0x2301
279
 
280
#define PCI_VENDOR_ID_NS                0x100b
281
#define PCI_DEVICE_ID_NS_87415          0x0002
282
#define PCI_DEVICE_ID_NS_87410          0xd001
283
 
284
#define PCI_VENDOR_ID_TSENG             0x100c
285
#define PCI_DEVICE_ID_TSENG_W32P_2      0x3202
286
#define PCI_DEVICE_ID_TSENG_W32P_b      0x3205
287
#define PCI_DEVICE_ID_TSENG_W32P_c      0x3206
288
#define PCI_DEVICE_ID_TSENG_W32P_d      0x3207
289
#define PCI_DEVICE_ID_TSENG_ET6000      0x3208
290
 
291
#define PCI_VENDOR_ID_WEITEK            0x100e
292
#define PCI_DEVICE_ID_WEITEK_P9000      0x9001
293
#define PCI_DEVICE_ID_WEITEK_P9100      0x9100
294
 
295
#define PCI_VENDOR_ID_DEC               0x1011
296
#define PCI_DEVICE_ID_DEC_BRD           0x0001
297
#define PCI_DEVICE_ID_DEC_TULIP         0x0002
298
#define PCI_DEVICE_ID_DEC_TGA           0x0004
299
#define PCI_DEVICE_ID_DEC_TULIP_FAST    0x0009
300
#define PCI_DEVICE_ID_DEC_TGA2          0x000D
301
#define PCI_DEVICE_ID_DEC_FDDI          0x000F
302
#define PCI_DEVICE_ID_DEC_TULIP_PLUS    0x0014
303
#define PCI_DEVICE_ID_DEC_21142         0x0019
304
#define PCI_DEVICE_ID_DEC_21052         0x0021
305
#define PCI_DEVICE_ID_DEC_21150         0x0022
306
#define PCI_DEVICE_ID_DEC_21152         0x0024
307
 
308
#define PCI_VENDOR_ID_CIRRUS            0x1013
309
#define PCI_DEVICE_ID_CIRRUS_7548       0x0038
310
#define PCI_DEVICE_ID_CIRRUS_5430       0x00a0
311
#define PCI_DEVICE_ID_CIRRUS_5434_4     0x00a4
312
#define PCI_DEVICE_ID_CIRRUS_5434_8     0x00a8
313
#define PCI_DEVICE_ID_CIRRUS_5436       0x00ac
314
#define PCI_DEVICE_ID_CIRRUS_5446       0x00b8
315
#define PCI_DEVICE_ID_CIRRUS_5480       0x00bc
316
#define PCI_DEVICE_ID_CIRRUS_5464       0x00d4
317
#define PCI_DEVICE_ID_CIRRUS_5465       0x00d6
318
#define PCI_DEVICE_ID_CIRRUS_6729       0x1100
319
#define PCI_DEVICE_ID_CIRRUS_6832       0x1110
320
#define PCI_DEVICE_ID_CIRRUS_7542       0x1200
321
#define PCI_DEVICE_ID_CIRRUS_7543       0x1202
322
#define PCI_DEVICE_ID_CIRRUS_7541       0x1204
323
 
324
#define PCI_VENDOR_ID_IBM               0x1014
325
#define PCI_DEVICE_ID_IBM_FIRE_CORAL    0x000a
326
#define PCI_DEVICE_ID_IBM_TR            0x0018
327
#define PCI_DEVICE_ID_IBM_82G2675       0x001d
328
#define PCI_DEVICE_ID_IBM_MCA           0x0020
329
#define PCI_DEVICE_ID_IBM_82351         0x0022
330
#define PCI_DEVICE_ID_IBM_SERVERAID     0x002e
331
#define PCI_DEVICE_ID_IBM_TR_WAKE       0x003e
332
#define PCI_DEVICE_ID_IBM_3780IDSP      0x007d
333
 
334
#define PCI_VENDOR_ID_WD                0x101c
335
#define PCI_DEVICE_ID_WD_7197           0x3296
336
 
337
#define PCI_VENDOR_ID_AMD               0x1022
338
#define PCI_DEVICE_ID_AMD_LANCE         0x2000
339
#define PCI_DEVICE_ID_AMD_SCSI          0x2020
340
 
341
#define PCI_VENDOR_ID_TRIDENT           0x1023
342
#define PCI_DEVICE_ID_TRIDENT_9397      0x9397
343
#define PCI_DEVICE_ID_TRIDENT_9420      0x9420
344
#define PCI_DEVICE_ID_TRIDENT_9440      0x9440
345
#define PCI_DEVICE_ID_TRIDENT_9660      0x9660
346
#define PCI_DEVICE_ID_TRIDENT_9750      0x9750
347
 
348
#define PCI_VENDOR_ID_AI                0x1025
349
#define PCI_DEVICE_ID_AI_M1435          0x1435
350
 
351
#define PCI_VENDOR_ID_MATROX            0x102B
352
#define PCI_DEVICE_ID_MATROX_MGA_2      0x0518
353
#define PCI_DEVICE_ID_MATROX_MIL        0x0519
354
#define PCI_DEVICE_ID_MATROX_MYS        0x051A
355
#define PCI_DEVICE_ID_MATROX_MIL_2      0x051b
356
#define PCI_DEVICE_ID_MATROX_MIL_2_AGP  0x051f
357
#define PCI_DEVICE_ID_MATROX_MGA_IMP    0x0d10
358
 
359
#define PCI_VENDOR_ID_CT                0x102c
360
#define PCI_DEVICE_ID_CT_65545          0x00d8
361
#define PCI_DEVICE_ID_CT_65548          0x00dc
362
#define PCI_DEVICE_ID_CT_65550          0x00e0
363
#define PCI_DEVICE_ID_CT_65554          0x00e4
364
#define PCI_DEVICE_ID_CT_65555          0x00e5
365
 
366
#define PCI_VENDOR_ID_MIRO              0x1031
367
#define PCI_DEVICE_ID_MIRO_36050        0x5601
368
 
369
#define PCI_VENDOR_ID_NEC               0x1033
370
#define PCI_DEVICE_ID_NEC_PCX2          0x0046
371
 
372
#define PCI_VENDOR_ID_FD                0x1036
373
#define PCI_DEVICE_ID_FD_36C70          0x0000
374
 
375
#define PCI_VENDOR_ID_SI                0x1039
376
#define PCI_DEVICE_ID_SI_5591_AGP       0x0001
377
#define PCI_DEVICE_ID_SI_6202           0x0002
378
#define PCI_DEVICE_ID_SI_503            0x0008
379
#define PCI_DEVICE_ID_SI_ACPI           0x0009
380
#define PCI_DEVICE_ID_SI_5597_VGA       0x0200
381
#define PCI_DEVICE_ID_SI_6205           0x0205
382
#define PCI_DEVICE_ID_SI_501            0x0406
383
#define PCI_DEVICE_ID_SI_496            0x0496
384
#define PCI_DEVICE_ID_SI_601            0x0601
385
#define PCI_DEVICE_ID_SI_5107           0x5107
386
#define PCI_DEVICE_ID_SI_5511           0x5511
387
#define PCI_DEVICE_ID_SI_5513           0x5513
388
#define PCI_DEVICE_ID_SI_5571           0x5571
389
#define PCI_DEVICE_ID_SI_5591           0x5591
390
#define PCI_DEVICE_ID_SI_5597           0x5597
391
#define PCI_DEVICE_ID_SI_7001           0x7001
392
 
393
#define PCI_VENDOR_ID_HP                0x103c
394
#define PCI_DEVICE_ID_HP_J2585A         0x1030
395
#define PCI_DEVICE_ID_HP_J2585B         0x1031
396
 
397
#define PCI_VENDOR_ID_PCTECH            0x1042
398
#define PCI_DEVICE_ID_PCTECH_RZ1000     0x1000
399
#define PCI_DEVICE_ID_PCTECH_RZ1001     0x1001
400
#define PCI_DEVICE_ID_PCTECH_SAMURAI_0  0x3000
401
#define PCI_DEVICE_ID_PCTECH_SAMURAI_1  0x3010
402
#define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020
403
 
404
#define PCI_VENDOR_ID_DPT               0x1044   
405
#define PCI_DEVICE_ID_DPT               0xa400  
406
 
407
#define PCI_VENDOR_ID_OPTI              0x1045
408
#define PCI_DEVICE_ID_OPTI_92C178       0xc178
409
#define PCI_DEVICE_ID_OPTI_82C557       0xc557
410
#define PCI_DEVICE_ID_OPTI_82C558       0xc558
411
#define PCI_DEVICE_ID_OPTI_82C621       0xc621
412
#define PCI_DEVICE_ID_OPTI_82C700       0xc700
413
#define PCI_DEVICE_ID_OPTI_82C701       0xc701
414
#define PCI_DEVICE_ID_OPTI_82C814       0xc814
415
#define PCI_DEVICE_ID_OPTI_82C822       0xc822
416
#define PCI_DEVICE_ID_OPTI_82C825       0xd568
417
 
418
#define PCI_VENDOR_ID_SGS               0x104a
419
#define PCI_DEVICE_ID_SGS_2000          0x0008
420
#define PCI_DEVICE_ID_SGS_1764          0x0009
421
 
422
#define PCI_VENDOR_ID_BUSLOGIC                0x104B
423
#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140
424
#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER    0x1040
425
#define PCI_DEVICE_ID_BUSLOGIC_FLASHPOINT     0x8130
426
 
427
#define PCI_VENDOR_ID_TI                0x104c
428
#define PCI_DEVICE_ID_TI_TVP4010        0x3d04
429
#define PCI_DEVICE_ID_TI_TVP4020        0x3d07
430
#define PCI_DEVICE_ID_TI_PCI1130        0xac12
431
#define PCI_DEVICE_ID_TI_PCI1131        0xac15
432
#define PCI_DEVICE_ID_TI_PCI1250        0xac16
433
 
434
#define PCI_VENDOR_ID_OAK               0x104e
435
#define PCI_DEVICE_ID_OAK_OTI107        0x0107
436
 
437
/* Winbond have two vendor IDs! See 0x10ad as well */
438
#define PCI_VENDOR_ID_WINBOND2          0x1050
439
#define PCI_DEVICE_ID_WINBOND2_89C940   0x0940
440
 
441
#define PCI_VENDOR_ID_MOTOROLA          0x1057
442
#define PCI_DEVICE_ID_MOTOROLA_MPC105   0x0001
443
#define PCI_DEVICE_ID_MOTOROLA_MPC106   0x0002
444
#define PCI_DEVICE_ID_MOTOROLA_RAVEN    0x4801
445
 
446
#define PCI_VENDOR_ID_PROMISE           0x105a
447
#define PCI_DEVICE_ID_PROMISE_20246     0x4d33
448
#define PCI_DEVICE_ID_PROMISE_5300      0x5300
449
 
450
#define PCI_VENDOR_ID_N9                0x105d
451
#define PCI_DEVICE_ID_N9_I128           0x2309
452
#define PCI_DEVICE_ID_N9_I128_2         0x2339
453
#define PCI_DEVICE_ID_N9_I128_T2R       0x493d
454
 
455
#define PCI_VENDOR_ID_UMC               0x1060
456
#define PCI_DEVICE_ID_UMC_UM8673F       0x0101
457
#define PCI_DEVICE_ID_UMC_UM8891A       0x0891
458
#define PCI_DEVICE_ID_UMC_UM8886BF      0x673a
459
#define PCI_DEVICE_ID_UMC_UM8886A       0x886a
460
#define PCI_DEVICE_ID_UMC_UM8881F       0x8881
461
#define PCI_DEVICE_ID_UMC_UM8886F       0x8886
462
#define PCI_DEVICE_ID_UMC_UM9017F       0x9017
463
#define PCI_DEVICE_ID_UMC_UM8886N       0xe886
464
#define PCI_DEVICE_ID_UMC_UM8891N       0xe891
465
 
466
#define PCI_VENDOR_ID_X                 0x1061
467
#define PCI_DEVICE_ID_X_AGX016          0x0001
468
 
469
#define PCI_VENDOR_ID_PICOP             0x1066
470
#define PCI_DEVICE_ID_PICOP_PT86C52X    0x0001
471
#define PCI_DEVICE_ID_PICOP_PT80C524    0x8002
472
 
473
#define PCI_VENDOR_ID_APPLE             0x106b
474
#define PCI_DEVICE_ID_APPLE_BANDIT      0x0001
475
#define PCI_DEVICE_ID_APPLE_GC          0x0002
476
#define PCI_DEVICE_ID_APPLE_HYDRA       0x000e
477
 
478
#define PCI_VENDOR_ID_NEXGEN            0x1074
479
#define PCI_DEVICE_ID_NEXGEN_82C501     0x4e78
480
 
481
#define PCI_VENDOR_ID_QLOGIC            0x1077
482
#define PCI_DEVICE_ID_QLOGIC_ISP1020    0x1020
483
#define PCI_DEVICE_ID_QLOGIC_ISP1022    0x1022
484
 
485
#define PCI_VENDOR_ID_CYRIX             0x1078
486
#define PCI_DEVICE_ID_CYRIX_5510        0x0000
487
#define PCI_DEVICE_ID_CYRIX_PCI_MASTER  0x0001
488
#define PCI_DEVICE_ID_CYRIX_5520        0x0002
489
#define PCI_DEVICE_ID_CYRIX_5530_LEGACY 0x0100
490
#define PCI_DEVICE_ID_CYRIX_5530_SMI    0x0101
491
#define PCI_DEVICE_ID_CYRIX_5530_IDE    0x0102
492
#define PCI_DEVICE_ID_CYRIX_5530_AUDIO  0x0103
493
#define PCI_DEVICE_ID_CYRIX_5530_VIDEO  0x0104
494
 
495
#define PCI_VENDOR_ID_LEADTEK           0x107d
496
#define PCI_DEVICE_ID_LEADTEK_805       0x0000
497
 
498
#define PCI_VENDOR_ID_CONTAQ            0x1080
499
#define PCI_DEVICE_ID_CONTAQ_82C599     0x0600
500
#define PCI_DEVICE_ID_CONTAQ_82C693     0xc693
501
 
502
#define PCI_VENDOR_ID_FOREX             0x1083
503
 
504
#define PCI_VENDOR_ID_OLICOM            0x108d
505
#define PCI_DEVICE_ID_OLICOM_OC3136     0x0001
506
#define PCI_DEVICE_ID_OLICOM_OC2315     0x0011
507
#define PCI_DEVICE_ID_OLICOM_OC2325     0x0012
508
#define PCI_DEVICE_ID_OLICOM_OC2183     0x0013
509
#define PCI_DEVICE_ID_OLICOM_OC2326     0x0014
510
#define PCI_DEVICE_ID_OLICOM_OC6151     0x0021
511
 
512
#define PCI_VENDOR_ID_SUN               0x108e
513
#define PCI_DEVICE_ID_SUN_EBUS          0x1000
514
#define PCI_DEVICE_ID_SUN_HAPPYMEAL     0x1001
515
#define PCI_DEVICE_ID_SUN_SIMBA         0x5000
516
#define PCI_DEVICE_ID_SUN_PBM           0x8000
517
#define PCI_DEVICE_ID_SUN_SABRE         0xa000
518
 
519
#define PCI_VENDOR_ID_CMD               0x1095
520
#define PCI_DEVICE_ID_CMD_640           0x0640
521
#define PCI_DEVICE_ID_CMD_643           0x0643
522
#define PCI_DEVICE_ID_CMD_646           0x0646
523
#define PCI_DEVICE_ID_CMD_670           0x0670
524
 
525
#define PCI_VENDOR_ID_VISION            0x1098
526
#define PCI_DEVICE_ID_VISION_QD8500     0x0001
527
#define PCI_DEVICE_ID_VISION_QD8580     0x0002
528
 
529
#define PCI_VENDOR_ID_BROOKTREE         0x109e
530
#define PCI_DEVICE_ID_BROOKTREE_848     0x0350
531
#define PCI_DEVICE_ID_BROOKTREE_849A    0x0351
532
#define PCI_DEVICE_ID_BROOKTREE_8474    0x8474
533
 
534
#define PCI_VENDOR_ID_SIERRA            0x10a8
535
#define PCI_DEVICE_ID_SIERRA_STB        0x0000
536
 
537
#define PCI_VENDOR_ID_ACC               0x10aa
538
#define PCI_DEVICE_ID_ACC_2056          0x0000
539
 
540
#define PCI_VENDOR_ID_WINBOND           0x10ad
541
#define PCI_DEVICE_ID_WINBOND_83769     0x0001
542
#define PCI_DEVICE_ID_WINBOND_82C105    0x0105
543
#define PCI_DEVICE_ID_WINBOND_83C553    0x0565
544
 
545
#define PCI_VENDOR_ID_DATABOOK          0x10b3
546
#define PCI_DEVICE_ID_DATABOOK_87144    0xb106
547
 
548
#define PCI_VENDOR_ID_PLX               0x10b5
549
#define PCI_DEVICE_ID_PLX_9080          0x9080
550
 
551
#define PCI_VENDOR_ID_MADGE             0x10b6
552
#define PCI_DEVICE_ID_MADGE_MK2         0x0002
553
 
554
#define PCI_VENDOR_ID_3COM              0x10b7
555
#define PCI_DEVICE_ID_3COM_3C339        0x3390
556
#define PCI_DEVICE_ID_3COM_3C590        0x5900
557
#define PCI_DEVICE_ID_3COM_3C595TX      0x5950
558
#define PCI_DEVICE_ID_3COM_3C595T4      0x5951
559
#define PCI_DEVICE_ID_3COM_3C595MII     0x5952
560
#define PCI_DEVICE_ID_3COM_3C900TPO     0x9000
561
#define PCI_DEVICE_ID_3COM_3C900COMBO   0x9001
562
#define PCI_DEVICE_ID_3COM_3C905TX      0x9050
563
#define PCI_DEVICE_ID_3COM_3C905T4      0x9051
564
#define PCI_DEVICE_ID_3COM_3C905B_TX    0x9055
565
 
566
#define PCI_VENDOR_ID_SMC               0x10b8
567
#define PCI_DEVICE_ID_SMC_EPIC100       0x0005
568
 
569
#define PCI_VENDOR_ID_AL                0x10b9
570
#define PCI_DEVICE_ID_AL_M1445          0x1445
571
#define PCI_DEVICE_ID_AL_M1449          0x1449
572
#define PCI_DEVICE_ID_AL_M1451          0x1451
573
#define PCI_DEVICE_ID_AL_M1461          0x1461
574
#define PCI_DEVICE_ID_AL_M1489          0x1489
575
#define PCI_DEVICE_ID_AL_M1511          0x1511
576
#define PCI_DEVICE_ID_AL_M1513          0x1513
577
#define PCI_DEVICE_ID_AL_M1521          0x1521
578
#define PCI_DEVICE_ID_AL_M1523          0x1523
579
#define PCI_DEVICE_ID_AL_M1531          0x1531
580
#define PCI_DEVICE_ID_AL_M1533          0x1533
581
#define PCI_DEVICE_ID_AL_M3307          0x3307
582
#define PCI_DEVICE_ID_AL_M4803          0x5215
583
#define PCI_DEVICE_ID_AL_M5219          0x5219
584
#define PCI_DEVICE_ID_AL_M5229          0x5229
585
#define PCI_DEVICE_ID_AL_M5237          0x5237
586
#define PCI_DEVICE_ID_AL_M7101          0x7101
587
 
588
#define PCI_VENDOR_ID_MITSUBISHI        0x10ba
589
 
590
#define PCI_VENDOR_ID_SURECOM           0x10bd
591
#define PCI_DEVICE_ID_SURECOM_NE34      0x0e34
592
 
593
#define PCI_VENDOR_ID_NEOMAGIC          0x10c8
594
#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2070 0x0001
595
#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128V 0x0002
596
#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128ZV 0x0003
597
#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2160 0x0004
598
 
599
#define PCI_VENDOR_ID_ASP               0x10cd
600
#define PCI_DEVICE_ID_ASP_ABP940        0x1200
601
#define PCI_DEVICE_ID_ASP_ABP940U       0x1300
602
#define PCI_DEVICE_ID_ASP_ABP940UW      0x2300
603
 
604
#define PCI_VENDOR_ID_MACRONIX          0x10d9
605
#define PCI_DEVICE_ID_MACRONIX_MX98713  0x0512
606
#define PCI_DEVICE_ID_MACRONIX_MX987x5  0x0531
607
 
608
#define PCI_VENDOR_ID_CERN              0x10dc
609
#define PCI_DEVICE_ID_CERN_SPSB_PMC     0x0001
610
#define PCI_DEVICE_ID_CERN_SPSB_PCI     0x0002
611
#define PCI_DEVICE_ID_CERN_HIPPI_DST    0x0021
612
#define PCI_DEVICE_ID_CERN_HIPPI_SRC    0x0022
613
 
614
#define PCI_VENDOR_ID_NVIDIA            0x10de
615
 
616
#define PCI_VENDOR_ID_IMS               0x10e0
617
#define PCI_DEVICE_ID_IMS_8849          0x8849
618
 
619
#define PCI_VENDOR_ID_TEKRAM2           0x10e1
620
#define PCI_DEVICE_ID_TEKRAM2_690c      0x690c
621
 
622
#define PCI_VENDOR_ID_TUNDRA            0x10e3
623
#define PCI_DEVICE_ID_TUNDRA_CA91C042   0x0000
624
 
625
#define PCI_VENDOR_ID_AMCC              0x10e8
626
#define PCI_DEVICE_ID_AMCC_MYRINET      0x8043
627
#define PCI_DEVICE_ID_AMCC_S5933        0x807d
628
#define PCI_DEVICE_ID_AMCC_S5933_HEPC3  0x809c
629
 
630
#define PCI_VENDOR_ID_INTERG            0x10ea
631
#define PCI_DEVICE_ID_INTERG_1680       0x1680
632
#define PCI_DEVICE_ID_INTERG_1682       0x1682
633
 
634
#define PCI_VENDOR_ID_REALTEK           0x10ec
635
#define PCI_DEVICE_ID_REALTEK_8029      0x8029
636
#define PCI_DEVICE_ID_REALTEK_8129      0x8129
637
#define PCI_DEVICE_ID_REALTEK_8139      0x8139
638
 
639
#define PCI_VENDOR_ID_TRUEVISION        0x10fa
640
#define PCI_DEVICE_ID_TRUEVISION_T1000  0x000c
641
 
642
#define PCI_VENDOR_ID_INIT              0x1101
643
#define PCI_DEVICE_ID_INIT_320P         0x9100
644
#define PCI_DEVICE_ID_INIT_360P         0x9500
645
 
646
#define PCI_VENDOR_ID_VIA               0x1106
647
#define PCI_DEVICE_ID_VIA_82C505        0x0505
648
#define PCI_DEVICE_ID_VIA_82C561        0x0561
649
#define PCI_DEVICE_ID_VIA_82C586_1      0x0571
650
#define PCI_DEVICE_ID_VIA_82C576        0x0576
651
#define PCI_DEVICE_ID_VIA_82C585        0x0585
652
#define PCI_DEVICE_ID_VIA_82C586_0      0x0586
653
#define PCI_DEVICE_ID_VIA_82C595        0x0595
654
#define PCI_DEVICE_ID_VIA_82C597_0      0x0597
655
#define PCI_DEVICE_ID_VIA_82C926        0x0926
656
#define PCI_DEVICE_ID_VIA_82C416        0x1571
657
#define PCI_DEVICE_ID_VIA_82C595_97     0x1595
658
#define PCI_DEVICE_ID_VIA_82C586_2      0x3038
659
#define PCI_DEVICE_ID_VIA_82C586_3      0x3040
660
#define PCI_DEVICE_ID_VIA_86C100A       0x6100
661
#define PCI_DEVICE_ID_VIA_82C597_1      0x8597
662
 
663
#define PCI_VENDOR_ID_VORTEX            0x1119
664
#define PCI_DEVICE_ID_VORTEX_GDT60x0    0x0000
665
#define PCI_DEVICE_ID_VORTEX_GDT6000B   0x0001
666
#define PCI_DEVICE_ID_VORTEX_GDT6x10    0x0002
667
#define PCI_DEVICE_ID_VORTEX_GDT6x20    0x0003
668
#define PCI_DEVICE_ID_VORTEX_GDT6530    0x0004
669
#define PCI_DEVICE_ID_VORTEX_GDT6550    0x0005
670
#define PCI_DEVICE_ID_VORTEX_GDT6x17    0x0006
671
#define PCI_DEVICE_ID_VORTEX_GDT6x27    0x0007
672
#define PCI_DEVICE_ID_VORTEX_GDT6537    0x0008
673
#define PCI_DEVICE_ID_VORTEX_GDT6557    0x0009
674
#define PCI_DEVICE_ID_VORTEX_GDT6x15    0x000a
675
#define PCI_DEVICE_ID_VORTEX_GDT6x25    0x000b
676
#define PCI_DEVICE_ID_VORTEX_GDT6535    0x000c
677
#define PCI_DEVICE_ID_VORTEX_GDT6555    0x000d
678
#define PCI_DEVICE_ID_VORTEX_GDT6x17RP  0x0100
679
#define PCI_DEVICE_ID_VORTEX_GDT6x27RP  0x0101
680
#define PCI_DEVICE_ID_VORTEX_GDT6537RP  0x0102
681
#define PCI_DEVICE_ID_VORTEX_GDT6557RP  0x0103
682
#define PCI_DEVICE_ID_VORTEX_GDT6x11RP  0x0104
683
#define PCI_DEVICE_ID_VORTEX_GDT6x21RP  0x0105
684
#define PCI_DEVICE_ID_VORTEX_GDT6x17RP1 0x0110
685
#define PCI_DEVICE_ID_VORTEX_GDT6x27RP1 0x0111
686
#define PCI_DEVICE_ID_VORTEX_GDT6537RP1 0x0112
687
#define PCI_DEVICE_ID_VORTEX_GDT6557RP1 0x0113
688
#define PCI_DEVICE_ID_VORTEX_GDT6x11RP1 0x0114
689
#define PCI_DEVICE_ID_VORTEX_GDT6x21RP1 0x0115
690
#define PCI_DEVICE_ID_VORTEX_GDT6x17RP2 0x0120
691
#define PCI_DEVICE_ID_VORTEX_GDT6x27RP2 0x0121
692
#define PCI_DEVICE_ID_VORTEX_GDT6537RP2 0x0122
693
#define PCI_DEVICE_ID_VORTEX_GDT6557RP2 0x0123
694
#define PCI_DEVICE_ID_VORTEX_GDT6x11RP2 0x0124
695
#define PCI_DEVICE_ID_VORTEX_GDT6x21RP2 0x0125
696
 
697
#define PCI_VENDOR_ID_EF                0x111a
698
#define PCI_DEVICE_ID_EF_ATM_FPGA       0x0000
699
#define PCI_DEVICE_ID_EF_ATM_ASIC       0x0002
700
 
701
#define PCI_VENDOR_ID_FORE              0x1127
702
#define PCI_DEVICE_ID_FORE_PCA200PC     0x0210
703
#define PCI_DEVICE_ID_FORE_PCA200E      0x0300
704
 
705
#define PCI_VENDOR_ID_IMAGINGTECH       0x112f
706
#define PCI_DEVICE_ID_IMAGINGTECH_ICPCI 0x0000
707
 
708
#define PCI_VENDOR_ID_PHILIPS           0x1131
709
#define PCI_DEVICE_ID_PHILIPS_SAA7146   0x7146
710
 
711
#define PCI_VENDOR_ID_CYCLONE           0x113c
712
#define PCI_DEVICE_ID_CYCLONE_SDK       0x0001
713
 
714
#define PCI_VENDOR_ID_ALLIANCE          0x1142
715
#define PCI_DEVICE_ID_ALLIANCE_PROMOTIO 0x3210
716
#define PCI_DEVICE_ID_ALLIANCE_PROVIDEO 0x6422
717
#define PCI_DEVICE_ID_ALLIANCE_AT24     0x6424
718
#define PCI_DEVICE_ID_ALLIANCE_AT3D     0x643d
719
 
720
#define PCI_VENDOR_ID_VMIC              0x114a
721
#define PCI_DEVICE_ID_VMIC_VME          0x7587
722
 
723
#define PCI_VENDOR_ID_DIGI              0x114f
724
#define PCI_DEVICE_ID_DIGI_EPC          0x0002
725
#define PCI_DEVICE_ID_DIGI_RIGHTSWITCH  0x0003
726
#define PCI_DEVICE_ID_DIGI_XEM          0x0004
727
#define PCI_DEVICE_ID_DIGI_XR           0x0005
728
#define PCI_DEVICE_ID_DIGI_CX           0x0006
729
#define PCI_DEVICE_ID_DIGI_XRJ          0x0009
730
#define PCI_DEVICE_ID_DIGI_EPCJ         0x000a
731
#define PCI_DEVICE_ID_DIGI_XR_920       0x0027
732
 
733
#define PCI_VENDOR_ID_MUTECH            0x1159
734
#define PCI_DEVICE_ID_MUTECH_MV1000     0x0001
735
 
736
#define PCI_VENDOR_ID_RENDITION         0x1163
737
#define PCI_DEVICE_ID_RENDITION_VERITE  0x0001
738
#define PCI_DEVICE_ID_RENDITION_VERITE2100 0x2000
739
 
740
#define PCI_VENDOR_ID_TOSHIBA           0x1179
741
#define PCI_DEVICE_ID_TOSHIBA_601       0x0601
742
#define PCI_DEVICE_ID_TOSHIBA_TOPIC95   0x060a
743
#define PCI_DEVICE_ID_TOSHIBA_TOPIC97   0x060f
744
 
745
#define PCI_VENDOR_ID_RICOH             0x1180
746
#define PCI_DEVICE_ID_RICOH_RL5C466     0x0466
747
 
748
#define PCI_VENDOR_ID_ARTOP             0x1191
749
#define PCI_DEVICE_ID_ARTOP_ATP850UF    0x0005
750
 
751
#define PCI_VENDOR_ID_ZEITNET           0x1193
752
#define PCI_DEVICE_ID_ZEITNET_1221      0x0001
753
#define PCI_DEVICE_ID_ZEITNET_1225      0x0002
754
 
755
#define PCI_VENDOR_ID_OMEGA             0x119b
756
#define PCI_DEVICE_ID_OMEGA_82C092G     0x1221
757
 
758
#define PCI_VENDOR_ID_LITEON            0x11ad
759
#define PCI_DEVICE_ID_LITEON_LNE100TX   0x0002
760
 
761
#define PCI_VENDOR_ID_NP                0x11bc
762
#define PCI_DEVICE_ID_NP_PCI_FDDI       0x0001
763
 
764
#define PCI_VENDOR_ID_ATT               0x11c1
765
#define PCI_DEVICE_ID_ATT_L56XMF        0x0440
766
 
767
#define PCI_VENDOR_ID_SPECIALIX         0x11cb
768
#define PCI_DEVICE_ID_SPECIALIX_XIO     0x4000
769
#define PCI_DEVICE_ID_SPECIALIX_RIO     0x8000
770
 
771
#define PCI_VENDOR_ID_AURAVISION        0x11d1
772
#define PCI_DEVICE_ID_AURAVISION_VXP524 0x01f7
773
 
774
#define PCI_VENDOR_ID_IKON              0x11d5
775
#define PCI_DEVICE_ID_IKON_10115        0x0115
776
#define PCI_DEVICE_ID_IKON_10117        0x0117
777
 
778
#define PCI_VENDOR_ID_ZORAN             0x11de
779
#define PCI_DEVICE_ID_ZORAN_36057       0x6057
780
#define PCI_DEVICE_ID_ZORAN_36120       0x6120
781
 
782
#define PCI_VENDOR_ID_KINETIC           0x11f4
783
#define PCI_DEVICE_ID_KINETIC_2915      0x2915
784
 
785
#define PCI_VENDOR_ID_COMPEX            0x11f6
786
#define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112
787
#define PCI_DEVICE_ID_COMPEX_RL2000     0x1401
788
 
789
#define PCI_VENDOR_ID_RP               0x11fe
790
#define PCI_DEVICE_ID_RP8OCTA          0x0001
791
#define PCI_DEVICE_ID_RP8INTF          0x0002
792
#define PCI_DEVICE_ID_RP16INTF         0x0003
793
#define PCI_DEVICE_ID_RP32INTF         0x0004
794
 
795
#define PCI_VENDOR_ID_CYCLADES          0x120e
796
#define PCI_DEVICE_ID_CYCLOM_Y_Lo       0x0100
797
#define PCI_DEVICE_ID_CYCLOM_Y_Hi       0x0101
798
#define PCI_DEVICE_ID_CYCLOM_Z_Lo       0x0200
799
#define PCI_DEVICE_ID_CYCLOM_Z_Hi       0x0201
800
 
801
#define PCI_VENDOR_ID_ESSENTIAL         0x120f
802
#define PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER      0x0001
803
 
804
#define PCI_VENDOR_ID_O2                0x1217
805
#define PCI_DEVICE_ID_O2_6832           0x6832
806
 
807
#define PCI_VENDOR_ID_3DFX              0x121a
808
#define PCI_DEVICE_ID_3DFX_VOODOO       0x0001
809
#define PCI_DEVICE_ID_3DFX_VOODOO2      0x0002
810
 
811
#define PCI_VENDOR_ID_SIGMADES          0x1236
812
#define PCI_DEVICE_ID_SIGMADES_6425     0x6401
813
 
814
#define PCI_VENDOR_ID_CCUBE             0x123f
815
 
816
#define PCI_VENDOR_ID_DIPIX             0x1246
817
 
818
#define PCI_VENDOR_ID_STALLION          0x124d
819
#define PCI_DEVICE_ID_STALLION_ECHPCI832 0x0000
820
#define PCI_DEVICE_ID_STALLION_ECHPCI864 0x0002
821
#define PCI_DEVICE_ID_STALLION_EIOPCI   0x0003
822
 
823
#define PCI_VENDOR_ID_OPTIBASE          0x1255
824
#define PCI_DEVICE_ID_OPTIBASE_FORGE    0x1110
825
#define PCI_DEVICE_ID_OPTIBASE_FUSION   0x1210
826
#define PCI_DEVICE_ID_OPTIBASE_VPLEX    0x2110
827
#define PCI_DEVICE_ID_OPTIBASE_VPLEXCC  0x2120
828
#define PCI_DEVICE_ID_OPTIBASE_VQUEST   0x2130
829
 
830
#define PCI_VENDOR_ID_SATSAGEM          0x1267
831
#define PCI_DEVICE_ID_SATSAGEM_PCR2101  0x5352
832
#define PCI_DEVICE_ID_SATSAGEM_TELSATTURBO 0x5a4b
833
 
834
#define PCI_VENDOR_ID_ENSONIQ           0x1274
835
#define PCI_DEVICE_ID_ENSONIQ_AUDIOPCI  0x5000
836
 
837
#define PCI_VENDOR_ID_PICTUREL          0x12c5
838
#define PCI_DEVICE_ID_PICTUREL_PCIVST   0x0081
839
 
840
#define PCI_VENDOR_ID_NVIDIA_SGS        0x12d2
841
#define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 0x0018
842
 
843
#define PCI_VENDOR_ID_CBOARDS           0x1307
844
#define PCI_DEVICE_ID_CBOARDS_DAS1602_16 0x0001
845
 
846
#define PCI_VENDOR_ID_SYMPHONY          0x1c1c
847
#define PCI_DEVICE_ID_SYMPHONY_101      0x0001
848
 
849
#define PCI_VENDOR_ID_TEKRAM            0x1de1
850
#define PCI_DEVICE_ID_TEKRAM_DC290      0xdc29
851
 
852
#define PCI_VENDOR_ID_3DLABS            0x3d3d
853
#define PCI_DEVICE_ID_3DLABS_300SX      0x0001
854
#define PCI_DEVICE_ID_3DLABS_500TX      0x0002
855
#define PCI_DEVICE_ID_3DLABS_DELTA      0x0003
856
#define PCI_DEVICE_ID_3DLABS_PERMEDIA   0x0004
857
#define PCI_DEVICE_ID_3DLABS_MX         0x0006
858
 
859
#define PCI_VENDOR_ID_AVANCE            0x4005
860
#define PCI_DEVICE_ID_AVANCE_ALG2064    0x2064
861
#define PCI_DEVICE_ID_AVANCE_2302       0x2302
862
 
863
#define PCI_VENDOR_ID_NETVIN            0x4a14
864
#define PCI_DEVICE_ID_NETVIN_NV5000SC   0x5000
865
 
866
#define PCI_VENDOR_ID_S3                0x5333
867
#define PCI_DEVICE_ID_S3_PLATO_PXS      0x0551
868
#define PCI_DEVICE_ID_S3_ViRGE          0x5631
869
#define PCI_DEVICE_ID_S3_TRIO           0x8811
870
#define PCI_DEVICE_ID_S3_AURORA64VP     0x8812
871
#define PCI_DEVICE_ID_S3_TRIO64UVP      0x8814
872
#define PCI_DEVICE_ID_S3_ViRGE_VX       0x883d
873
#define PCI_DEVICE_ID_S3_868            0x8880
874
#define PCI_DEVICE_ID_S3_928            0x88b0
875
#define PCI_DEVICE_ID_S3_864_1          0x88c0
876
#define PCI_DEVICE_ID_S3_864_2          0x88c1
877
#define PCI_DEVICE_ID_S3_964_1          0x88d0
878
#define PCI_DEVICE_ID_S3_964_2          0x88d1
879
#define PCI_DEVICE_ID_S3_968            0x88f0
880
#define PCI_DEVICE_ID_S3_TRIO64V2       0x8901
881
#define PCI_DEVICE_ID_S3_PLATO_PXG      0x8902
882
#define PCI_DEVICE_ID_S3_ViRGE_DXGX     0x8a01
883
#define PCI_DEVICE_ID_S3_ViRGE_GX2      0x8a10
884
#define PCI_DEVICE_ID_S3_ViRGE_MX       0x8c01
885
#define PCI_DEVICE_ID_S3_ViRGE_MXP      0x8c02
886
#define PCI_DEVICE_ID_S3_ViRGE_MXPMV    0x8c03
887
#define PCI_DEVICE_ID_S3_SONICVIBES     0xca00
888
 
889
#define PCI_VENDOR_ID_INTEL             0x8086
890
#define PCI_DEVICE_ID_INTEL_82375       0x0482
891
#define PCI_DEVICE_ID_INTEL_82424       0x0483
892
#define PCI_DEVICE_ID_INTEL_82378       0x0484
893
#define PCI_DEVICE_ID_INTEL_82430       0x0486
894
#define PCI_DEVICE_ID_INTEL_82434       0x04a3
895
#define PCI_DEVICE_ID_INTEL_82092AA_0   0x1221
896
#define PCI_DEVICE_ID_INTEL_82092AA_1   0x1222
897
#define PCI_DEVICE_ID_INTEL_7116        0x1223
898
#define PCI_DEVICE_ID_INTEL_82596       0x1226
899
#define PCI_DEVICE_ID_INTEL_82865       0x1227
900
#define PCI_DEVICE_ID_INTEL_82557       0x1229
901
#define PCI_DEVICE_ID_INTEL_82437       0x122d
902
#define PCI_DEVICE_ID_INTEL_82371_0     0x122e
903
#define PCI_DEVICE_ID_INTEL_82371_1     0x1230
904
#define PCI_DEVICE_ID_INTEL_82371MX     0x1234
905
#define PCI_DEVICE_ID_INTEL_82437MX     0x1235
906
#define PCI_DEVICE_ID_INTEL_82441       0x1237
907
#define PCI_DEVICE_ID_INTEL_82380FB     0x124b
908
#define PCI_DEVICE_ID_INTEL_82439       0x1250
909
#define PCI_DEVICE_ID_INTEL_82371SB_0   0x7000
910
#define PCI_DEVICE_ID_INTEL_82371SB_1   0x7010
911
#define PCI_DEVICE_ID_INTEL_82371SB_2   0x7020
912
#define PCI_DEVICE_ID_INTEL_82437VX     0x7030
913
#define PCI_DEVICE_ID_INTEL_82439TX     0x7100
914
#define PCI_DEVICE_ID_INTEL_82371AB_0   0x7110
915
#define PCI_DEVICE_ID_INTEL_82371AB     0x7111
916
#define PCI_DEVICE_ID_INTEL_82371AB_2   0x7112
917
#define PCI_DEVICE_ID_INTEL_82371AB_3   0x7113
918
#define PCI_DEVICE_ID_INTEL_82443LX_0   0x7180
919
#define PCI_DEVICE_ID_INTEL_82443LX_1   0x7181
920
#define PCI_DEVICE_ID_INTEL_82443BX_0   0x7190
921
#define PCI_DEVICE_ID_INTEL_82443BX_1   0x7191
922
#define PCI_DEVICE_ID_INTEL_82443BX_2   0x7192
923
#define PCI_DEVICE_ID_INTEL_P6          0x84c4
924
#define PCI_DEVICE_ID_INTEL_82450GX     0x84c5
925
 
926
#define PCI_VENDOR_ID_KTI               0x8e2e
927
#define PCI_DEVICE_ID_KTI_ET32P2        0x3000
928
 
929
#define PCI_VENDOR_ID_ADAPTEC           0x9004
930
#define PCI_DEVICE_ID_ADAPTEC_7810      0x1078
931
#define PCI_DEVICE_ID_ADAPTEC_7850      0x5078
932
#define PCI_DEVICE_ID_ADAPTEC_7855      0x5578
933
#define PCI_DEVICE_ID_ADAPTEC_5800      0x5800
934
#define PCI_DEVICE_ID_ADAPTEC_7860      0x6078
935
#define PCI_DEVICE_ID_ADAPTEC_7861      0x6178
936
#define PCI_DEVICE_ID_ADAPTEC_7870      0x7078
937
#define PCI_DEVICE_ID_ADAPTEC_7871      0x7178
938
#define PCI_DEVICE_ID_ADAPTEC_7872      0x7278
939
#define PCI_DEVICE_ID_ADAPTEC_7873      0x7378
940
#define PCI_DEVICE_ID_ADAPTEC_7874      0x7478
941
#define PCI_DEVICE_ID_ADAPTEC_7895      0x7895
942
#define PCI_DEVICE_ID_ADAPTEC_7880      0x8078
943
#define PCI_DEVICE_ID_ADAPTEC_7881      0x8178
944
#define PCI_DEVICE_ID_ADAPTEC_7882      0x8278
945
#define PCI_DEVICE_ID_ADAPTEC_7883      0x8378
946
#define PCI_DEVICE_ID_ADAPTEC_7884      0x8478
947
#define PCI_DEVICE_ID_ADAPTEC_1030      0x8b78
948
 
949
#define PCI_VENDOR_ID_ATRONICS          0x907f
950
#define PCI_DEVICE_ID_ATRONICS_2015     0x2015
951
 
952
#define PCI_VENDOR_ID_HER               0xedd8
953
#define PCI_DEVICE_ID_HER_STING         0xa091
954
#define PCI_DEVICE_ID_HER_STINGARK      0xa099
955
 
956
#define PCI_VENDOR_ID_HOLTEK            0x9412
957
#define PCI_DEVICE_ID_HOLTEK_6565       0x6565
958
 
959
#define PCI_VENDOR_ID_TIGERJET          0xe159
960
#define PCI_DEVICE_ID_TIGERJET_300      0x0001
961
 
962
#define PCI_VENDOR_ID_ARK               0xedd8
963
#define PCI_DEVICE_ID_ARK_STING         0xa091
964
#define PCI_DEVICE_ID_ARK_STINGARK      0xa099
965
#define PCI_DEVICE_ID_ARK_2000MT        0xa0a1
966
 
967
#include "ll/sys/cdefs.h"
968
 
969
__BEGIN_DECLS
970
/*
971
 * The PCI interface treats multi-function devices as independent
972
 * devices.  The slot/function address of each device is encoded
973
 * in a single byte as follows:
974
 *
975
 *      7:3 = slot
976
 *      2:0 = function
977
 */
978
#define PCI_DEVFN(slot,func)    ((((slot) & 0x1f) << 3) | ((func) & 0x07))
979
#define PCI_SLOT(devfn)         (((devfn) >> 3) & 0x1f)
980
#define PCI_FUNC(devfn)         ((devfn) & 0x07)
981
 
982
 
983
/*
984
 * There is one pci_dev structure for each slot-number/function-number
985
 * combination:
986
 */
987
struct pci_dev {
988
        struct pci_bus  *bus;           /* bus this device is on */
989
        struct pci_dev  *sibling;       /* next device on this bus */
990
        struct pci_dev  *next;          /* chain of all devices */
991
 
992
        void            *sysdata;       /* hook for sys-specific extension */
993
        struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
994
 
995
        unsigned int    devfn;          /* encoded device & function index */
996
        unsigned short  vendor;
997
        unsigned short  device;
998
        unsigned int    class;          /* 3 bytes: (base,sub,prog-if) */
999
        unsigned int    hdr_type;       /* PCI header type */
1000
        unsigned int    master : 1;     /* set if device is master capable */
1001
        /*
1002
         * In theory, the irq level can be read from configuration
1003
         * space and all would be fine.  However, old PCI chips don't
1004
         * support these registers and return 0 instead.  For example,
1005
         * the Vision864-P rev 0 chip can uses INTA, but returns 0 in
1006
         * the interrupt line and pin registers.  pci_init()
1007
         * initializes this field with the value at PCI_INTERRUPT_LINE
1008
         * and it is the job of pcibios_fixup() to change it if
1009
         * necessary.  The field must not be 0 unless the device
1010
         * cannot generate interrupts at all.
1011
         */
1012
        unsigned int    irq;            /* irq generated by this device */
1013
 
1014
        /* Base registers for this device, can be adjusted by
1015
         * pcibios_fixup() as necessary.
1016
         */
1017
        unsigned long   base_address[6];
1018
        unsigned long   rom_address;
1019
};
1020
 
1021
struct pci_bus {
1022
        struct pci_bus  *parent;        /* parent bus this bridge is on */
1023
        struct pci_bus  *children;      /* chain of P2P bridges on this bus */
1024
        struct pci_bus  *next;          /* chain of all PCI buses */
1025
 
1026
        struct pci_dev  *self;          /* bridge device as seen by parent */
1027
        struct pci_dev  *devices;       /* devices behind this bridge */
1028
 
1029
        void            *sysdata;       /* hook for sys-specific extension */
1030
        struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
1031
 
1032
        unsigned char   number;         /* bus number */
1033
        unsigned char   primary;        /* number of primary bridge */
1034
        unsigned char   secondary;      /* number of secondary bridge */
1035
        unsigned char   subordinate;    /* max number of subordinate buses */
1036
};
1037
 
1038
 
1039
/*
1040
 * This is used to map a vendor-id/device-id pair into device-specific
1041
 * information.
1042
 */
1043
struct pci_dev_info {
1044
        unsigned short  vendor;         /* vendor id */
1045
        unsigned short  device;         /* device id */
1046
 
1047
        const char      *name;          /* device name */
1048
        unsigned char   bridge_type;    /* bridge type or 0xff */
1049
};
1050
 
1051
extern struct pci_bus   pci_root;       /* root bus */
1052
extern struct pci_dev   *pci_devices;   /* list of all devices */
1053
 
1054
 
1055
/* Generic PCI interface functions */
1056
 
1057
void pci_setup(char *str, int *ints);           /* ??? */
1058
void pci_quirks_init(void);                     /* ??? */
1059
DWORD pci_scan_bus(struct pci_bus *bus);
1060
struct pci_bus *pci_scan_peer_bridge(int bus);
1061
int get_pci_list(char *buf);                    /* ??? */
1062
 
1063
struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, struct pci_dev *from);
1064
struct pci_dev *pci_find_class (unsigned int class, struct pci_dev *from);
1065
struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
1066
 
1067
#define pci_present pcibios_present
1068
int pci_read_config_byte(struct pci_dev *dev, BYTE where, BYTE *val);
1069
int pci_read_config_word(struct pci_dev *dev, BYTE where, WORD  *val);
1070
int pci_read_config_dword(struct pci_dev *dev, BYTE where, DWORD *val);
1071
int pci_write_config_byte(struct pci_dev *dev, BYTE where, BYTE val);
1072
int pci_write_config_word(struct pci_dev *dev, BYTE where, WORD val);
1073
int pci_write_config_dword(struct pci_dev *dev, BYTE where, DWORD val);
1074
void pci_set_master(struct pci_dev *dev);
1075
 
1076
 
1077
 
1078
 
1079
extern const char *pci_strclass (unsigned int class);
1080
extern const char *pci_strvendor (unsigned int vendor);
1081
 
1082
__END_DECLS
1083
#endif /* LINUX_PCI_H */