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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 436 | giacomo | 1 | /* |
| 2 | * Low-Level PCI Support for PC |
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| 3 | * |
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| 4 | * (c) 1999--2000 Martin Mares <mj@ucw.cz> |
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| 5 | */ |
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| 6 | |||
| 7 | #include <linuxcomp.h> |
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| 8 | |||
| 9 | #include <linux/sched.h> |
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| 10 | #include <linux/pci.h> |
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| 11 | #include <linux/ioport.h> |
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| 12 | #include <linux/init.h> |
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| 13 | |||
| 14 | #include <asm/segment.h> |
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| 15 | #include <asm/io.h> |
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| 16 | #include <asm/smp.h> |
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| 17 | |||
| 18 | #include "pci2.h" |
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| 19 | |||
| 20 | #ifdef CONFIG_PCI_BIOS |
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| 21 | extern void pcibios_sort(void); |
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| 22 | #endif |
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| 23 | |||
| 24 | unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2; |
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| 25 | |||
| 26 | int pcibios_last_bus = -1; |
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| 27 | struct pci_bus *pci_root_bus = NULL; |
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| 28 | struct pci_raw_ops *raw_pci_ops; |
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| 29 | |||
| 30 | static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value) |
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| 31 | { |
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| 32 | return raw_pci_ops->read(0, bus->number, devfn, where, size, value); |
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| 33 | } |
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| 34 | |||
| 35 | static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) |
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| 36 | { |
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| 37 | return raw_pci_ops->write(0, bus->number, devfn, where, size, value); |
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| 38 | } |
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| 39 | |||
| 40 | struct pci_ops pci_root_ops = { |
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| 41 | .read = pci_read, |
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| 42 | .write = pci_write, |
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| 43 | }; |
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| 44 | |||
| 45 | /* |
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| 46 | * legacy, numa, and acpi all want to call pcibios_scan_root |
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| 47 | * from their initcalls. This flag prevents that. |
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| 48 | */ |
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| 49 | int pcibios_scanned; |
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| 50 | |||
| 51 | /* |
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| 52 | * This interrupt-safe spinlock protects all accesses to PCI |
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| 53 | * configuration space. |
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| 54 | */ |
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| 55 | spinlock_t pci_config_lock = SPIN_LOCK_UNLOCKED; |
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| 56 | |||
| 57 | /* |
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| 58 | * Several buggy motherboards address only 16 devices and mirror |
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| 59 | * them to next 16 IDs. We try to detect this `feature' on all |
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| 60 | * primary buses (those containing host bridges as they are |
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| 61 | * expected to be unique) and remove the ghost devices. |
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| 62 | */ |
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| 63 | |||
| 64 | static void __devinit pcibios_fixup_ghosts(struct pci_bus *b) |
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| 65 | { |
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| 66 | struct list_head *ln, *mn; |
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| 67 | struct pci_dev *d, *e; |
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| 68 | int mirror = PCI_DEVFN(16,0); |
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| 69 | int seen_host_bridge = 0; |
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| 70 | int i; |
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| 71 | |||
| 72 | DBG("PCI: Scanning for ghost devices on bus %d\n", b->number); |
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| 73 | for (ln=b->devices.next; ln != &b->devices; ln=ln->next) { |
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| 74 | d = pci_dev_b(ln); |
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| 75 | if ((d->class >> 8) == PCI_CLASS_BRIDGE_HOST) |
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| 76 | seen_host_bridge++; |
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| 77 | for (mn=ln->next; mn != &b->devices; mn=mn->next) { |
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| 78 | e = pci_dev_b(mn); |
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| 79 | if (e->devfn != d->devfn + mirror || |
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| 80 | e->vendor != d->vendor || |
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| 81 | e->device != d->device || |
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| 82 | e->class != d->class) |
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| 83 | continue; |
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| 84 | for(i=0; i<PCI_NUM_RESOURCES; i++) |
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| 85 | if (e->resource[i].start != d->resource[i].start || |
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| 86 | e->resource[i].end != d->resource[i].end || |
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| 87 | e->resource[i].flags != d->resource[i].flags) |
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| 88 | continue; |
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| 89 | break; |
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| 90 | } |
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| 91 | if (mn == &b->devices) |
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| 92 | return; |
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| 93 | } |
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| 94 | if (!seen_host_bridge) |
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| 95 | return; |
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| 96 | printk(KERN_WARNING "PCI: Ignoring ghost devices on bus %02x\n", b->number); |
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| 97 | |||
| 98 | ln = &b->devices; |
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| 99 | while (ln->next != &b->devices) { |
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| 100 | d = pci_dev_b(ln->next); |
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| 101 | if (d->devfn >= mirror) { |
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| 102 | list_del(&d->global_list); |
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| 103 | list_del(&d->bus_list); |
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| 104 | kfree(d); |
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| 105 | } else |
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| 106 | ln = ln->next; |
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| 107 | } |
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| 108 | } |
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| 109 | |||
| 110 | /* |
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| 111 | * Called after each bus is probed, but before its children |
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| 112 | * are examined. |
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| 113 | */ |
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| 114 | |||
| 115 | void __devinit pcibios_fixup_bus(struct pci_bus *b) |
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| 116 | { |
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| 117 | pcibios_fixup_ghosts(b); |
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| 118 | pci_read_bridge_bases(b); |
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| 119 | } |
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| 120 | |||
| 121 | |||
| 122 | struct pci_bus * __devinit pcibios_scan_root(int busnum) |
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| 123 | { |
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| 124 | struct pci_bus *bus = NULL; |
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| 125 | |||
| 126 | while ((bus = pci_find_next_bus(bus)) != NULL) { |
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| 127 | if (bus->number == busnum) { |
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| 128 | /* Already scanned */ |
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| 129 | return bus; |
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| 130 | } |
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| 131 | } |
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| 132 | |||
| 133 | printk("PCI: Probing PCI hardware (bus %02x)\n", busnum); |
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| 134 | |||
| 135 | return pci_scan_bus(busnum, &pci_root_ops, NULL); |
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| 136 | } |
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| 137 | |||
| 138 | extern u8 pci_cache_line_size; |
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| 139 | |||
| 140 | static int __init pcibios_init(void) |
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| 141 | { |
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| 142 | struct cpuinfo_x86 *c = &boot_cpu_data; |
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| 143 | |||
| 144 | if (!raw_pci_ops) { |
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| 145 | printk("PCI: System does not support PCI\n"); |
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| 146 | return 0; |
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| 147 | } |
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| 148 | |||
| 149 | /* |
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| 150 | * Assume PCI cacheline size of 32 bytes for all x86s except K7/K8 |
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| 151 | * and P4. It's also good for 386/486s (which actually have 16) |
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| 152 | * as quite a few PCI devices do not support smaller values. |
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| 153 | */ |
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| 154 | pci_cache_line_size = 32 >> 2; |
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| 155 | if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD) |
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| 156 | pci_cache_line_size = 64 >> 2; /* K7 & K8 */ |
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| 157 | else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL) |
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| 158 | pci_cache_line_size = 128 >> 2; /* P4 */ |
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| 159 | |||
| 160 | pcibios_resource_survey(); |
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| 161 | |||
| 162 | #ifdef CONFIG_PCI_BIOS |
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| 163 | if ((pci_probe & PCI_BIOS_SORT) && !(pci_probe & PCI_NO_SORT)) |
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| 164 | pcibios_sort(); |
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| 165 | #endif |
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| 166 | return 0; |
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| 167 | } |
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| 168 | |||
| 169 | subsys_initcall(pcibios_init); |
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| 170 | |||
| 171 | char * __devinit pcibios_setup(char *str) |
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| 172 | { |
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| 173 | if (!strcmp(str, "off")) { |
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| 174 | pci_probe = 0; |
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| 175 | return NULL; |
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| 176 | } |
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| 177 | #ifdef CONFIG_PCI_BIOS |
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| 178 | else if (!strcmp(str, "bios")) { |
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| 179 | pci_probe = PCI_PROBE_BIOS; |
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| 180 | return NULL; |
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| 181 | } else if (!strcmp(str, "nobios")) { |
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| 182 | pci_probe &= ~PCI_PROBE_BIOS; |
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| 183 | return NULL; |
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| 184 | } else if (!strcmp(str, "nosort")) { |
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| 185 | pci_probe |= PCI_NO_SORT; |
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| 186 | return NULL; |
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| 187 | } else if (!strcmp(str, "biosirq")) { |
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| 188 | pci_probe |= PCI_BIOS_IRQ_SCAN; |
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| 189 | return NULL; |
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| 190 | } |
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| 191 | #endif |
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| 192 | #ifdef CONFIG_PCI_DIRECT |
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| 193 | else if (!strcmp(str, "conf1")) { |
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| 194 | pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS; |
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| 195 | return NULL; |
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| 196 | } |
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| 197 | else if (!strcmp(str, "conf2")) { |
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| 198 | pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS; |
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| 199 | return NULL; |
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| 200 | } |
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| 201 | #endif |
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| 202 | #ifdef CONFIG_ACPI_PCI |
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| 203 | else if (!strcmp(str, "noacpi")) { |
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| 204 | pci_probe |= PCI_NO_ACPI_ROUTING; |
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| 205 | return NULL; |
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| 206 | } |
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| 207 | #endif |
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| 208 | #ifndef CONFIG_X86_VISWS |
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| 209 | else if (!strcmp(str, "usepirqmask")) { |
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| 210 | pci_probe |= PCI_USE_PIRQ_MASK; |
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| 211 | return NULL; |
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| 212 | } else if (!strncmp(str, "irqmask=", 8)) { |
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| 213 | pcibios_irq_mask = simple_strtol(str+8, NULL, 0); |
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| 214 | return NULL; |
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| 215 | } else if (!strncmp(str, "lastbus=", 8)) { |
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| 216 | pcibios_last_bus = simple_strtol(str+8, NULL, 0); |
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| 217 | return NULL; |
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| 218 | } |
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| 219 | #endif |
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| 220 | else if (!strcmp(str, "rom")) { |
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| 221 | pci_probe |= PCI_ASSIGN_ROMS; |
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| 222 | return NULL; |
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| 223 | } else if (!strcmp(str, "assign-busses")) { |
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| 224 | pci_probe |= PCI_ASSIGN_ALL_BUSSES; |
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| 225 | return NULL; |
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| 226 | } |
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| 227 | return str; |
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| 228 | } |
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| 229 | |||
| 230 | unsigned int pcibios_assign_all_busses(void) |
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| 231 | { |
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| 232 | return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0; |
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| 233 | } |
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| 234 | |||
| 235 | int pcibios_enable_device(struct pci_dev *dev, int mask) |
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| 236 | { |
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| 237 | int err; |
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| 238 | |||
| 239 | if ((err = pcibios_enable_resources(dev, mask)) < 0) |
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| 240 | return err; |
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| 241 | |||
| 242 | return pcibios_enable_irq(dev); |
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| 243 | } |