WebSVN - shark - Blame - Rev 3 - /shark/trunk/drivers/pci6025e/tim/timer.c

Rev	Author	Line No.	Line
2	pj	1	/*****************************************************************************
		2	* Filename: timer.c *
		3	* Author: Ziglioli Marco (Doctor Stein) *
		4	* Date: 25/03/2001 *
		5	* Last update: *
		6	* Description: Contains routines used to interface with two 24 bits general *
		7	* Purpouse Timer Conter on PCI6025E board *
		8	----------------------------------------------------------------------------
		9	* Notes: Pulse generation and position sensing isn't implemented yet *
		10	*****************************************************************************/
		11
		12	/* This file is part of the S.Ha.R.K. Project - http://shark.sssup.it
		13	*
		14	* Copyright (C) 2001 Marco Ziglioli
		15	*
		16	* This program is free software; you can redistribute it and/or modify
		17	* it under the terms of the GNU General Public License as published by
		18	* the Free Software Foundation; either version 2 of the License, or
		19	* (at your option) any later version.
		20	*
		21	* This program is distributed in the hope that it will be useful,
		22	* but WITHOUT ANY WARRANTY; without even the implied warranty of
		23	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		24	* GNU General Public License for more details.
		25	*
		26	* You should have received a copy of the GNU General Public License
		27	* along with this program; if not, write to the Free Software
		28	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
		29	*
		30	*/
		31
		32	#include <drivers/pci6025e/timer.h>
		33
		34	/*****************************************************************************
		35	* Reset the specified counter. If argument is grater than 1 both counters *
		36	* will be reset *
		37	*****************************************************************************/
		38	void TIM_reset(BYTE ct)
		39	{
		40	switch(ct){
		41	case C0: reset_counter_0(); break;
		42	case C1: reset_counter_1(); break;
		43	default: reset_counter_0(); reset_counter_1(); break;
		44	}
		45	}
		46
		47	void reset_counter_0(void)
		48	{
		49	set(joint_reset, 2);
		50	DAQ_STC_Windowed_Mode_Write(JOINT_RESET, joint_reset); //Reset flag raised
		51	clr(joint_reset, 2);
		52
		53	//clears some registers
		54	g0_mode = g0_input_select = g0_command = g0_autoincrement = 0;
		55	DAQ_STC_Windowed_Mode_Write(G0_MODE, g0_mode);
		56	DAQ_STC_Windowed_Mode_Write(G0_COMMAND, g0_command);
		57	DAQ_STC_Windowed_Mode_Write(G0_INPUT_SELECT, g0_input_select);
		58	DAQ_STC_Windowed_Mode_Write(G0_AUTOINCREMENT, g0_autoincrement);
		59
		60	interrupt_a_enable &= 0xFEBF;
		61	DAQ_STC_Windowed_Mode_Write(INTERRUPT_A_ENABLE, interrupt_a_enable);
		62
		63
		64	//Set synchronized gate flag
		65	set(g0_command, 8);
		66	DAQ_STC_Windowed_Mode_Write(G0_COMMAND, g0_command);
		67
		68
		69	interrupt_a_ack \|= 0xC060;
		70	DAQ_STC_Windowed_Mode_Write(INTERRUPT_A_ACK, interrupt_a_ack);
		71
		72	DAQ_STC_Windowed_Mode_Write(G0_AUTOINCREMENT, g0_autoincrement);
		73	}
		74
		75
		76	void reset_counter_1(void)
		77	{
		78	set(joint_reset, 3);
		79	DAQ_STC_Windowed_Mode_Write(JOINT_RESET, joint_reset); //Reset flag raised
		80	clr(joint_reset, 3);
		81
		82	//clears some registers
		83
		84	g1_mode = g1_input_select = g1_command = g1_autoincrement = 0;
		85	DAQ_STC_Windowed_Mode_Write(G1_MODE, g1_mode);
		86	DAQ_STC_Windowed_Mode_Write(G1_COMMAND, g1_command);
		87	DAQ_STC_Windowed_Mode_Write(G1_INPUT_SELECT, g1_input_select);
		88	DAQ_STC_Windowed_Mode_Write(G1_AUTOINCREMENT, g1_autoincrement);
		89
		90	interrupt_b_enable &= 0xF9FF;
		91	DAQ_STC_Windowed_Mode_Write(INTERRUPT_B_ENABLE, interrupt_b_enable);
		92
		93	//Set synchronized gate flag
		94	set(g1_command, 8);
		95	DAQ_STC_Windowed_Mode_Write(G1_COMMAND, g1_command);
		96
		97
		98	interrupt_b_ack \|= 0xC006;
		99	DAQ_STC_Windowed_Mode_Write(INTERRUPT_B_ACK, interrupt_b_ack);
		100
		101	DAQ_STC_Windowed_Mode_Write(G1_AUTOINCREMENT, g0_autoincrement);
		102	}
		103
		104	/*****************************************************************************
		105	* Arming the specified counter. If argument is grater than 1 both counters *
		106	* will be armed *
		107	*****************************************************************************/
		108	void TIM_arm(BYTE counter)
		109	{
		110	switch(counter){
		111	case C0: arm_counter_0(); break;
		112	case C1: arm_counter_1(); break;
		113	default: arm_counter_0(); arm_counter_1(); break;
		114	}
		115	}
		116
		117	void arm_counter_0(void)
		118	{
		119	set(g0_command, 0);
		120	set(g1_command, 13);
		121	DAQ_STC_Windowed_Mode_Write(G0_COMMAND, g0_command);
		122	DAQ_STC_Windowed_Mode_Write(G1_COMMAND, g1_command);
		123	clr(g0_command, 0);
		124	clr(g1_command, 13);
		125	}
		126
		127	void arm_counter_1(void)
		128	{
		129	set(g1_command, 0);
		130	set(g0_command, 13);
		131	DAQ_STC_Windowed_Mode_Write(G1_COMMAND, g1_command);
		132	DAQ_STC_Windowed_Mode_Write(G0_COMMAND, g0_command);
		133	clr(g1_command, 0);
		134	clr(g0_command, 13);
		135	}
		136
		137	/*****************************************************************************
		138	* Disarming the specified counter. If argument is grater than 1 both *
		139	* counters will be disarmed *
		140	*****************************************************************************/
		141	void TIM_disarm(BYTE counter)
		142	{
		143	switch(counter){
		144	case C0: disarm_counter_0(); break;
		145	case C1: disarm_counter_1(); break;
		146	default: disarm_counter_0(); disarm_counter_1(); break;
		147	}
		148	}
		149
		150	void disarm_counter_0(void)
		151	{
		152	set(g0_command, 4);
		153	set(g1_command, 15);
		154	DAQ_STC_Windowed_Mode_Write(G0_COMMAND, g0_command);
		155	DAQ_STC_Windowed_Mode_Write(G1_COMMAND, g1_command);
		156	clr(g0_command, 4);
		157	clr(g1_command, 15);
		158	}
		159
		160	void disarm_counter_1(void)
		161	{
		162	set(g1_command, 4);
		163	set(g0_command, 15);
		164	DAQ_STC_Windowed_Mode_Write(G1_COMMAND, g1_command);
		165	DAQ_STC_Windowed_Mode_Write(G0_COMMAND, g0_command);
		166	clr(g1_command, 4);
		167	clr(g0_command, 15);
		168	}
		169
		170	/*****************************************************************************
		171	* DWORD TIM_readCounter(BYTE counter) *
		172	----------------------------------------------------------------------------
		173	* Use this function to read counter value while it's armed and without *
		174	* disturbing the counting process. *
		175	* Counter specifies which counter will be readed *
		176	*****************************************************************************/
		177	DWORD TIM_readCounter(BYTE counter)
		178	{
		179	DWORD s1, s2;
		180	if(counter == C0){
		181	clr(g0_command, 1);
		182
		183	DAQ_STC_Windowed_Mode_Write(G0_COMMAND, g0_command);
		184	set(g0_command, 1);
		185
		186	DAQ_STC_Windowed_Mode_Write(G0_COMMAND, g0_command);
		187	clr(g0_command, 1);
		188	s1 = (DWORD)DAQ_STC_Windowed_Mode_Read(G0_SAVE_LO) +
		189	((DWORD)DAQ_STC_Windowed_Mode_Read(G0_SAVE_HI) << 16);
		190
		191	s2 = (DWORD)DAQ_STC_Windowed_Mode_Read(G0_SAVE_LO) +
		192	((DWORD)DAQ_STC_Windowed_Mode_Read(G0_SAVE_HI) << 16);
		193
		194	if(s1 != s2)
		195	s1 = (DWORD)DAQ_STC_Windowed_Mode_Read(G0_SAVE_LO) +
		196	((DWORD)DAQ_STC_Windowed_Mode_Read(G0_SAVE_HI) << 16);
		197
		198	} else {
		199	clr(g1_command, 1);
		200	DAQ_STC_Windowed_Mode_Write(G1_COMMAND, g1_command);
		201	set(g1_command, 1);
		202	DAQ_STC_Windowed_Mode_Write(G1_COMMAND, g1_command);
		203	clr(g1_command, 1);
		204	s1 = (DWORD)DAQ_STC_Windowed_Mode_Read(G1_SAVE_LO) +
		205	((DWORD)DAQ_STC_Windowed_Mode_Read(G1_SAVE_HI) << 16);
		206
		207	s2 = (DWORD)DAQ_STC_Windowed_Mode_Read(G1_SAVE_LO) +
		208	((DWORD)DAQ_STC_Windowed_Mode_Read(G1_SAVE_HI) << 16);
		209
		210	if(s1 != s2)
		211	s1 = (DWORD)DAQ_STC_Windowed_Mode_Read(G1_SAVE_LO) +
		212	((DWORD)DAQ_STC_Windowed_Mode_Read(G1_SAVE_HI) << 16);
		213	}
		214
		215	return s1;
		216	}
		217
		218	/*****************************************************************************
		219	* DWORD TIM_readHWSaveReg(BYTE counter) *
		220	----------------------------------------------------------------------------
		221	* Use this function to read the value in Hardware save registers. *
		222	* Counter specifies which counter will be readed *
		223	*****************************************************************************/
		224	DWORD TIM_readHWSaveReg(BYTE counter)
		225	{
		226	DWORD s1;
		227
		228	if(counter == C0){
		229	if( (DAQ_STC_Windowed_Mode_Read(AI_STATUS_1) & 0x0004) != 0 )
		230	s1 = (DWORD)DAQ_STC_Windowed_Mode_Read(G0_HW_SAVE_LO) +
		231	((DWORD)DAQ_STC_Windowed_Mode_Read(G0_HW_SAVE_HI) << 16);
		232	} else {
		233	if( (DAQ_STC_Windowed_Mode_Read(AO_STATUS_1) & 0x0004) != 0 )
		234	s1 = (DWORD)DAQ_STC_Windowed_Mode_Read(G1_HW_SAVE_LO) +
		235	((DWORD)DAQ_STC_Windowed_Mode_Read(G1_HW_SAVE_HI) << 16);
		236	}
		237
		238	return s1;
		239	}
		240
		241	/*****************************************************************************
		242	void TIM_eventCounting(BYTE counter, BYTE source, BYTE gate,
		243	* BYTE interrupts, DWORD in) *
		244	----------------------------------------------------------------------------
		245	* Use this function to perform an event counting through source line *
		246	* selected and, in the case of gating event counting, when gate enable *
		247	* counting operation *
		248	* Parameters: *
		249	* counter: select which counter must perform counting *
		250	* source: bit 0..4: source select: 0 G_IN_TIMEBASE1 *
		251	* 1 through 10 PFI 0..9 *
		252	* 11 through 17 RTSI 0..6 *
		253	* 18 IN_TIMEBASE_2 *
		254	* 19 other G_TC *
		255	* bit 5: source polarity: 0 counting rising edge *
		256	* 1 counting falling edge *
		257	* bit 6: output polarity of G_OUT 0 active hi *
		258	* 1 active lo *
		259	* bit 7: counting direction 0 down counting *
		260	* 1 up counting *
		261	* gate: bit 0..4: gate select: 1 through 10 PFI 0..9 *
		262	* 11 through 17 RTSI 0..6 *
		263	* 18 IN_TIMEBASE2 *
		264	* 19 UI2_TC *
		265	* 20 other G_TC *
		266	* 21 AI_START1 *
		267	* 31 Logic low (not gated count) *
		268	* bit 5: gate polarity 0 active high *
		269	* 1 active low *
		270	* bit 6..7 output mode for G_OUT: 1 one clock cycle output *
		271	* 2 toggle on TC *
		272	* 3 toggle on TC or gate *
		273	* interrupts: bit 0: Terminal Count Interrupt enable *
		274	* bit 1: Gate Interrupt enable *
		275	* in: Initial value loaded into the counter *
		276	*****************************************************************************/
		277	void TIM_eventCounting(BYTE counter, BYTE source, BYTE gate,
		278	BYTE interrupts, DWORD in)
		279	{
		280	in &= 0x00FFFFFF;
		281	if(counter == C0){
		282	clr(g0_mode, 7);
		283	DAQ_STC_Windowed_Mode_Write(G0_MODE, g0_mode);
		284	DAQ_STC_Windowed_Mode_Write(G0_LOAD_A_LO, (WORD)in);
		285	DAQ_STC_Windowed_Mode_Write(G0_LOAD_A_HI, (WORD)(in >> 16));
		286
		287	set(g0_command, 2);
		288	DAQ_STC_Windowed_Mode_Write(G0_COMMAND, g0_command);
		289	clr(g0_command, 2);
		290
		291	g0_input_select &= 0x0003; //reset bits that I'm going to manage
		292
		293	g0_input_select \|= (source & 0x1F) << 2; //Source selected
		294	if(source & 0x20) set(g0_input_select, 15); //Source polarity
		295	else clr(g0_input_select, 15);
		296
		297	g0_input_select \|= (gate & 0x1F) << 7; //Gate selected
		298
		299	/* GI_OR_GATE = 0
		300	GI_GATE_SELECT_LOAD_SOURCE = 0
		301	this bit is 0*/
		302
		303	if(source & 0x40) set(g0_input_select, 14);
		304	else clr(g0_input_select, 14);
		305
		306	g0_mode &= 0x8080;
		307	if(gate & 0x20) set(g0_mode, 13);
		308	else clr(g0_mode, 13);
		309
		310	g0_mode \|= (gate & 0xC0) << 2;
		311	g0_mode \|= 0x0011;
		312
		313	g0_command &= 0xE79F;
		314	if(source & 0x80) set(g0_command, 5);
		315
		316	interrupt_a_enable &= 0xFEBF;
		317
		318	if(interrupts & 0x01) set(interrupt_a_enable, 6);
		319	if(interrupts & 0x02) set(interrupt_a_enable, 8);
		320
		321	DAQ_STC_Windowed_Mode_Write(G0_INPUT_SELECT, g0_input_select);
		322	DAQ_STC_Windowed_Mode_Write(G0_MODE, g0_mode);
		323	DAQ_STC_Windowed_Mode_Write(G0_COMMAND, g0_command);
		324	DAQ_STC_Windowed_Mode_Write(INTERRUPT_A_ENABLE, interrupt_a_enable);
		325	} else {
		326	clr(g1_mode, 7);
		327	DAQ_STC_Windowed_Mode_Write(G1_MODE, g1_mode);
		328	DAQ_STC_Windowed_Mode_Write(G1_LOAD_A_LO, (WORD)in);
		329	DAQ_STC_Windowed_Mode_Write(G1_LOAD_A_HI, (WORD)(in >> 16));
		330
		331	set(g1_command, 2);
		332	DAQ_STC_Windowed_Mode_Write(G1_COMMAND, g1_command);
		333	clr(g1_command, 2);
		334
		335	g1_input_select &= 0x0003; //reset bits that I'm going to manage
		336
		337	g1_input_select \|= (source & 0x1F) << 2; //Source selected
		338	if(source & 0x20) set(g1_input_select, 15); //Source polarity
		339	else clr(g1_input_select, 15);
		340
		341	g1_input_select \|= (gate & 0x1F) << 7; //Gate selected
		342
		343	/* Gi_OR_GATE = 0
		344	Gi_GATE_SELECT_LOAD_SOURCE = 0
		345	this bit is 0*/
		346
		347	if(source & 0x40) set(g1_input_select, 14);
		348	else clr(g1_input_select, 14);
		349
		350	g1_mode &= 0x8080;
		351	if(gate & 0x20) set(g1_mode, 13);
		352	else clr(g1_mode, 13);
		353
		354	g1_mode \|= (gate & 0xC0) << 2;
		355	g1_mode \|= 0x0011;
		356
		357	g1_command &= 0xE79F;
		358	if(source & 0x80) set(g1_command, 5);
		359
		360	interrupt_b_enable &= 0xF9FF;
		361
		362	if(interrupts & 0x01) set(interrupt_b_enable, 9);
		363	if(interrupts & 0x02) set(interrupt_b_enable, 10);
		364
		365	DAQ_STC_Windowed_Mode_Write(G1_INPUT_SELECT, g1_input_select);
		366	DAQ_STC_Windowed_Mode_Write(G1_MODE, g1_mode);
		367	DAQ_STC_Windowed_Mode_Write(G1_COMMAND, g1_command);
		368	DAQ_STC_Windowed_Mode_Write(INTERRUPT_B_ENABLE, interrupt_b_enable);
		369	}
		370	}
		371
		372	/*****************************************************************************
		373	* void TIM_bufferedEventCounting(BYTE counter, BYTE source, BYTE gate, *
		374	* BYTE cumulative, DWORD in) *
		375	----------------------------------------------------------------------------
		376	* Like previous function performs an event counting but saves into Hardware *
		377	* save registers counter value when gate is enabled. *
		378	* if parameter cumulative is 0 every activation of gate makes counter *
		379	* resetting and starting from 0 the new count. If parameter is 1 the counting*
		380	* is cumulative and counter doesn't reset. *
		381	*****************************************************************************/
		382	void TIM_bufferedEventCounting(BYTE counter, BYTE source, BYTE gate,
		383	BYTE cumulative, DWORD in)
		384	{
		385	in &= 0x00FFFFFF;
		386	if(counter == C0){
		387	clr(g0_mode, 7);
		388	DAQ_STC_Windowed_Mode_Write(G0_MODE, g0_mode);
		389	DAQ_STC_Windowed_Mode_Write(G0_LOAD_A_LO, (WORD)in);
		390	DAQ_STC_Windowed_Mode_Write(G0_LOAD_A_HI, (WORD)(in >> 16));
		391
		392	set(g0_command, 2);
		393	DAQ_STC_Windowed_Mode_Write(G0_COMMAND, g0_command);
		394	clr(g0_command, 2);
		395
		396	g0_input_select &= 0x0003; //reset bits that I'm going to manage
		397
		398	g0_input_select \|= (source & 0x1F) << 2; //Source selected
		399	if(source & 0x20) set(g0_input_select, 15); //Source polarity
		400	else clr(g0_input_select, 15);
		401
		402	g0_input_select \|= (gate & 0x1F) << 7; //Gate selected
		403
		404	/* GI_OR_GATE = 0
		405	GI_GATE_SELECT_LOAD_SOURCE = 0
		406	this bit is 0*/
		407
		408	if(source & 0x40) set(g0_input_select, 14);
		409	else clr(g0_input_select, 14);
		410
		411	g0_mode &= 0x0080;
		412	if(gate & 0x20) set(g0_mode, 13);
		413	else clr(g0_mode, 13);
		414
		415	g0_mode \|= (gate & 0xC0) << 2;
		416	g0_mode \|= 0x0011;
		417
		418	set(g0_mode, 15);
		419
		420	if(!cumulative)
		421	set(g0_mode, 14);
		422
		423	g0_mode \|= 0x001A;
		424
		425	g0_command &= 0xE79F;
		426	if(source & 0x80) set(g0_command, 5);
		427
		428	interrupt_a_enable &= 0xFEBF;
		429	set(interrupt_a_enable, 8);
		430
		431	DAQ_STC_Windowed_Mode_Write(G0_INPUT_SELECT, g0_input_select);
		432	DAQ_STC_Windowed_Mode_Write(G0_MODE, g0_mode);
		433	DAQ_STC_Windowed_Mode_Write(G0_COMMAND, g0_command);
		434	DAQ_STC_Windowed_Mode_Write(INTERRUPT_A_ENABLE, interrupt_a_enable);
		435	} else {
		436	clr(g1_mode, 7);
		437	DAQ_STC_Windowed_Mode_Write(G1_MODE, g1_mode);
		438	DAQ_STC_Windowed_Mode_Write(G1_LOAD_A_LO, (WORD)in);
		439	DAQ_STC_Windowed_Mode_Write(G1_LOAD_A_HI, (WORD)(in >> 16));
		440
		441	set(g1_command, 2);
		442	DAQ_STC_Windowed_Mode_Write(G1_COMMAND, g1_command);
		443	clr(g1_command, 2);
		444
		445	g1_input_select &= 0x0003; //reset bits that I'm going to manage
		446
		447	g1_input_select \|= (source & 0x1F) << 2; //Source selected
		448	if(source & 0x20) set(g1_input_select, 15); //Source polarity
		449	else clr(g1_input_select, 15);
		450
		451	g1_input_select \|= (gate & 0x1F) << 7; //Gate selected
		452
		453	/* GI_OR_GATE = 0
		454	GI_GATE_SELECT_LOAD_SOURCE = 0
		455	this bit is 0*/
		456
		457	if(source & 0x40) set(g1_input_select, 14);
		458	else clr(g1_input_select, 14);
		459
		460	g1_mode &= 0x0080;
		461	if(gate & 0x20) set(g1_mode, 13);
		462	else clr(g1_mode, 13);
		463
		464	g1_mode \|= (gate & 0xC0) << 2;
		465	g1_mode \|= 0x0011;
		466
		467	set(g1_mode, 15);
		468
		469	if(!cumulative)
		470	set(g1_mode, 14);
		471
		472	g1_mode \|= 0x001A;
		473
		474	g1_command &= 0xE79F;
		475	if(source & 0x80) set(g1_command, 5);
		476
		477	interrupt_b_enable &= 0xFEBF;
		478	set(interrupt_b_enable, 8);
		479
		480	DAQ_STC_Windowed_Mode_Write(G1_INPUT_SELECT, g1_input_select);
		481	DAQ_STC_Windowed_Mode_Write(G1_MODE, g1_mode);
		482	DAQ_STC_Windowed_Mode_Write(G1_COMMAND, g1_command);
		483	DAQ_STC_Windowed_Mode_Write(INTERRUPT_B_ENABLE, interrupt_b_enable);
		484	}
		485	}
		486
		487	/*****************************************************************************
		488	* void TIM_timeMeasurement(BYTE counter, BYTE source, BYTE, gate, BYTE type *
		489	* BYTE itr, DWORD in) *
		490	----------------------------------------------------------------------------
		491	* Use this function to perform a single period or a single pulsewidth *
		492	* measurement. Parameters "counter source gate and in" are equal to previous *
		493	* function so watch above. *
		494	* Other parameters: type: specifies type of measure: (0)single period *
		495	* (1)pulsewidth *
		496	* itr: specifies which interrupt events enable: *
		497	* bit 0 enable TC event *
		498	* bit 1 enable gate event *
		499	*****************************************************************************/
		500	void TIM_timeMeasurement(BYTE counter, BYTE source, BYTE gate, BYTE type,
		501	BYTE itr, DWORD in)
		502	{
		503	if(counter == C0){
		504	clr(g0_mode, 7);
		505	DAQ_STC_Windowed_Mode_Write(G0_MODE, g0_mode);
		506	DAQ_STC_Windowed_Mode_Write(G0_LOAD_A_LO, (WORD)in);
		507	DAQ_STC_Windowed_Mode_Write(G0_LOAD_A_HI, (WORD)(in >> 16));
		508
		509	set(g0_command, 2);
		510	DAQ_STC_Windowed_Mode_Write(G0_COMMAND, g0_command);
		511	clr(g0_command, 2);
		512
		513	g0_input_select &= 0x0003;
		514
		515	g0_input_select \|= (source & 0x1F) << 2;
		516
		517	if(source & 0x20) set(g0_input_select, 15);
		518
		519	g0_input_select \|= (gate & 0x1F) << 7;
		520
		521	if(source & 0x40) set(g0_input_select, 14);
		522
		523	g0_mode &= 0x0080;
		524
		525	if(gate & 0x20) set(g0_mode, 13);
		526
		527	g0_mode \|= ((WORD)gate & 0x00C0) << 2;
		528
		529	if(!type) g0_mode \|= 0x8802;
		530	else g0_mode \|= 0x4811;
		531
		532	g0_command &= 0xE79F;
		533	set(g0_command, 5);
		534
		535	interrupt_a_enable &= 0xFEBF;
		536	if(itr & 0x01) set(interrupt_a_enable, 6);
		537	if(itr & 0x02) set(interrupt_a_enable, 8);
		538
		539	DAQ_STC_Windowed_Mode_Write(G0_INPUT_SELECT, g0_input_select);
		540	DAQ_STC_Windowed_Mode_Write(G0_MODE, g0_mode);
		541	DAQ_STC_Windowed_Mode_Write(G0_COMMAND, g0_command);
		542	DAQ_STC_Windowed_Mode_Write(INTERRUPT_A_ENABLE, interrupt_a_enable);
		543	} else {
		544	clr(g1_mode, 7);
		545	DAQ_STC_Windowed_Mode_Write(G1_MODE, g1_mode);
		546	DAQ_STC_Windowed_Mode_Write(G1_LOAD_A_LO, (WORD)in);
		547	DAQ_STC_Windowed_Mode_Write(G1_LOAD_A_HI, (WORD)(in >> 16));
		548
		549	set(g1_command, 2);
		550	DAQ_STC_Windowed_Mode_Write(G1_COMMAND, g1_command);
		551	clr(g1_command, 2);
		552
		553	g1_input_select &= 0x0003;
		554
		555	g1_input_select \|= (source & 0x1F) << 2;
		556
		557	if(source & 0x20) set(g1_input_select, 15);
		558
		559	g1_input_select \|= (gate & 0x1F) << 7;
		560
		561	if(source & 0x40) set(g1_input_select, 14);
		562
		563	g1_mode &= 0x0080;
		564
		565	if(gate & 0x20) set(g1_mode, 13);
		566
		567	g1_mode \|= ((WORD)gate & 0x00C0) << 2;
		568
		569	if(!type) g1_mode \|= 0x8802;
		570	else g1_mode \|= 0x4811;
		571
		572	g1_command &= 0xE79F;
		573	set(g1_command, 5);
		574
		575	interrupt_b_enable &= 0xF9FF;
		576	if(itr & 0x01) set(interrupt_a_enable, 9);
		577	if(itr & 0x02) set(interrupt_a_enable, 10);
		578
		579	DAQ_STC_Windowed_Mode_Write(G1_INPUT_SELECT, g1_input_select);
		580	DAQ_STC_Windowed_Mode_Write(G1_MODE, g1_mode);
		581	DAQ_STC_Windowed_Mode_Write(G1_COMMAND, g1_command);
		582	DAQ_STC_Windowed_Mode_Write(INTERRUPT_B_ENABLE, interrupt_b_enable);
		583
		584	}
		585	}
		586
		587	/*****************************************************************************
		588	* void TIM_bufferedTimeMeasurement(BYTE counter, BYTE source, BYTE gate, *
		589	* BYTE type, DWORD in) *
		590	----------------------------------------------------------------------------
		591	* Use this function to perform a period or semiperiod or pulsewidth multiple *
		592	* measurement. Refer to DAQ-STC technical reference manual to understand what*
		593	* are this kind of measurement. See above TIM_eventCounting for parameters *
		594	* counter, source, gate, in. *
		595	* Parameter type: type of buffered measurement: (0)period *
		596	* (1)semiperiod *
		597	* (2)pulsewidth *
		598	*****************************************************************************/
		599	void TIM_bufferedTimeMeasurement(BYTE counter, BYTE source, BYTE gate,
		600	BYTE type, DWORD in)
		601	{
		602	if(counter == C0){
		603	clr(g0_mode, 7);
		604	DAQ_STC_Windowed_Mode_Write(G0_MODE, g0_mode);
		605	DAQ_STC_Windowed_Mode_Write(G0_LOAD_A_LO, (WORD)in);
		606	DAQ_STC_Windowed_Mode_Write(G0_LOAD_A_HI, (WORD)(in >> 16));
		607
		608	set(g0_command, 2);
		609	DAQ_STC_Windowed_Mode_Write(G0_COMMAND, g0_command);
		610	clr(g0_command, 2);
		611
		612	g0_input_select &= 0x0003;
		613
		614	g0_input_select \|= (source & 0x1F) << 2;
		615
		616	if(source & 0x20) set(g0_input_select, 15);
		617
		618	g0_input_select \|= (gate & 0x1F) << 7;
		619
		620	if(source & 0x40) set(g0_input_select, 14);
		621
		622	g0_mode &= 0x0080;
		623
		624	if(gate & 0x20) set(g0_mode, 13);
		625
		626	g0_mode \|= ((WORD)gate & 0x00C0) << 2;
		627
		628	switch(type){
		629	case 0: g0_mode \|= 0x401A; break;
		630	case 1: g0_mode \|= 0x401F; break;
		631	case 2: g0_mode \|= 0x4019; break;
		632	default: g0_mode \|= 0x401A; break;
		633	}
		634
		635	g0_command &= 0xE79F;
		636	set(g0_command, 5);
		637
		638	interrupt_a_enable &= 0xFEBF;
		639	set(interrupt_a_enable, 8);
		640
		641	DAQ_STC_Windowed_Mode_Write(G0_INPUT_SELECT, g0_input_select);
		642	DAQ_STC_Windowed_Mode_Write(G0_MODE, g0_mode);
		643	DAQ_STC_Windowed_Mode_Write(G0_COMMAND, g0_command);
		644	DAQ_STC_Windowed_Mode_Write(INTERRUPT_A_ENABLE, interrupt_a_enable);
		645	} else {
		646	clr(g1_mode, 7);
		647	DAQ_STC_Windowed_Mode_Write(G1_MODE, g1_mode);
		648	DAQ_STC_Windowed_Mode_Write(G1_LOAD_A_LO, (WORD)in);
		649	DAQ_STC_Windowed_Mode_Write(G1_LOAD_A_HI, (WORD)(in >> 16));
		650
		651	set(g1_command, 2);
		652	DAQ_STC_Windowed_Mode_Write(G1_COMMAND, g1_command);
		653	clr(g1_command, 2);
		654
		655	g1_input_select &= 0x0003;
		656
		657	g1_input_select \|= (source & 0x1F) << 2;
		658
		659	if(source & 0x20) set(g1_input_select, 15);
		660
		661	g1_input_select \|= (gate & 0x1F) << 7;
		662
		663	if(source & 0x40) set(g1_input_select, 14);
		664
		665	g1_mode &= 0x0080;
		666
		667	if(gate & 0x20) set(g1_mode, 13);
		668
		669	g1_mode \|= ((WORD)gate & 0x00C0) << 2;
		670
		671	switch(type){
		672	case 0: g1_mode \|= 0x401A; break;
		673	case 1: g1_mode \|= 0x401F; break;
		674	case 2: g1_mode \|= 0x4019; break;
		675	default: g1_mode \|= 0x401A; break;
		676	}
		677
		678	g1_command &= 0xE79F;
		679	set(g1_command, 5);
		680
		681	interrupt_b_enable &= 0xF9FF;
		682	set(interrupt_a_enable, 10);
		683
		684	DAQ_STC_Windowed_Mode_Write(G1_INPUT_SELECT, g1_input_select);
		685	DAQ_STC_Windowed_Mode_Write(G1_MODE, g1_mode);
		686	DAQ_STC_Windowed_Mode_Write(G1_COMMAND, g1_command);
		687	DAQ_STC_Windowed_Mode_Write(INTERRUPT_B_ENABLE, interrupt_b_enable);
		688	}
		689	}
		690	/* End of file: Timer.c */

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(root)/shark/trunk/drivers/pci6025e/tim/timer.c - Rev 3