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2 pj 1
/* Project:     OSLib
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 * Description: The OS Construction Kit
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 * Date:                1.6.2000
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 * Idea by:             Luca Abeni & Gerardo Lamastra
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 *
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 * OSLib is an SO project aimed at developing a common, easy-to-use
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 * low-level infrastructure for developing OS kernels and Embedded
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 * Applications; it partially derives from the HARTIK project but it
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 * currently is independently developed.
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 *
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 * OSLib is distributed under GPL License, and some of its code has
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 * been derived from the Linux kernel source; also some important
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 * ideas come from studying the DJGPP go32 extender.
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 *
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 * We acknowledge the Linux Community, Free Software Foundation,
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 * D.J. Delorie and all the other developers who believe in the
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 * freedom of software and ideas.
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 *
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 * For legalese, check out the included GPL license.
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 */
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/*      Xlib initialization code        */
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#include <ll/i386/mem.h>
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#include <ll/i386/cons.h>
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#include <ll/i386/mb-info.h>
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#include <ll/i386/error.h>
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#include <ll/i386/pit.h>
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#include <ll/i386/pic.h>
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#include <ll/i386/tss-ctx.h>
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#include <ll/i386/hw-arch.h>
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FILE(X-Init);
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extern DWORD ll_irq_table[256];
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#ifdef __VIRCSW__
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int activeInt = 0;
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#endif
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/* Assembly external routines!      */
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/* Setup the TR register of the 80386, to initialize context switch */
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extern void init_TR(WORD v);
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TSS main_tss;
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/* Architecture definition */
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LL_ARCH ll_arch;
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40 pj 51
/* The following stuff is in llCxA.Asm/S    */
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static void dummyfun(int i)
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{
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#if 0
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  if (i < 32) {
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    cputs("Unhandled Exc occured!!!\n");
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  } else {
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    cputs("Unhandled Int occured!!!\n");
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  }
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#else
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  message("Unhandled Exc or Int %d occured!!!\n", i);
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#endif
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  halt();
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}
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void l1_int_bind(int i, void *f)
2 pj 68
{
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  ll_irq_table[i] = (DWORD)f;
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}
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void *l1_init(void)
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{
40 pj 74
  register int i;
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  struct ll_cpuInfo cpuInfo;
648 mauro 76
  extern unsigned char X86_apic;
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  extern unsigned char X86_tsc;
40 pj 78
  extern BYTE X86_fpu;
619 mauro 79
  LIN_ADDR b;
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  for(i = 0; i < 256; i++) {
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    ll_irq_table[i] = (DWORD)dummyfun;
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  }
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  X86_get_CPU(&cpuInfo);
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  X86_get_FPU();
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  ll_arch.x86.arch = __LL_ARCH__;
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  ll_arch.x86.cpu = cpuInfo.X86_cpu;
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  ll_arch.x86.fpu = X86_fpu;
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  memcpy(&(ll_arch.x86.vendor), &(cpuInfo.X86_vendor_1), 12);
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704 giacomo 92
  X86_apic = (cpuInfo.X86_StandardFeature>>9) & 1;
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  X86_tsc  = (cpuInfo.X86_StandardFeature>>4) & 1;
619 mauro 94
 
40 pj 95
  /* TODO! Need to map featuresXXX & Signature onto ll_arch!  */
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  /* TODO! Need to check for CPU bugs!!           */
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#ifdef __LL_DEBUG__
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  message("LL Architecture: %s\n", __LL_ARCH__);
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  message("CPU : %u\nFPU : %u\n", cpuInfo.X86_cpu, X86_fpu);
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  message("Signature : 0x%lx\nVendor: %s\n", cpuInfo.X86_signature,
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          ll_arch.x86.vendor);
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  message("Features #1: 0x%lx\n", cpuInfo.X86_IntelFeature_1);
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  message("Features #2: 0x%lx\n", cpuInfo.X86_IntelFeature_2);
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  message("Features #3: 0x%lx\n", cpuInfo.X86_StandardFeature);
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  message("Has APIC: %s\n", X86_apic);
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  message("Has TSC: %s\n", X86_tsc);
40 pj 108
#endif /* __LL_DEBUG__ */
619 mauro 109
 
40 pj 110
  IDT_init();
2 pj 111
 
40 pj 112
  /* Init coprocessor & assign it to main() */
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  /* OK... Now I know the sense of all this... :
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     We need a initial value for the FPU context (to be used for creating
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     new FPU contexts, as init value)...
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     ... And we get it in this strange way!!!!
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  */
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  reset_fpu();
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  init_fpu();
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  /* Init PIC controllers & unmask timer */
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  PIC_init();
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  /* Set the TR initial value */
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  b = (LIN_ADDR)(&main_tss);
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  GDT_place(MAIN_SEL, (DWORD)b, sizeof(TSS), FREE_TSS386, GRAN_16);
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  init_TR(MAIN_SEL);
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  return mbi_address();
2 pj 130
}
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void l1_end(void)
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{
40 pj 135
  outp(0x21,0xFF);
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  outp(0xA1,0xFF);
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  /* Back to DOS settings */
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  PIC_end();
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  /* Reset the timer chip according DOS specification */
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  /* Mode: Binary/Mode 3/16 bit Time_const/Counter 0 */
2 pj 141
#if 0
40 pj 142
  outp(0x43,0x36);
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  /* Time_const = 65536; write 0 in CTR */
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  outp(0x40,0);
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  outp(0x40,0);
2 pj 146
#endif
40 pj 147
  pit_init(0, TMR_MD3, 0);    /* Timer 0, Mode 3, Time constant 0 */
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  if(ll_arch.x86.cpu > 4) {    
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    pit_init(1, TMR_MD2, 18);
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  } else {
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    pit_init(2, TMR_MD0, 0);
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    outp(0x61, 0);              /* Stop channel 2 */
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  }
2 pj 154
}