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309 giacomo 1
# S.Ha.R.K. Setup File
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#
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# Oslib Configuration
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#
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# Enable the system time computation through TSC register
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# Only Pentium or higher CPU class
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TSC = TRUE
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# Enable timer interrupt through P6 APIC instead of PIT
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# Only P6 or higher CPU class, TSC support must be enabled
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APIC = FALSE
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#Enable Read Timer Optimization
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#TIMER_OPT = 1000 (For CPU < 1 GHz          - Wraparound 585 years)
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#TIMER_OPT = 2000 (For 1 GHz < CPU < 2 GHz  - Wraparound 146 years)
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#TIMER_OPT = 4000 (For 2 GHz < CPU < 4 GHz  - Wraparound  36 years)
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#TIMER_OPT = 8000 (For CPU < 8 GHz          - Wraparound 292 years)
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TIMER_OPT = 8000
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