106,7 → 106,7 |
/* Read and save chipset-specific registers */ |
static int vesa_saveregs(uint8_t regs[]) |
{ |
void * buf; |
/*void * buf; |
buf=LRMI_mem1; |
vesa_r.eax=0x4f04; |
vesa_r.ebx=0; |
115,7 → 115,7 |
vesa_r.ecx=__svgalib_VESA_savebitmap; |
__svgalib_LRMI_int(0x10,&vesa_r); |
memcpy(®s[VGA_TOTAL_REGS],buf,vesa_regs_size); |
return vesa_regs_size; |
return vesa_regs_size;*/ |
} |
|
/* Set chipset-specific registers */ |
123,7 → 123,7 |
static void vesa_setregs(const uint8_t regs[], int mode) |
{ |
|
void * buf; |
/*void * bufe |
buf=LRMI_mem1; |
memcpy(buf,®s[VGA_TOTAL_REGS],vesa_regs_size); |
vesa_r.eax=0x4f04; |
131,7 → 131,7 |
vesa_r.es=((long)buf)>>4; |
vesa_r.edx=2; |
vesa_r.ecx=__svgalib_VESA_savebitmap; |
__svgalib_LRMI_int(0x10,&vesa_r); |
__svgalib_LRMI_int(0x10,&vesa_r);*/ |
} |
|
|
536,12 → 536,12 |
#endif |
mode_list++; |
}; |
vesa_r.eax=0x4f04; |
/*vesa_r.eax=0x4f04; |
vesa_r.edx=0; |
vesa_r.ecx=__svgalib_VESA_savebitmap; |
vesa_r.ebx=0; |
__svgalib_LRMI_int(0x10,&vesa_r); |
vesa_regs_size=vesa_r.ebx*64; |
vesa_regs_size=vesa_r.ebx*64;*/ |
__svgalib_LRMI_free_real(vesa_data.info,sizeof(struct vbe_info_block) + sizeof(struct vbe_mode_info_block)); |
|
SVGALIB_VESA[TEXT]=3; |
562,7 → 562,7 |
cardspecs->matchProgrammableClock=vesa_match_programmable_clock; |
__svgalib_driverspecs = &__svgalib_vesa_driverspecs; |
|
LRMI_mem1 = __svgalib_LRMI_alloc_real(vesa_regs_size); |
//LRMI_mem1 = __svgalib_LRMI_alloc_real(vesa_regs_size); |
LRMI_mem2 = __svgalib_LRMI_alloc_real(sizeof(struct vbe_info_block) |
+ sizeof(struct vbe_mode_info_block)); |
|