/shark/trunk/drivers/linuxc26/include/linux/dvb/frontend.h |
---|
0,0 → 1,260 |
/* |
* frontend.h |
* |
* Copyright (C) 2000 Marcus Metzler <marcus@convergence.de> |
* Ralph Metzler <ralph@convergence.de> |
* Holger Waechtler <holger@convergence.de> |
* Andre Draszik <ad@convergence.de> |
* for convergence integrated media GmbH |
* |
* This program is free software; you can redistribute it and/or |
* modify it under the terms of the GNU Lesser General Public License |
* as published by the Free Software Foundation; either version 2.1 |
* of the License, or (at your option) any later version. |
* |
* This program is distributed in the hope that it will be useful, |
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
* GNU General Public License for more details. |
* |
* You should have received a copy of the GNU Lesser General Public License |
* along with this program; if not, write to the Free Software |
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
* |
*/ |
#ifndef _DVBFRONTEND_H_ |
#define _DVBFRONTEND_H_ |
#include <asm/types.h> |
typedef enum fe_type { |
FE_QPSK, |
FE_QAM, |
FE_OFDM |
} fe_type_t; |
typedef enum fe_caps { |
FE_IS_STUPID = 0, |
FE_CAN_INVERSION_AUTO = 0x1, |
FE_CAN_FEC_1_2 = 0x2, |
FE_CAN_FEC_2_3 = 0x4, |
FE_CAN_FEC_3_4 = 0x8, |
FE_CAN_FEC_4_5 = 0x10, |
FE_CAN_FEC_5_6 = 0x20, |
FE_CAN_FEC_6_7 = 0x40, |
FE_CAN_FEC_7_8 = 0x80, |
FE_CAN_FEC_8_9 = 0x100, |
FE_CAN_FEC_AUTO = 0x200, |
FE_CAN_QPSK = 0x400, |
FE_CAN_QAM_16 = 0x800, |
FE_CAN_QAM_32 = 0x1000, |
FE_CAN_QAM_64 = 0x2000, |
FE_CAN_QAM_128 = 0x4000, |
FE_CAN_QAM_256 = 0x8000, |
FE_CAN_QAM_AUTO = 0x10000, |
FE_CAN_TRANSMISSION_MODE_AUTO = 0x20000, |
FE_CAN_BANDWIDTH_AUTO = 0x40000, |
FE_CAN_GUARD_INTERVAL_AUTO = 0x80000, |
FE_CAN_HIERARCHY_AUTO = 0x100000, |
FE_CAN_RECOVER = 0x20000000, |
FE_CAN_CLEAN_SETUP = 0x40000000, |
FE_CAN_MUTE_TS = 0x80000000 |
} fe_caps_t; |
struct dvb_frontend_info { |
char name[128]; |
fe_type_t type; |
__u32 frequency_min; |
__u32 frequency_max; |
__u32 frequency_stepsize; |
__u32 frequency_tolerance; |
__u32 symbol_rate_min; |
__u32 symbol_rate_max; |
__u32 symbol_rate_tolerance; /* ppm */ |
__u32 notifier_delay; /* ms */ |
fe_caps_t caps; |
}; |
/** |
* Check out the DiSEqC bus spec available on http://www.eutelsat.org/ for |
* the meaning of this struct... |
*/ |
struct dvb_diseqc_master_cmd { |
__u8 msg [6]; /* { framing, address, command, data [3] } */ |
__u8 msg_len; /* valid values are 3...6 */ |
}; |
struct dvb_diseqc_slave_reply { |
__u8 msg [4]; /* { framing, data [3] } */ |
__u8 msg_len; /* valid values are 0...4, 0 means no msg */ |
int timeout; /* return from ioctl after timeout ms with */ |
}; /* errorcode when no message was received */ |
typedef enum fe_sec_voltage { |
SEC_VOLTAGE_13, |
SEC_VOLTAGE_18, |
SEC_VOLTAGE_OFF |
} fe_sec_voltage_t; |
typedef enum fe_sec_tone_mode { |
SEC_TONE_ON, |
SEC_TONE_OFF |
} fe_sec_tone_mode_t; |
typedef enum fe_sec_mini_cmd { |
SEC_MINI_A, |
SEC_MINI_B |
} fe_sec_mini_cmd_t; |
typedef enum fe_status { |
FE_HAS_SIGNAL = 0x01, /* found something above the noise level */ |
FE_HAS_CARRIER = 0x02, /* found a DVB signal */ |
FE_HAS_VITERBI = 0x04, /* FEC is stable */ |
FE_HAS_SYNC = 0x08, /* found sync bytes */ |
FE_HAS_LOCK = 0x10, /* everything's working... */ |
FE_TIMEDOUT = 0x20, /* no lock within the last ~2 seconds */ |
FE_REINIT = 0x40 /* frontend was reinitialized, */ |
} fe_status_t; /* application is recommended to reset */ |
/* DiSEqC, tone and parameters */ |
typedef enum fe_spectral_inversion { |
INVERSION_OFF, |
INVERSION_ON, |
INVERSION_AUTO |
} fe_spectral_inversion_t; |
typedef enum fe_code_rate { |
FEC_NONE = 0, |
FEC_1_2, |
FEC_2_3, |
FEC_3_4, |
FEC_4_5, |
FEC_5_6, |
FEC_6_7, |
FEC_7_8, |
FEC_8_9, |
FEC_AUTO |
} fe_code_rate_t; |
typedef enum fe_modulation { |
QPSK, |
QAM_16, |
QAM_32, |
QAM_64, |
QAM_128, |
QAM_256, |
QAM_AUTO |
} fe_modulation_t; |
typedef enum fe_transmit_mode { |
TRANSMISSION_MODE_2K, |
TRANSMISSION_MODE_8K, |
TRANSMISSION_MODE_AUTO |
} fe_transmit_mode_t; |
typedef enum fe_bandwidth { |
BANDWIDTH_8_MHZ, |
BANDWIDTH_7_MHZ, |
BANDWIDTH_6_MHZ, |
BANDWIDTH_AUTO |
} fe_bandwidth_t; |
typedef enum fe_guard_interval { |
GUARD_INTERVAL_1_32, |
GUARD_INTERVAL_1_16, |
GUARD_INTERVAL_1_8, |
GUARD_INTERVAL_1_4, |
GUARD_INTERVAL_AUTO |
} fe_guard_interval_t; |
typedef enum fe_hierarchy { |
HIERARCHY_NONE, |
HIERARCHY_1, |
HIERARCHY_2, |
HIERARCHY_4, |
HIERARCHY_AUTO |
} fe_hierarchy_t; |
struct dvb_qpsk_parameters { |
__u32 symbol_rate; /* symbol rate in Symbols per second */ |
fe_code_rate_t fec_inner; /* forward error correction (see above) */ |
}; |
struct dvb_qam_parameters { |
__u32 symbol_rate; /* symbol rate in Symbols per second */ |
fe_code_rate_t fec_inner; /* forward error correction (see above) */ |
fe_modulation_t modulation; /* modulation type (see above) */ |
}; |
struct dvb_ofdm_parameters { |
fe_bandwidth_t bandwidth; |
fe_code_rate_t code_rate_HP; /* high priority stream code rate */ |
fe_code_rate_t code_rate_LP; /* low priority stream code rate */ |
fe_modulation_t constellation; /* modulation type (see above) */ |
fe_transmit_mode_t transmission_mode; |
fe_guard_interval_t guard_interval; |
fe_hierarchy_t hierarchy_information; |
}; |
struct dvb_frontend_parameters { |
__u32 frequency; /* (absolute) frequency in Hz for QAM/OFDM */ |
/* intermediate frequency in kHz for QPSK */ |
fe_spectral_inversion_t inversion; |
union { |
struct dvb_qpsk_parameters qpsk; |
struct dvb_qam_parameters qam; |
struct dvb_ofdm_parameters ofdm; |
} u; |
}; |
struct dvb_frontend_event { |
fe_status_t status; |
struct dvb_frontend_parameters parameters; |
}; |
#define FE_GET_INFO _IOR('o', 61, struct dvb_frontend_info) |
#define FE_DISEQC_RESET_OVERLOAD _IO('o', 62) |
#define FE_DISEQC_SEND_MASTER_CMD _IOW('o', 63, struct dvb_diseqc_master_cmd) |
#define FE_DISEQC_RECV_SLAVE_REPLY _IOR('o', 64, struct dvb_diseqc_slave_reply) |
#define FE_DISEQC_SEND_BURST _IO('o', 65) /* fe_sec_mini_cmd_t */ |
#define FE_SET_TONE _IO('o', 66) /* fe_sec_tone_mode_t */ |
#define FE_SET_VOLTAGE _IO('o', 67) /* fe_sec_voltage_t */ |
#define FE_ENABLE_HIGH_LNB_VOLTAGE _IO('o', 68) /* int */ |
#define FE_READ_STATUS _IOR('o', 69, fe_status_t) |
#define FE_READ_BER _IOR('o', 70, __u32) |
#define FE_READ_SIGNAL_STRENGTH _IOR('o', 71, __u16) |
#define FE_READ_SNR _IOR('o', 72, __u16) |
#define FE_READ_UNCORRECTED_BLOCKS _IOR('o', 73, __u32) |
#define FE_SET_FRONTEND _IOW('o', 76, struct dvb_frontend_parameters) |
#define FE_GET_FRONTEND _IOR('o', 77, struct dvb_frontend_parameters) |
#define FE_GET_EVENT _IOR('o', 78, struct dvb_frontend_event) |
#endif /*_DVBFRONTEND_H_*/ |
/shark/trunk/drivers/linuxc26/include/linux/dvb/audio.h |
---|
0,0 → 1,125 |
/* |
* audio.h |
* |
* Copyright (C) 2000 Ralph Metzler <ralph@convergence.de> |
* & Marcus Metzler <marcus@convergence.de> |
for convergence integrated media GmbH |
* |
* This program is free software; you can redistribute it and/or |
* modify it under the terms of the GNU General Lesser Public License |
* as published by the Free Software Foundation; either version 2.1 |
* of the License, or (at your option) any later version. |
* |
* This program is distributed in the hope that it will be useful, |
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
* GNU General Public License for more details. |
* |
* You should have received a copy of the GNU Lesser General Public License |
* along with this program; if not, write to the Free Software |
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
* |
*/ |
#ifndef _DVBAUDIO_H_ |
#define _DVBAUDIO_H_ |
#ifdef __KERNEL__ |
#include <linux/types.h> |
#else |
#include <stdint.h> |
#endif |
typedef enum { |
AUDIO_SOURCE_DEMUX, /* Select the demux as the main source */ |
AUDIO_SOURCE_MEMORY /* Select internal memory as the main source */ |
} audio_stream_source_t; |
typedef enum { |
AUDIO_STOPPED, /* Device is stopped */ |
AUDIO_PLAYING, /* Device is currently playing */ |
AUDIO_PAUSED /* Device is paused */ |
} audio_play_state_t; |
typedef enum { |
AUDIO_STEREO, |
AUDIO_MONO_LEFT, |
AUDIO_MONO_RIGHT |
} audio_channel_select_t; |
typedef struct audio_mixer { |
unsigned int volume_left; |
unsigned int volume_right; |
// what else do we need? bass, pass-through, ... |
} audio_mixer_t; |
typedef struct audio_status { |
int AV_sync_state; /* sync audio and video? */ |
int mute_state; /* audio is muted */ |
audio_play_state_t play_state; /* current playback state */ |
audio_stream_source_t stream_source; /* current stream source */ |
audio_channel_select_t channel_select; /* currently selected channel */ |
int bypass_mode; /* pass on audio data to */ |
audio_mixer_t mixer_state; /* current mixer state */ |
} audio_status_t; /* separate decoder hardware */ |
typedef |
struct audio_karaoke{ /* if Vocal1 or Vocal2 are non-zero, they get mixed */ |
int vocal1; /* into left and right t at 70% each */ |
int vocal2; /* if both, Vocal1 and Vocal2 are non-zero, Vocal1 gets*/ |
int melody; /* mixed into the left channel and */ |
/* Vocal2 into the right channel at 100% each. */ |
/* if Melody is non-zero, the melody channel gets mixed*/ |
} audio_karaoke_t; /* into left and right */ |
typedef uint16_t audio_attributes_t; |
/* bits: descr. */ |
/* 15-13 audio coding mode (0=ac3, 2=mpeg1, 3=mpeg2ext, 4=LPCM, 6=DTS, */ |
/* 12 multichannel extension */ |
/* 11-10 audio type (0=not spec, 1=language included) */ |
/* 9- 8 audio application mode (0=not spec, 1=karaoke, 2=surround) */ |
/* 7- 6 Quantization / DRC (mpeg audio: 1=DRC exists)(lpcm: 0=16bit, */ |
/* 5- 4 Sample frequency fs (0=48kHz, 1=96kHz) */ |
/* 2- 0 number of audio channels (n+1 channels) */ |
/* for GET_CAPABILITIES and SET_FORMAT, the latter should only set one bit */ |
#define AUDIO_CAP_DTS 1 |
#define AUDIO_CAP_LPCM 2 |
#define AUDIO_CAP_MP1 4 |
#define AUDIO_CAP_MP2 8 |
#define AUDIO_CAP_MP3 16 |
#define AUDIO_CAP_AAC 32 |
#define AUDIO_CAP_OGG 64 |
#define AUDIO_CAP_SDDS 128 |
#define AUDIO_CAP_AC3 256 |
#define AUDIO_STOP _IO('o', 1) |
#define AUDIO_PLAY _IO('o', 2) |
#define AUDIO_PAUSE _IO('o', 3) |
#define AUDIO_CONTINUE _IO('o', 4) |
#define AUDIO_SELECT_SOURCE _IO('o', 5) |
#define AUDIO_SET_MUTE _IO('o', 6) |
#define AUDIO_SET_AV_SYNC _IO('o', 7) |
#define AUDIO_SET_BYPASS_MODE _IO('o', 8) |
#define AUDIO_CHANNEL_SELECT _IO('o', 9) |
#define AUDIO_GET_STATUS _IOR('o', 10, audio_status_t) |
#define AUDIO_GET_CAPABILITIES _IOR('o', 11, unsigned int) |
#define AUDIO_CLEAR_BUFFER _IO('o', 12) |
#define AUDIO_SET_ID _IO('o', 13) |
#define AUDIO_SET_MIXER _IOW('o', 14, audio_mixer_t) |
#define AUDIO_SET_STREAMTYPE _IO('o', 15) |
#define AUDIO_SET_EXT_ID _IO('o', 16) |
#define AUDIO_SET_ATTRIBUTES _IOW('o', 17, audio_attributes_t) |
#define AUDIO_SET_KARAOKE _IOW('o', 18, audio_karaoke_t) |
#endif /* _DVBAUDIO_H_ */ |
/shark/trunk/drivers/linuxc26/include/linux/dvb/ca.h |
---|
0,0 → 1,91 |
/* |
* ca.h |
* |
* Copyright (C) 2000 Ralph Metzler <ralph@convergence.de> |
* & Marcus Metzler <marcus@convergence.de> |
for convergence integrated media GmbH |
* |
* This program is free software; you can redistribute it and/or |
* modify it under the terms of the GNU General Lesser Public License |
* as published by the Free Software Foundation; either version 2.1 |
* of the License, or (at your option) any later version. |
* |
* This program is distributed in the hope that it will be useful, |
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
* GNU General Public License for more details. |
* |
* You should have received a copy of the GNU Lesser General Public License |
* along with this program; if not, write to the Free Software |
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
* |
*/ |
#ifndef _DVBCA_H_ |
#define _DVBCA_H_ |
/* slot interface types and info */ |
typedef struct ca_slot_info { |
int num; /* slot number */ |
int type; /* CA interface this slot supports */ |
#define CA_CI 1 /* CI high level interface */ |
#define CA_CI_LINK 2 /* CI link layer level interface */ |
#define CA_CI_PHYS 4 /* CI physical layer level interface */ |
#define CA_DESCR 8 /* built-in descrambler */ |
#define CA_SC 128 /* simple smart card interface */ |
unsigned int flags; |
#define CA_CI_MODULE_PRESENT 1 /* module (or card) inserted */ |
#define CA_CI_MODULE_READY 2 |
} ca_slot_info_t; |
/* descrambler types and info */ |
typedef struct ca_descr_info { |
unsigned int num; /* number of available descramblers (keys) */ |
unsigned int type; /* type of supported scrambling system */ |
#define CA_ECD 1 |
#define CA_NDS 2 |
#define CA_DSS 4 |
} ca_descr_info_t; |
typedef struct ca_caps { |
unsigned int slot_num; /* total number of CA card and module slots */ |
unsigned int slot_type; /* OR of all supported types */ |
unsigned int descr_num; /* total number of descrambler slots (keys) */ |
unsigned int descr_type; /* OR of all supported types */ |
} ca_caps_t; |
/* a message to/from a CI-CAM */ |
typedef struct ca_msg { |
unsigned int index; |
unsigned int type; |
unsigned int length; |
unsigned char msg[256]; |
} ca_msg_t; |
typedef struct ca_descr { |
unsigned int index; |
unsigned int parity; /* 0 == even, 1 == odd */ |
unsigned char cw[8]; |
} ca_descr_t; |
typedef struct ca_pid { |
unsigned int pid; |
int index; /* -1 == disable*/ |
} ca_pid_t; |
#define CA_RESET _IO('o', 128) |
#define CA_GET_CAP _IOR('o', 129, ca_caps_t) |
#define CA_GET_SLOT_INFO _IOR('o', 130, ca_slot_info_t) |
#define CA_GET_DESCR_INFO _IOR('o', 131, ca_descr_info_t) |
#define CA_GET_MSG _IOR('o', 132, ca_msg_t) |
#define CA_SEND_MSG _IOW('o', 133, ca_msg_t) |
#define CA_SET_DESCR _IOW('o', 134, ca_descr_t) |
#define CA_SET_PID _IOW('o', 135, ca_pid_t) |
#endif |
/shark/trunk/drivers/linuxc26/include/linux/dvb/version.h |
---|
0,0 → 1,29 |
/* |
* version.h |
* |
* Copyright (C) 2000 Holger Waechtler <holger@convergence.de> |
* for convergence integrated media GmbH |
* |
* This program is free software; you can redistribute it and/or |
* modify it under the terms of the GNU Lesser General Public License |
* as published by the Free Software Foundation; either version 2.1 |
* of the License, or (at your option) any later version. |
* |
* This program is distributed in the hope that it will be useful, |
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
* GNU General Public License for more details. |
* |
* You should have received a copy of the GNU Lesser General Public License |
* along with this program; if not, write to the Free Software |
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
* |
*/ |
#ifndef _DVBVERSION_H_ |
#define _DVBVERSION_H_ |
#define DVB_API_VERSION 3 |
#endif /*_DVBVERSION_H_*/ |
/shark/trunk/drivers/linuxc26/include/linux/dvb/osd.h |
---|
0,0 → 1,111 |
/* |
* osd.h |
* |
* Copyright (C) 2001 Ralph Metzler <ralph@convergence.de> |
* & Marcus Metzler <marcus@convergence.de> |
for convergence integrated media GmbH |
* |
* This program is free software; you can redistribute it and/or |
* modify it under the terms of the GNU General Lesser Public License |
* as published by the Free Software Foundation; either version 2.1 |
* of the License, or (at your option) any later version. |
* |
* This program is distributed in the hope that it will be useful, |
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
* GNU General Public License for more details. |
* |
* You should have received a copy of the GNU Lesser General Public License |
* along with this program; if not, write to the Free Software |
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
* |
*/ |
#ifndef _DVBOSD_H_ |
#define _DVBOSD_H_ |
typedef enum { |
// All functions return -2 on "not open" |
OSD_Close=1, // () |
// Disables OSD and releases the buffers |
// returns 0 on success |
OSD_Open, // (x0,y0,x1,y1,BitPerPixel[2/4/8](color&0x0F),mix[0..15](color&0xF0)) |
// Opens OSD with this size and bit depth |
// returns 0 on success, -1 on DRAM allocation error, -2 on "already open" |
OSD_Show, // () |
// enables OSD mode |
// returns 0 on success |
OSD_Hide, // () |
// disables OSD mode |
// returns 0 on success |
OSD_Clear, // () |
// Sets all pixel to color 0 |
// returns 0 on success |
OSD_Fill, // (color) |
// Sets all pixel to color <col> |
// returns 0 on success |
OSD_SetColor, // (color,R{x0},G{y0},B{x1},opacity{y1}) |
// set palette entry <num> to <r,g,b>, <mix> and <trans> apply |
// R,G,B: 0..255 |
// R=Red, G=Green, B=Blue |
// opacity=0: pixel opacity 0% (only video pixel shows) |
// opacity=1..254: pixel opacity as specified in header |
// opacity=255: pixel opacity 100% (only OSD pixel shows) |
// returns 0 on success, -1 on error |
OSD_SetPalette, // (firstcolor{color},lastcolor{x0},data) |
// Set a number of entries in the palette |
// sets the entries "firstcolor" through "lastcolor" from the array "data" |
// data has 4 byte for each color: |
// R,G,B, and a opacity value: 0->transparent, 1..254->mix, 255->pixel |
OSD_SetTrans, // (transparency{color}) |
// Sets transparency of mixed pixel (0..15) |
// returns 0 on success |
OSD_SetPixel, // (x0,y0,color) |
// sets pixel <x>,<y> to color number <col> |
// returns 0 on success, -1 on error |
OSD_GetPixel, // (x0,y0) |
// returns color number of pixel <x>,<y>, or -1 |
OSD_SetRow, // (x0,y0,x1,data) |
// fills pixels x0,y through x1,y with the content of data[] |
// returns 0 on success, -1 on clipping all pixel (no pixel drawn) |
OSD_SetBlock, // (x0,y0,x1,y1,increment{color},data) |
// fills pixels x0,y0 through x1,y1 with the content of data[] |
// inc contains the width of one line in the data block, |
// inc<=0 uses blockwidth as linewidth |
// returns 0 on success, -1 on clipping all pixel |
OSD_FillRow, // (x0,y0,x1,color) |
// fills pixels x0,y through x1,y with the color <col> |
// returns 0 on success, -1 on clipping all pixel |
OSD_FillBlock, // (x0,y0,x1,y1,color) |
// fills pixels x0,y0 through x1,y1 with the color <col> |
// returns 0 on success, -1 on clipping all pixel |
OSD_Line, // (x0,y0,x1,y1,color) |
// draw a line from x0,y0 to x1,y1 with the color <col> |
// returns 0 on success |
OSD_Query, // (x0,y0,x1,y1,xasp{color}}), yasp=11 |
// fills parameters with the picture dimensions and the pixel aspect ratio |
// returns 0 on success |
OSD_Test, // () |
// draws a test picture. for debugging purposes only |
// returns 0 on success |
// TODO: remove "test" in final version |
OSD_Text, // (x0,y0,size,color,text) |
OSD_SetWindow, // (x0) set window with number 0<x0<8 as current |
OSD_MoveWindow, // move current window to (x0, y0) |
} OSD_Command; |
typedef struct osd_cmd_s { |
OSD_Command cmd; |
int x0; |
int y0; |
int x1; |
int y1; |
int color; |
void *data; |
} osd_cmd_t; |
#define OSD_SEND_CMD _IOW('o', 160, osd_cmd_t) |
#endif |
/shark/trunk/drivers/linuxc26/include/linux/dvb/net.h |
---|
0,0 → 1,41 |
/* |
* net.h |
* |
* Copyright (C) 2000 Marcus Metzler <marcus@convergence.de> |
* & Ralph Metzler <ralph@convergence.de> |
for convergence integrated media GmbH |
* |
* This program is free software; you can redistribute it and/or |
* modify it under the terms of the GNU Lesser General Public License |
* as published by the Free Software Foundation; either version 2.1 |
* of the License, or (at your option) any later version. |
* |
* This program is distributed in the hope that it will be useful, |
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
* GNU General Public License for more details. |
* |
* You should have received a copy of the GNU Lesser General Public License |
* along with this program; if not, write to the Free Software |
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
* |
*/ |
#ifndef _DVBNET_H_ |
#define _DVBNET_H_ |
#include <asm/types.h> |
struct dvb_net_if { |
__u16 pid; |
__u16 if_num; |
}; |
#define NET_ADD_IF _IOWR('o', 52, struct dvb_net_if) |
#define NET_REMOVE_IF _IO('o', 53) |
#define NET_GET_IF _IOWR('o', 54, struct dvb_net_if) |
#endif /*_DVBNET_H_*/ |
/shark/trunk/drivers/linuxc26/include/linux/dvb/video.h |
---|
0,0 → 1,199 |
/* |
* video.h |
* |
* Copyright (C) 2000 Marcus Metzler <marcus@convergence.de> |
* & Ralph Metzler <ralph@convergence.de> |
for convergence integrated media GmbH |
* |
* This program is free software; you can redistribute it and/or |
* modify it under the terms of the GNU Lesser General Public License |
* as published by the Free Software Foundation; either version 2.1 |
* of the License, or (at your option) any later version. |
* |
* This program is distributed in the hope that it will be useful, |
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
* GNU General Public License for more details. |
* |
* You should have received a copy of the GNU Lesser General Public License |
* along with this program; if not, write to the Free Software |
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
* |
*/ |
#ifndef _DVBVIDEO_H_ |
#define _DVBVIDEO_H_ |
#ifdef __KERNEL__ |
#include <linux/types.h> |
#else |
#include <stdint.h> |
#include <time.h> |
#endif |
typedef enum { |
VIDEO_FORMAT_4_3, /* Select 4:3 format */ |
VIDEO_FORMAT_16_9, /* Select 16:9 format. */ |
VIDEO_FORMAT_221_1 /* 2.21:1 */ |
} video_format_t; |
typedef enum { |
VIDEO_SYSTEM_PAL, |
VIDEO_SYSTEM_NTSC, |
VIDEO_SYSTEM_PALN, |
VIDEO_SYSTEM_PALNc, |
VIDEO_SYSTEM_PALM, |
VIDEO_SYSTEM_NTSC60, |
VIDEO_SYSTEM_PAL60, |
VIDEO_SYSTEM_PALM60 |
} video_system_t; |
typedef enum { |
VIDEO_PAN_SCAN, /* use pan and scan format */ |
VIDEO_LETTER_BOX, /* use letterbox format */ |
VIDEO_CENTER_CUT_OUT /* use center cut out format */ |
} video_displayformat_t; |
typedef struct { |
int w; |
int h; |
video_format_t aspect_ratio; |
} video_size_t; |
typedef enum { |
VIDEO_SOURCE_DEMUX, /* Select the demux as the main source */ |
VIDEO_SOURCE_MEMORY /* If this source is selected, the stream |
comes from the user through the write |
system call */ |
} video_stream_source_t; |
typedef enum { |
VIDEO_STOPPED, /* Video is stopped */ |
VIDEO_PLAYING, /* Video is currently playing */ |
VIDEO_FREEZED /* Video is freezed */ |
} video_play_state_t; |
struct video_event { |
int32_t type; |
#define VIDEO_EVENT_SIZE_CHANGED 1 |
time_t timestamp; |
union { |
video_size_t size; |
} u; |
}; |
struct video_status { |
int video_blank; /* blank video on freeze? */ |
video_play_state_t play_state; /* current state of playback */ |
video_stream_source_t stream_source; /* current source (demux/memory) */ |
video_format_t video_format; /* current aspect ratio of stream*/ |
video_displayformat_t display_format;/* selected cropping mode */ |
}; |
struct video_still_picture { |
char *iFrame; /* pointer to a single iframe in memory */ |
int32_t size; |
}; |
typedef |
struct video_highlight { |
int active; /* 1=show highlight, 0=hide highlight */ |
uint8_t contrast1; /* 7- 4 Pattern pixel contrast */ |
/* 3- 0 Background pixel contrast */ |
uint8_t contrast2; /* 7- 4 Emphasis pixel-2 contrast */ |
/* 3- 0 Emphasis pixel-1 contrast */ |
uint8_t color1; /* 7- 4 Pattern pixel color */ |
/* 3- 0 Background pixel color */ |
uint8_t color2; /* 7- 4 Emphasis pixel-2 color */ |
/* 3- 0 Emphasis pixel-1 color */ |
uint32_t ypos; /* 23-22 auto action mode */ |
/* 21-12 start y */ |
/* 9- 0 end y */ |
uint32_t xpos; /* 23-22 button color number */ |
/* 21-12 start x */ |
/* 9- 0 end x */ |
} video_highlight_t; |
typedef struct video_spu { |
int active; |
int stream_id; |
} video_spu_t; |
typedef struct video_spu_palette { /* SPU Palette information */ |
int length; |
uint8_t *palette; |
} video_spu_palette_t; |
typedef struct video_navi_pack { |
int length; /* 0 ... 1024 */ |
uint8_t data[1024]; |
} video_navi_pack_t; |
typedef uint16_t video_attributes_t; |
/* bits: descr. */ |
/* 15-14 Video compression mode (0=MPEG-1, 1=MPEG-2) */ |
/* 13-12 TV system (0=525/60, 1=625/50) */ |
/* 11-10 Aspect ratio (0=4:3, 3=16:9) */ |
/* 9- 8 permitted display mode on 4:3 monitor (0=both, 1=only pan-sca */ |
/* 7 line 21-1 data present in GOP (1=yes, 0=no) */ |
/* 6 line 21-2 data present in GOP (1=yes, 0=no) */ |
/* 5- 3 source resolution (0=720x480/576, 1=704x480/576, 2=352x480/57 */ |
/* 2 source letterboxed (1=yes, 0=no) */ |
/* 0 film/camera mode (0=camera, 1=film (625/50 only)) */ |
/* bit definitions for capabilities: */ |
/* can the hardware decode MPEG1 and/or MPEG2? */ |
#define VIDEO_CAP_MPEG1 1 |
#define VIDEO_CAP_MPEG2 2 |
/* can you send a system and/or program stream to video device? |
(you still have to open the video and the audio device but only |
send the stream to the video device) */ |
#define VIDEO_CAP_SYS 4 |
#define VIDEO_CAP_PROG 8 |
/* can the driver also handle SPU, NAVI and CSS encoded data? |
(CSS API is not present yet) */ |
#define VIDEO_CAP_SPU 16 |
#define VIDEO_CAP_NAVI 32 |
#define VIDEO_CAP_CSS 64 |
#define VIDEO_STOP _IO('o', 21) |
#define VIDEO_PLAY _IO('o', 22) |
#define VIDEO_FREEZE _IO('o', 23) |
#define VIDEO_CONTINUE _IO('o', 24) |
#define VIDEO_SELECT_SOURCE _IO('o', 25) |
#define VIDEO_SET_BLANK _IO('o', 26) |
#define VIDEO_GET_STATUS _IOR('o', 27, struct video_status) |
#define VIDEO_GET_EVENT _IOR('o', 28, struct video_event) |
#define VIDEO_SET_DISPLAY_FORMAT _IO('o', 29) |
#define VIDEO_STILLPICTURE _IOW('o', 30, struct video_still_picture) |
#define VIDEO_FAST_FORWARD _IO('o', 31) |
#define VIDEO_SLOWMOTION _IO('o', 32) |
#define VIDEO_GET_CAPABILITIES _IOR('o', 33, unsigned int) |
#define VIDEO_CLEAR_BUFFER _IO('o', 34) |
#define VIDEO_SET_ID _IO('o', 35) |
#define VIDEO_SET_STREAMTYPE _IO('o', 36) |
#define VIDEO_SET_FORMAT _IO('o', 37) |
#define VIDEO_SET_SYSTEM _IO('o', 38) |
#define VIDEO_SET_HIGHLIGHT _IOW('o', 39, video_highlight_t) |
#define VIDEO_SET_SPU _IOW('o', 50, video_spu_t) |
#define VIDEO_SET_SPU_PALETTE _IOW('o', 51, video_spu_palette_t) |
#define VIDEO_GET_NAVI _IOR('o', 52, video_navi_pack_t) |
#define VIDEO_SET_ATTRIBUTES _IO('o', 53) |
#define VIDEO_GET_SIZE _IOR('o', 55, video_size_t) |
#endif /*_DVBVIDEO_H_*/ |
/shark/trunk/drivers/linuxc26/include/linux/dvb/dmx.h |
---|
0,0 → 1,180 |
/* |
* dmx.h |
* |
* Copyright (C) 2000 Marcus Metzler <marcus@convergence.de> |
* & Ralph Metzler <ralph@convergence.de> |
for convergence integrated media GmbH |
* |
* This program is free software; you can redistribute it and/or |
* modify it under the terms of the GNU Lesser General Public License |
* as published by the Free Software Foundation; either version 2.1 |
* of the License, or (at your option) any later version. |
* |
* This program is distributed in the hope that it will be useful, |
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
* GNU General Public License for more details. |
* |
* You should have received a copy of the GNU Lesser General Public License |
* along with this program; if not, write to the Free Software |
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
* |
*/ |
#ifndef _DVBDMX_H_ |
#define _DVBDMX_H_ |
#include <asm/types.h> |
#ifdef __KERNEL__ |
#include <linux/time.h> |
#else |
#include <time.h> |
#endif |
#define DMX_FILTER_SIZE 16 |
typedef enum |
{ |
DMX_OUT_DECODER, /* Streaming directly to decoder. */ |
DMX_OUT_TAP, /* Output going to a memory buffer */ |
/* (to be retrieved via the read command).*/ |
DMX_OUT_TS_TAP /* Output multiplexed into a new TS */ |
/* (to be retrieved by reading from the */ |
/* logical DVR device). */ |
} dmx_output_t; |
typedef enum |
{ |
DMX_IN_FRONTEND, /* Input from a front-end device. */ |
DMX_IN_DVR /* Input from the logical DVR device. */ |
} dmx_input_t; |
typedef enum |
{ |
DMX_PES_AUDIO0, |
DMX_PES_VIDEO0, |
DMX_PES_TELETEXT0, |
DMX_PES_SUBTITLE0, |
DMX_PES_PCR0, |
DMX_PES_AUDIO1, |
DMX_PES_VIDEO1, |
DMX_PES_TELETEXT1, |
DMX_PES_SUBTITLE1, |
DMX_PES_PCR1, |
DMX_PES_AUDIO2, |
DMX_PES_VIDEO2, |
DMX_PES_TELETEXT2, |
DMX_PES_SUBTITLE2, |
DMX_PES_PCR2, |
DMX_PES_AUDIO3, |
DMX_PES_VIDEO3, |
DMX_PES_TELETEXT3, |
DMX_PES_SUBTITLE3, |
DMX_PES_PCR3, |
DMX_PES_OTHER |
} dmx_pes_type_t; |
#define DMX_PES_AUDIO DMX_PES_AUDIO0 |
#define DMX_PES_VIDEO DMX_PES_VIDEO0 |
#define DMX_PES_TELETEXT DMX_PES_TELETEXT0 |
#define DMX_PES_SUBTITLE DMX_PES_SUBTITLE0 |
#define DMX_PES_PCR DMX_PES_PCR0 |
typedef enum |
{ |
DMX_SCRAMBLING_EV, |
DMX_FRONTEND_EV |
} dmx_event_t; |
typedef enum |
{ |
DMX_SCRAMBLING_OFF, |
DMX_SCRAMBLING_ON |
} dmx_scrambling_status_t; |
typedef struct dmx_filter |
{ |
__u8 filter[DMX_FILTER_SIZE]; |
__u8 mask[DMX_FILTER_SIZE]; |
__u8 mode[DMX_FILTER_SIZE]; |
} dmx_filter_t; |
struct dmx_sct_filter_params |
{ |
__u16 pid; |
dmx_filter_t filter; |
__u32 timeout; |
__u32 flags; |
#define DMX_CHECK_CRC 1 |
#define DMX_ONESHOT 2 |
#define DMX_IMMEDIATE_START 4 |
#define DMX_KERNEL_CLIENT 0x8000 |
}; |
struct dmx_pes_filter_params |
{ |
__u16 pid; |
dmx_input_t input; |
dmx_output_t output; |
dmx_pes_type_t pes_type; |
__u32 flags; |
}; |
struct dmx_event |
{ |
dmx_event_t event; |
time_t timeStamp; |
union |
{ |
dmx_scrambling_status_t scrambling; |
} u; |
}; |
typedef struct dmx_caps { |
__u32 caps; |
int num_decoders; |
} dmx_caps_t; |
typedef enum { |
DMX_SOURCE_FRONT0 = 0, |
DMX_SOURCE_FRONT1, |
DMX_SOURCE_FRONT2, |
DMX_SOURCE_FRONT3, |
DMX_SOURCE_DVR0 = 16, |
DMX_SOURCE_DVR1, |
DMX_SOURCE_DVR2, |
DMX_SOURCE_DVR3 |
} dmx_source_t; |
struct dmx_stc { |
unsigned int num; /* input : which STC? 0..N */ |
unsigned int base; /* output: divisor for stc to get 90 kHz clock */ |
__u64 stc; /* output: stc in 'base'*90 kHz units */ |
}; |
#define DMX_START _IO('o',41) |
#define DMX_STOP _IO('o',42) |
#define DMX_SET_FILTER _IOW('o',43,struct dmx_sct_filter_params) |
#define DMX_SET_PES_FILTER _IOW('o',44,struct dmx_pes_filter_params) |
#define DMX_SET_BUFFER_SIZE _IO('o',45) |
#define DMX_GET_EVENT _IOR('o',46,struct dmx_event) |
#define DMX_GET_PES_PIDS _IOR('o', 47, __u16[5]) |
#define DMX_GET_CAPS _IOR('o',48,dmx_caps_t) |
#define DMX_SET_SOURCE _IOW('o',49,dmx_source_t) |
#define DMX_GET_STC _IOWR('o',50,struct dmx_stc) |
#endif /*_DVBDMX_H_*/ |
/shark/trunk/drivers/linuxc26/include/linux/byteorder/little_endian.h |
---|
0,0 → 1,68 |
#ifndef _LINUX_BYTEORDER_LITTLE_ENDIAN_H |
#define _LINUX_BYTEORDER_LITTLE_ENDIAN_H |
#ifndef __LITTLE_ENDIAN |
#define __LITTLE_ENDIAN 1234 |
#endif |
#ifndef __LITTLE_ENDIAN_BITFIELD |
#define __LITTLE_ENDIAN_BITFIELD |
#endif |
#include <linux/byteorder/swab.h> |
#define __constant_htonl(x) ___constant_swab32((x)) |
#define __constant_ntohl(x) ___constant_swab32((x)) |
#define __constant_htons(x) ___constant_swab16((x)) |
#define __constant_ntohs(x) ___constant_swab16((x)) |
#define __constant_cpu_to_le64(x) ((__u64)(x)) |
#define __constant_le64_to_cpu(x) ((__u64)(x)) |
#define __constant_cpu_to_le32(x) ((__u32)(x)) |
#define __constant_le32_to_cpu(x) ((__u32)(x)) |
#define __constant_cpu_to_le16(x) ((__u16)(x)) |
#define __constant_le16_to_cpu(x) ((__u16)(x)) |
#define __constant_cpu_to_be64(x) ___constant_swab64((x)) |
#define __constant_be64_to_cpu(x) ___constant_swab64((x)) |
#define __constant_cpu_to_be32(x) ___constant_swab32((x)) |
#define __constant_be32_to_cpu(x) ___constant_swab32((x)) |
#define __constant_cpu_to_be16(x) ___constant_swab16((x)) |
#define __constant_be16_to_cpu(x) ___constant_swab16((x)) |
#define __cpu_to_le64(x) ((__u64)(x)) |
#define __le64_to_cpu(x) ((__u64)(x)) |
#define __cpu_to_le32(x) ((__u32)(x)) |
#define __le32_to_cpu(x) ((__u32)(x)) |
#define __cpu_to_le16(x) ((__u16)(x)) |
#define __le16_to_cpu(x) ((__u16)(x)) |
#define __cpu_to_be64(x) __swab64((x)) |
#define __be64_to_cpu(x) __swab64((x)) |
#define __cpu_to_be32(x) __swab32((x)) |
#define __be32_to_cpu(x) __swab32((x)) |
#define __cpu_to_be16(x) __swab16((x)) |
#define __be16_to_cpu(x) __swab16((x)) |
#define __cpu_to_le64p(x) (*(__u64*)(x)) |
#define __le64_to_cpup(x) (*(__u64*)(x)) |
#define __cpu_to_le32p(x) (*(__u32*)(x)) |
#define __le32_to_cpup(x) (*(__u32*)(x)) |
#define __cpu_to_le16p(x) (*(__u16*)(x)) |
#define __le16_to_cpup(x) (*(__u16*)(x)) |
#define __cpu_to_be64p(x) __swab64p((x)) |
#define __be64_to_cpup(x) __swab64p((x)) |
#define __cpu_to_be32p(x) __swab32p((x)) |
#define __be32_to_cpup(x) __swab32p((x)) |
#define __cpu_to_be16p(x) __swab16p((x)) |
#define __be16_to_cpup(x) __swab16p((x)) |
#define __cpu_to_le64s(x) do {} while (0) |
#define __le64_to_cpus(x) do {} while (0) |
#define __cpu_to_le32s(x) do {} while (0) |
#define __le32_to_cpus(x) do {} while (0) |
#define __cpu_to_le16s(x) do {} while (0) |
#define __le16_to_cpus(x) do {} while (0) |
#define __cpu_to_be64s(x) __swab64s((x)) |
#define __be64_to_cpus(x) __swab64s((x)) |
#define __cpu_to_be32s(x) __swab32s((x)) |
#define __be32_to_cpus(x) __swab32s((x)) |
#define __cpu_to_be16s(x) __swab16s((x)) |
#define __be16_to_cpus(x) __swab16s((x)) |
#include <linux/byteorder/generic.h> |
#endif /* _LINUX_BYTEORDER_LITTLE_ENDIAN_H */ |
/shark/trunk/drivers/linuxc26/include/linux/byteorder/generic.h |
---|
0,0 → 1,172 |
#ifndef _LINUX_BYTEORDER_GENERIC_H |
#define _LINUX_BYTEORDER_GENERIC_H |
/* |
* linux/byteorder_generic.h |
* Generic Byte-reordering support |
* |
* Francois-Rene Rideau <fare@tunes.org> 19970707 |
* gathered all the good ideas from all asm-foo/byteorder.h into one file, |
* cleaned them up. |
* I hope it is compliant with non-GCC compilers. |
* I decided to put __BYTEORDER_HAS_U64__ in byteorder.h, |
* because I wasn't sure it would be ok to put it in types.h |
* Upgraded it to 2.1.43 |
* Francois-Rene Rideau <fare@tunes.org> 19971012 |
* Upgraded it to 2.1.57 |
* to please Linus T., replaced huge #ifdef's between little/big endian |
* by nestedly #include'd files. |
* Francois-Rene Rideau <fare@tunes.org> 19971205 |
* Made it to 2.1.71; now a facelift: |
* Put files under include/linux/byteorder/ |
* Split swab from generic support. |
* |
* TODO: |
* = Regular kernel maintainers could also replace all these manual |
* byteswap macros that remain, disseminated among drivers, |
* after some grep or the sources... |
* = Linus might want to rename all these macros and files to fit his taste, |
* to fit his personal naming scheme. |
* = it seems that a few drivers would also appreciate |
* nybble swapping support... |
* = every architecture could add their byteswap macro in asm/byteorder.h |
* see how some architectures already do (i386, alpha, ppc, etc) |
* = cpu_to_beXX and beXX_to_cpu might some day need to be well |
* distinguished throughout the kernel. This is not the case currently, |
* since little endian, big endian, and pdp endian machines needn't it. |
* But this might be the case for, say, a port of Linux to 20/21 bit |
* architectures (and F21 Linux addict around?). |
*/ |
/* |
* The following macros are to be defined by <asm/byteorder.h>: |
* |
* Conversion of long and short int between network and host format |
* ntohl(__u32 x) |
* ntohs(__u16 x) |
* htonl(__u32 x) |
* htons(__u16 x) |
* It seems that some programs (which? where? or perhaps a standard? POSIX?) |
* might like the above to be functions, not macros (why?). |
* if that's true, then detect them, and take measures. |
* Anyway, the measure is: define only ___ntohl as a macro instead, |
* and in a separate file, have |
* unsigned long inline ntohl(x){return ___ntohl(x);} |
* |
* The same for constant arguments |
* __constant_ntohl(__u32 x) |
* __constant_ntohs(__u16 x) |
* __constant_htonl(__u32 x) |
* __constant_htons(__u16 x) |
* |
* Conversion of XX-bit integers (16- 32- or 64-) |
* between native CPU format and little/big endian format |
* 64-bit stuff only defined for proper architectures |
* cpu_to_[bl]eXX(__uXX x) |
* [bl]eXX_to_cpu(__uXX x) |
* |
* The same, but takes a pointer to the value to convert |
* cpu_to_[bl]eXXp(__uXX x) |
* [bl]eXX_to_cpup(__uXX x) |
* |
* The same, but change in situ |
* cpu_to_[bl]eXXs(__uXX x) |
* [bl]eXX_to_cpus(__uXX x) |
* |
* See asm-foo/byteorder.h for examples of how to provide |
* architecture-optimized versions |
* |
*/ |
#if defined(__KERNEL__) |
/* |
* inside the kernel, we can use nicknames; |
* outside of it, we must avoid POSIX namespace pollution... |
*/ |
#define cpu_to_le64 __cpu_to_le64 |
#define le64_to_cpu __le64_to_cpu |
#define cpu_to_le32 __cpu_to_le32 |
#define le32_to_cpu __le32_to_cpu |
#define cpu_to_le16 __cpu_to_le16 |
#define le16_to_cpu __le16_to_cpu |
#define cpu_to_be64 __cpu_to_be64 |
#define be64_to_cpu __be64_to_cpu |
#define cpu_to_be32 __cpu_to_be32 |
#define be32_to_cpu __be32_to_cpu |
#define cpu_to_be16 __cpu_to_be16 |
#define be16_to_cpu __be16_to_cpu |
#define cpu_to_le64p __cpu_to_le64p |
#define le64_to_cpup __le64_to_cpup |
#define cpu_to_le32p __cpu_to_le32p |
#define le32_to_cpup __le32_to_cpup |
#define cpu_to_le16p __cpu_to_le16p |
#define le16_to_cpup __le16_to_cpup |
#define cpu_to_be64p __cpu_to_be64p |
#define be64_to_cpup __be64_to_cpup |
#define cpu_to_be32p __cpu_to_be32p |
#define be32_to_cpup __be32_to_cpup |
#define cpu_to_be16p __cpu_to_be16p |
#define be16_to_cpup __be16_to_cpup |
#define cpu_to_le64s __cpu_to_le64s |
#define le64_to_cpus __le64_to_cpus |
#define cpu_to_le32s __cpu_to_le32s |
#define le32_to_cpus __le32_to_cpus |
#define cpu_to_le16s __cpu_to_le16s |
#define le16_to_cpus __le16_to_cpus |
#define cpu_to_be64s __cpu_to_be64s |
#define be64_to_cpus __be64_to_cpus |
#define cpu_to_be32s __cpu_to_be32s |
#define be32_to_cpus __be32_to_cpus |
#define cpu_to_be16s __cpu_to_be16s |
#define be16_to_cpus __be16_to_cpus |
#endif |
#if defined(__KERNEL__) |
/* |
* Handle ntohl and suches. These have various compatibility |
* issues - like we want to give the prototype even though we |
* also have a macro for them in case some strange program |
* wants to take the address of the thing or something.. |
* |
* Note that these used to return a "long" in libc5, even though |
* long is often 64-bit these days.. Thus the casts. |
* |
* They have to be macros in order to do the constant folding |
* correctly - if the argument passed into a inline function |
* it is no longer constant according to gcc.. |
*/ |
#undef ntohl |
#undef ntohs |
#undef htonl |
#undef htons |
/* |
* Do the prototypes. Somebody might want to take the |
* address or some such sick thing.. |
*/ |
extern __u32 ntohl(__u32); |
extern __u32 htonl(__u32); |
extern unsigned short int ntohs(unsigned short int); |
extern unsigned short int htons(unsigned short int); |
#if defined(__GNUC__) && (__GNUC__ >= 2) && defined(__OPTIMIZE__) |
#define ___htonl(x) __cpu_to_be32(x) |
#define ___htons(x) __cpu_to_be16(x) |
#define ___ntohl(x) __be32_to_cpu(x) |
#define ___ntohs(x) __be16_to_cpu(x) |
#define htonl(x) ___htonl(x) |
#define ntohl(x) ___ntohl(x) |
#define htons(x) ___htons(x) |
#define ntohs(x) ___ntohs(x) |
#endif /* OPTIMIZE */ |
#endif /* KERNEL */ |
#endif /* _LINUX_BYTEORDER_GENERIC_H */ |
/shark/trunk/drivers/linuxc26/include/linux/byteorder/swab.h |
---|
0,0 → 1,190 |
#ifndef _LINUX_BYTEORDER_SWAB_H |
#define _LINUX_BYTEORDER_SWAB_H |
/* |
* linux/byteorder/swab.h |
* Byte-swapping, independently from CPU endianness |
* swabXX[ps]?(foo) |
* |
* Francois-Rene Rideau <fare@tunes.org> 19971205 |
* separated swab functions from cpu_to_XX, |
* to clean up support for bizarre-endian architectures. |
* |
* See asm-i386/byteorder.h and suches for examples of how to provide |
* architecture-dependent optimized versions |
* |
*/ |
/* casts are necessary for constants, because we never know how for sure |
* how U/UL/ULL map to __u16, __u32, __u64. At least not in a portable way. |
*/ |
#define ___swab16(x) \ |
({ \ |
__u16 __x = (x); \ |
((__u16)( \ |
(((__u16)(__x) & (__u16)0x00ffU) << 8) | \ |
(((__u16)(__x) & (__u16)0xff00U) >> 8) )); \ |
}) |
#define ___swab32(x) \ |
({ \ |
__u32 __x = (x); \ |
((__u32)( \ |
(((__u32)(__x) & (__u32)0x000000ffUL) << 24) | \ |
(((__u32)(__x) & (__u32)0x0000ff00UL) << 8) | \ |
(((__u32)(__x) & (__u32)0x00ff0000UL) >> 8) | \ |
(((__u32)(__x) & (__u32)0xff000000UL) >> 24) )); \ |
}) |
#define ___swab64(x) \ |
({ \ |
__u64 __x = (x); \ |
((__u64)( \ |
(__u64)(((__u64)(__x) & (__u64)0x00000000000000ffULL) << 56) | \ |
(__u64)(((__u64)(__x) & (__u64)0x000000000000ff00ULL) << 40) | \ |
(__u64)(((__u64)(__x) & (__u64)0x0000000000ff0000ULL) << 24) | \ |
(__u64)(((__u64)(__x) & (__u64)0x00000000ff000000ULL) << 8) | \ |
(__u64)(((__u64)(__x) & (__u64)0x000000ff00000000ULL) >> 8) | \ |
(__u64)(((__u64)(__x) & (__u64)0x0000ff0000000000ULL) >> 24) | \ |
(__u64)(((__u64)(__x) & (__u64)0x00ff000000000000ULL) >> 40) | \ |
(__u64)(((__u64)(__x) & (__u64)0xff00000000000000ULL) >> 56) )); \ |
}) |
#define ___constant_swab16(x) \ |
((__u16)( \ |
(((__u16)(x) & (__u16)0x00ffU) << 8) | \ |
(((__u16)(x) & (__u16)0xff00U) >> 8) )) |
#define ___constant_swab32(x) \ |
((__u32)( \ |
(((__u32)(x) & (__u32)0x000000ffUL) << 24) | \ |
(((__u32)(x) & (__u32)0x0000ff00UL) << 8) | \ |
(((__u32)(x) & (__u32)0x00ff0000UL) >> 8) | \ |
(((__u32)(x) & (__u32)0xff000000UL) >> 24) )) |
#define ___constant_swab64(x) \ |
((__u64)( \ |
(__u64)(((__u64)(x) & (__u64)0x00000000000000ffULL) << 56) | \ |
(__u64)(((__u64)(x) & (__u64)0x000000000000ff00ULL) << 40) | \ |
(__u64)(((__u64)(x) & (__u64)0x0000000000ff0000ULL) << 24) | \ |
(__u64)(((__u64)(x) & (__u64)0x00000000ff000000ULL) << 8) | \ |
(__u64)(((__u64)(x) & (__u64)0x000000ff00000000ULL) >> 8) | \ |
(__u64)(((__u64)(x) & (__u64)0x0000ff0000000000ULL) >> 24) | \ |
(__u64)(((__u64)(x) & (__u64)0x00ff000000000000ULL) >> 40) | \ |
(__u64)(((__u64)(x) & (__u64)0xff00000000000000ULL) >> 56) )) |
/* |
* provide defaults when no architecture-specific optimization is detected |
*/ |
#ifndef __arch__swab16 |
# define __arch__swab16(x) ({ __u16 __tmp = (x) ; ___swab16(__tmp); }) |
#endif |
#ifndef __arch__swab32 |
# define __arch__swab32(x) ({ __u32 __tmp = (x) ; ___swab32(__tmp); }) |
#endif |
#ifndef __arch__swab64 |
# define __arch__swab64(x) ({ __u64 __tmp = (x) ; ___swab64(__tmp); }) |
#endif |
#ifndef __arch__swab16p |
# define __arch__swab16p(x) __arch__swab16(*(x)) |
#endif |
#ifndef __arch__swab32p |
# define __arch__swab32p(x) __arch__swab32(*(x)) |
#endif |
#ifndef __arch__swab64p |
# define __arch__swab64p(x) __arch__swab64(*(x)) |
#endif |
#ifndef __arch__swab16s |
# define __arch__swab16s(x) do { *(x) = __arch__swab16p((x)); } while (0) |
#endif |
#ifndef __arch__swab32s |
# define __arch__swab32s(x) do { *(x) = __arch__swab32p((x)); } while (0) |
#endif |
#ifndef __arch__swab64s |
# define __arch__swab64s(x) do { *(x) = __arch__swab64p((x)); } while (0) |
#endif |
/* |
* Allow constant folding |
*/ |
#if defined(__GNUC__) && (__GNUC__ >= 2) && defined(__OPTIMIZE__) |
# define __swab16(x) \ |
(__builtin_constant_p((__u16)(x)) ? \ |
___swab16((x)) : \ |
__fswab16((x))) |
# define __swab32(x) \ |
(__builtin_constant_p((__u32)(x)) ? \ |
___swab32((x)) : \ |
__fswab32((x))) |
# define __swab64(x) \ |
(__builtin_constant_p((__u64)(x)) ? \ |
___swab64((x)) : \ |
__fswab64((x))) |
#else |
# define __swab16(x) __fswab16(x) |
# define __swab32(x) __fswab32(x) |
# define __swab64(x) __fswab64(x) |
#endif /* OPTIMIZE */ |
static __inline__ __const__ __u16 __fswab16(__u16 x) |
{ |
return __arch__swab16(x); |
} |
static __inline__ __u16 __swab16p(__u16 *x) |
{ |
return __arch__swab16p(x); |
} |
static __inline__ void __swab16s(__u16 *addr) |
{ |
__arch__swab16s(addr); |
} |
static __inline__ __const__ __u32 __fswab32(__u32 x) |
{ |
return __arch__swab32(x); |
} |
static __inline__ __u32 __swab32p(__u32 *x) |
{ |
return __arch__swab32p(x); |
} |
static __inline__ void __swab32s(__u32 *addr) |
{ |
__arch__swab32s(addr); |
} |
#ifdef __BYTEORDER_HAS_U64__ |
static __inline__ __const__ __u64 __fswab64(__u64 x) |
{ |
# ifdef __SWAB_64_THRU_32__ |
__u32 h = x >> 32; |
__u32 l = x & ((1ULL<<32)-1); |
return (((__u64)__swab32(l)) << 32) | ((__u64)(__swab32(h))); |
# else |
return __arch__swab64(x); |
# endif |
} |
static __inline__ __u64 __swab64p(__u64 *x) |
{ |
return __arch__swab64p(x); |
} |
static __inline__ void __swab64s(__u64 *addr) |
{ |
__arch__swab64s(addr); |
} |
#endif /* __BYTEORDER_HAS_U64__ */ |
#if defined(__KERNEL__) |
#define swab16 __swab16 |
#define swab32 __swab32 |
#define swab64 __swab64 |
#define swab16p __swab16p |
#define swab32p __swab32p |
#define swab64p __swab64p |
#define swab16s __swab16s |
#define swab32s __swab32s |
#define swab64s __swab64s |
#endif |
#endif /* _LINUX_BYTEORDER_SWAB_H */ |
/shark/trunk/drivers/linuxc26/include/linux/byteorder/swabb.h |
---|
0,0 → 1,137 |
#ifndef _LINUX_BYTEORDER_SWABB_H |
#define _LINUX_BYTEORDER_SWABB_H |
/* |
* linux/byteorder/swabb.h |
* SWAp Bytes Bizarrely |
* swaHHXX[ps]?(foo) |
* |
* Support for obNUXIous pdp-endian and other bizarre architectures. |
* Will Linux ever run on such ancient beasts? if not, this file |
* will be but a programming pearl. Still, it's a reminder that we |
* shouldn't be making too many assumptions when trying to be portable. |
* |
*/ |
/* |
* Meaning of the names I chose (vaxlinux people feel free to correct them): |
* swahw32 swap 16-bit half-words in a 32-bit word |
* swahb32 swap 8-bit halves of each 16-bit half-word in a 32-bit word |
* |
* No 64-bit support yet. I don't know NUXI conventions for long longs. |
* I guarantee it will be a mess when it's there, though :-> |
* It will be even worse if there are conflicting 64-bit conventions. |
* Hopefully, no one ever used 64-bit objects on NUXI machines. |
* |
*/ |
#define ___swahw32(x) \ |
({ \ |
__u32 __x = (x); \ |
((__u32)( \ |
(((__u32)(__x) & (__u32)0x0000ffffUL) << 16) | \ |
(((__u32)(__x) & (__u32)0xffff0000UL) >> 16) )); \ |
}) |
#define ___swahb32(x) \ |
({ \ |
__u32 __x = (x); \ |
((__u32)( \ |
(((__u32)(__x) & (__u32)0x00ff00ffUL) << 8) | \ |
(((__u32)(__x) & (__u32)0xff00ff00UL) >> 8) )); \ |
}) |
#define ___constant_swahw32(x) \ |
((__u32)( \ |
(((__u32)(x) & (__u32)0x0000ffffUL) << 16) | \ |
(((__u32)(x) & (__u32)0xffff0000UL) >> 16) )) |
#define ___constant_swahb32(x) \ |
((__u32)( \ |
(((__u32)(x) & (__u32)0x00ff00ffUL) << 8) | \ |
(((__u32)(x) & (__u32)0xff00ff00UL) >> 8) )) |
/* |
* provide defaults when no architecture-specific optimization is detected |
*/ |
#ifndef __arch__swahw32 |
# define __arch__swahw32(x) ___swahw32(x) |
#endif |
#ifndef __arch__swahb32 |
# define __arch__swahb32(x) ___swahb32(x) |
#endif |
#ifndef __arch__swahw32p |
# define __arch__swahw32p(x) __swahw32(*(x)) |
#endif |
#ifndef __arch__swahb32p |
# define __arch__swahb32p(x) __swahb32(*(x)) |
#endif |
#ifndef __arch__swahw32s |
# define __arch__swahw32s(x) do { *(x) = __swahw32p((x)); } while (0) |
#endif |
#ifndef __arch__swahb32s |
# define __arch__swahb32s(x) do { *(x) = __swahb32p((x)); } while (0) |
#endif |
/* |
* Allow constant folding |
*/ |
#if defined(__GNUC__) && (__GNUC__ >= 2) && defined(__OPTIMIZE__) |
# define __swahw32(x) \ |
(__builtin_constant_p((__u32)(x)) ? \ |
___swahw32((x)) : \ |
__fswahw32((x))) |
# define __swahb32(x) \ |
(__builtin_constant_p((__u32)(x)) ? \ |
___swahb32((x)) : \ |
__fswahb32((x))) |
#else |
# define __swahw32(x) __fswahw32(x) |
# define __swahb32(x) __fswahb32(x) |
#endif /* OPTIMIZE */ |
static __inline__ __const__ __u32 __fswahw32(__u32 x) |
{ |
return __arch__swahw32(x); |
} |
static __inline__ __u32 __swahw32p(__u32 *x) |
{ |
return __arch__swahw32p(x); |
} |
static __inline__ void __swahw32s(__u32 *addr) |
{ |
__arch__swahw32s(addr); |
} |
static __inline__ __const__ __u32 __fswahb32(__u32 x) |
{ |
return __arch__swahb32(x); |
} |
static __inline__ __u32 __swahb32p(__u32 *x) |
{ |
return __arch__swahb32p(x); |
} |
static __inline__ void __swahb32s(__u32 *addr) |
{ |
__arch__swahb32s(addr); |
} |
#ifdef __BYTEORDER_HAS_U64__ |
/* |
* Not supported yet |
*/ |
#endif /* __BYTEORDER_HAS_U64__ */ |
#if defined(__KERNEL__) |
#define swahw32 __swahw32 |
#define swahb32 __swahb32 |
#define swahw32p __swahw32p |
#define swahb32p __swahb32p |
#define swahw32s __swahw32s |
#define swahb32s __swahb32s |
#endif |
#endif /* _LINUX_BYTEORDER_SWABB_H */ |
/shark/trunk/drivers/linuxc26/include/linux/byteorder/big_endian.h |
---|
0,0 → 1,68 |
#ifndef _LINUX_BYTEORDER_BIG_ENDIAN_H |
#define _LINUX_BYTEORDER_BIG_ENDIAN_H |
#ifndef __BIG_ENDIAN |
#define __BIG_ENDIAN 4321 |
#endif |
#ifndef __BIG_ENDIAN_BITFIELD |
#define __BIG_ENDIAN_BITFIELD |
#endif |
#include <linux/byteorder/swab.h> |
#define __constant_htonl(x) ((__u32)(x)) |
#define __constant_ntohl(x) ((__u32)(x)) |
#define __constant_htons(x) ((__u16)(x)) |
#define __constant_ntohs(x) ((__u16)(x)) |
#define __constant_cpu_to_le64(x) ___constant_swab64((x)) |
#define __constant_le64_to_cpu(x) ___constant_swab64((x)) |
#define __constant_cpu_to_le32(x) ___constant_swab32((x)) |
#define __constant_le32_to_cpu(x) ___constant_swab32((x)) |
#define __constant_cpu_to_le16(x) ___constant_swab16((x)) |
#define __constant_le16_to_cpu(x) ___constant_swab16((x)) |
#define __constant_cpu_to_be64(x) ((__u64)(x)) |
#define __constant_be64_to_cpu(x) ((__u64)(x)) |
#define __constant_cpu_to_be32(x) ((__u32)(x)) |
#define __constant_be32_to_cpu(x) ((__u32)(x)) |
#define __constant_cpu_to_be16(x) ((__u16)(x)) |
#define __constant_be16_to_cpu(x) ((__u16)(x)) |
#define __cpu_to_le64(x) __swab64((x)) |
#define __le64_to_cpu(x) __swab64((x)) |
#define __cpu_to_le32(x) __swab32((x)) |
#define __le32_to_cpu(x) __swab32((x)) |
#define __cpu_to_le16(x) __swab16((x)) |
#define __le16_to_cpu(x) __swab16((x)) |
#define __cpu_to_be64(x) ((__u64)(x)) |
#define __be64_to_cpu(x) ((__u64)(x)) |
#define __cpu_to_be32(x) ((__u32)(x)) |
#define __be32_to_cpu(x) ((__u32)(x)) |
#define __cpu_to_be16(x) ((__u16)(x)) |
#define __be16_to_cpu(x) ((__u16)(x)) |
#define __cpu_to_le64p(x) __swab64p((x)) |
#define __le64_to_cpup(x) __swab64p((x)) |
#define __cpu_to_le32p(x) __swab32p((x)) |
#define __le32_to_cpup(x) __swab32p((x)) |
#define __cpu_to_le16p(x) __swab16p((x)) |
#define __le16_to_cpup(x) __swab16p((x)) |
#define __cpu_to_be64p(x) (*(__u64*)(x)) |
#define __be64_to_cpup(x) (*(__u64*)(x)) |
#define __cpu_to_be32p(x) (*(__u32*)(x)) |
#define __be32_to_cpup(x) (*(__u32*)(x)) |
#define __cpu_to_be16p(x) (*(__u16*)(x)) |
#define __be16_to_cpup(x) (*(__u16*)(x)) |
#define __cpu_to_le64s(x) __swab64s((x)) |
#define __le64_to_cpus(x) __swab64s((x)) |
#define __cpu_to_le32s(x) __swab32s((x)) |
#define __le32_to_cpus(x) __swab32s((x)) |
#define __cpu_to_le16s(x) __swab16s((x)) |
#define __le16_to_cpus(x) __swab16s((x)) |
#define __cpu_to_be64s(x) do {} while (0) |
#define __be64_to_cpus(x) do {} while (0) |
#define __cpu_to_be32s(x) do {} while (0) |
#define __be32_to_cpus(x) do {} while (0) |
#define __cpu_to_be16s(x) do {} while (0) |
#define __be16_to_cpus(x) do {} while (0) |
#include <linux/byteorder/generic.h> |
#endif /* _LINUX_BYTEORDER_BIG_ENDIAN_H */ |
/shark/trunk/drivers/linuxc26/include/linux/byteorder/pdp_endian.h |
---|
0,0 → 1,88 |
#ifndef _LINUX_BYTEORDER_PDP_ENDIAN_H |
#define _LINUX_BYTEORDER_PDP_ENDIAN_H |
/* |
* Could have been named NUXI-endian, but we use the same name as in glibc. |
* hopefully only the PDP and its evolutions (old VAXen in compatibility mode) |
* should ever use this braindead byteorder. |
* This file *should* work, but has not been tested. |
* |
* little-endian is 1234; big-endian is 4321; nuxi/pdp-endian is 3412 |
* |
* I thought vaxen were NUXI-endian, but was told they were correct-endian |
* (little-endian), though indeed there existed NUXI-endian machines |
* (DEC PDP-11 and old VAXen in compatibility mode). |
* This makes this file a bit useless, but as a proof-of-concept. |
* |
* But what does a __u64 look like: is it 34127856 or 78563412 ??? |
* I don't dare imagine! Hence, no 64-bit byteorder support yet. |
* Hopefully, there 64-bit pdp-endian support shouldn't ever be required. |
* |
*/ |
#ifndef __PDP_ENDIAN |
#define __PDP_ENDIAN 3412 |
#endif |
#ifndef __PDP_ENDIAN_BITFIELD |
#define __PDP_ENDIAN_BITFIELD |
#endif |
#include <linux/byteorder/swab.h> |
#include <linux/byteorder/swabb.h> |
#define __constant_htonl(x) ___constant_swahb32((x)) |
#define __constant_ntohl(x) ___constant_swahb32((x)) |
#define __constant_htons(x) ___constant_swab16((x)) |
#define __constant_ntohs(x) ___constant_swab16((x)) |
#define __constant_cpu_to_le64(x) I DON'T KNOW |
#define __constant_le64_to_cpu(x) I DON'T KNOW |
#define __constant_cpu_to_le32(x) ___constant_swahw32((x)) |
#define __constant_le32_to_cpu(x) ___constant_swahw32((x)) |
#define __constant_cpu_to_le16(x) ((__u16)(x) |
#define __constant_le16_to_cpu(x) ((__u16)(x) |
#define __constant_cpu_to_be64(x) I DON'T KNOW |
#define __constant_be64_to_cpu(x) I DON'T KNOW |
#define __constant_cpu_to_be32(x) ___constant_swahb32((x)) |
#define __constant_be32_to_cpu(x) ___constant_swahb32((x)) |
#define __constant_cpu_to_be16(x) ___constant_swab16((x)) |
#define __constant_be16_to_cpu(x) ___constant_swab16((x)) |
#define __cpu_to_le64(x) I DON'T KNOW |
#define __le64_to_cpu(x) I DON'T KNOW |
#define __cpu_to_le32(x) ___swahw32((x)) |
#define __le32_to_cpu(x) ___swahw32((x)) |
#define __cpu_to_le16(x) ((__u16)(x) |
#define __le16_to_cpu(x) ((__u16)(x) |
#define __cpu_to_be64(x) I DON'T KNOW |
#define __be64_to_cpu(x) I DON'T KNOW |
#define __cpu_to_be32(x) __swahb32((x)) |
#define __be32_to_cpu(x) __swahb32((x)) |
#define __cpu_to_be16(x) __swab16((x)) |
#define __be16_to_cpu(x) __swab16((x)) |
#define __cpu_to_le64p(x) I DON'T KNOW |
#define __le64_to_cpup(x) I DON'T KNOW |
#define __cpu_to_le32p(x) ___swahw32p((x)) |
#define __le32_to_cpup(x) ___swahw32p((x)) |
#define __cpu_to_le16p(x) (*(__u16*)(x)) |
#define __le16_to_cpup(x) (*(__u16*)(x)) |
#define __cpu_to_be64p(x) I DON'T KNOW |
#define __be64_to_cpup(x) I DON'T KNOW |
#define __cpu_to_be32p(x) __swahb32p((x)) |
#define __be32_to_cpup(x) __swahb32p((x)) |
#define __cpu_to_be16p(x) __swab16p((x)) |
#define __be16_to_cpup(x) __swab16p((x)) |
#define __cpu_to_le64s(x) I DON'T KNOW |
#define __le64_to_cpus(x) I DON'T KNOW |
#define __cpu_to_le32s(x) ___swahw32s((x)) |
#define __le32_to_cpus(x) ___swahw32s((x)) |
#define __cpu_to_le16s(x) do {} while (0) |
#define __le16_to_cpus(x) do {} while (0) |
#define __cpu_to_be64s(x) I DON'T KNOW |
#define __be64_to_cpus(x) I DON'T KNOW |
#define __cpu_to_be32s(x) __swahb32s((x)) |
#define __be32_to_cpus(x) __swahb32s((x)) |
#define __cpu_to_be16s(x) __swab16s((x)) |
#define __be16_to_cpus(x) __swab16s((x)) |
#include <linux/byteorder/generic.h> |
#endif /* _LINUX_BYTEORDER_PDP_ENDIAN_H */ |
/shark/trunk/drivers/linuxc26/include/linux/isdn/capiutil.h |
---|
0,0 → 1,505 |
/* $Id: capiutil.h,v 1.1 2004-01-28 15:32:46 giacomo Exp $ |
* |
* CAPI 2.0 defines & types |
* |
* From CAPI 2.0 Development Kit AVM 1995 (msg.c) |
* Rewritten for Linux 1996 by Carsten Paeth <calle@calle.de> |
* |
* This software may be used and distributed according to the terms |
* of the GNU General Public License, incorporated herein by reference. |
* |
*/ |
#ifndef __CAPIUTIL_H__ |
#define __CAPIUTIL_H__ |
#include <asm/types.h> |
#define CAPIMSG_BASELEN 8 |
#define CAPIMSG_U8(m, off) (m[off]) |
#define CAPIMSG_U16(m, off) (m[off]|(m[(off)+1]<<8)) |
#define CAPIMSG_U32(m, off) (m[off]|(m[(off)+1]<<8)|(m[(off)+2]<<16)|(m[(off)+3]<<24)) |
#define CAPIMSG_LEN(m) CAPIMSG_U16(m,0) |
#define CAPIMSG_APPID(m) CAPIMSG_U16(m,2) |
#define CAPIMSG_COMMAND(m) CAPIMSG_U8(m,4) |
#define CAPIMSG_SUBCOMMAND(m) CAPIMSG_U8(m,5) |
#define CAPIMSG_CMD(m) (((m[4])<<8)|(m[5])) |
#define CAPIMSG_MSGID(m) CAPIMSG_U16(m,6) |
#define CAPIMSG_CONTROLLER(m) (m[8] & 0x7f) |
#define CAPIMSG_CONTROL(m) CAPIMSG_U32(m, 8) |
#define CAPIMSG_NCCI(m) CAPIMSG_CONTROL(m) |
#define CAPIMSG_DATALEN(m) CAPIMSG_U16(m,16) /* DATA_B3_REQ */ |
static inline void capimsg_setu8(void *m, int off, __u8 val) |
{ |
((__u8 *)m)[off] = val; |
} |
static inline void capimsg_setu16(void *m, int off, __u16 val) |
{ |
((__u8 *)m)[off] = val & 0xff; |
((__u8 *)m)[off+1] = (val >> 8) & 0xff; |
} |
static inline void capimsg_setu32(void *m, int off, __u32 val) |
{ |
((__u8 *)m)[off] = val & 0xff; |
((__u8 *)m)[off+1] = (val >> 8) & 0xff; |
((__u8 *)m)[off+2] = (val >> 16) & 0xff; |
((__u8 *)m)[off+3] = (val >> 24) & 0xff; |
} |
#define CAPIMSG_SETLEN(m, len) capimsg_setu16(m, 0, len) |
#define CAPIMSG_SETAPPID(m, applid) capimsg_setu16(m, 2, applid) |
#define CAPIMSG_SETCOMMAND(m,cmd) capimsg_setu8(m, 4, cmd) |
#define CAPIMSG_SETSUBCOMMAND(m, cmd) capimsg_setu8(m, 5, cmd) |
#define CAPIMSG_SETMSGID(m, msgid) capimsg_setu16(m, 6, msgid) |
#define CAPIMSG_SETCONTROL(m, contr) capimsg_setu32(m, 8, contr) |
#define CAPIMSG_SETDATALEN(m, len) capimsg_setu16(m, 16, len) |
/*----- basic-type definitions -----*/ |
typedef __u8 *_cstruct; |
typedef enum { |
CAPI_COMPOSE, |
CAPI_DEFAULT |
} _cmstruct; |
/* |
The _cmsg structure contains all possible CAPI 2.0 parameter. |
All parameters are stored here first. The function CAPI_CMSG_2_MESSAGE |
assembles the parameter and builds CAPI2.0 conform messages. |
CAPI_MESSAGE_2_CMSG disassembles CAPI 2.0 messages and stores the |
parameter in the _cmsg structure |
*/ |
typedef struct { |
/* Header */ |
__u16 ApplId; |
__u8 Command; |
__u8 Subcommand; |
__u16 Messagenumber; |
/* Parameter */ |
union { |
__u32 adrController; |
__u32 adrPLCI; |
__u32 adrNCCI; |
} adr; |
_cmstruct AdditionalInfo; |
_cstruct B1configuration; |
__u16 B1protocol; |
_cstruct B2configuration; |
__u16 B2protocol; |
_cstruct B3configuration; |
__u16 B3protocol; |
_cstruct BC; |
_cstruct BChannelinformation; |
_cmstruct BProtocol; |
_cstruct CalledPartyNumber; |
_cstruct CalledPartySubaddress; |
_cstruct CallingPartyNumber; |
_cstruct CallingPartySubaddress; |
__u32 CIPmask; |
__u32 CIPmask2; |
__u16 CIPValue; |
__u32 Class; |
_cstruct ConnectedNumber; |
_cstruct ConnectedSubaddress; |
__u32 Data; |
__u16 DataHandle; |
__u16 DataLength; |
_cstruct FacilityConfirmationParameter; |
_cstruct Facilitydataarray; |
_cstruct FacilityIndicationParameter; |
_cstruct FacilityRequestParameter; |
__u16 FacilitySelector; |
__u16 Flags; |
__u32 Function; |
_cstruct HLC; |
__u16 Info; |
_cstruct InfoElement; |
__u32 InfoMask; |
__u16 InfoNumber; |
_cstruct Keypadfacility; |
_cstruct LLC; |
_cstruct ManuData; |
__u32 ManuID; |
_cstruct NCPI; |
__u16 Reason; |
__u16 Reason_B3; |
__u16 Reject; |
_cstruct Useruserdata; |
/* intern */ |
unsigned l, p; |
unsigned char *par; |
__u8 *m; |
/* buffer to construct message */ |
__u8 buf[180]; |
} _cmsg; |
/* |
* capi_cmsg2message() assembles the parameter from _cmsg to a CAPI 2.0 |
* conform message |
*/ |
unsigned capi_cmsg2message(_cmsg * cmsg, __u8 * msg); |
/* |
* capi_message2cmsg disassembles a CAPI message an writes the parameter |
* into _cmsg for easy access |
*/ |
unsigned capi_message2cmsg(_cmsg * cmsg, __u8 * msg); |
/* |
* capi_cmsg_header() fills the _cmsg structure with default values, so only |
* parameter with non default values must be changed before sending the |
* message. |
*/ |
unsigned capi_cmsg_header(_cmsg * cmsg, __u16 _ApplId, |
__u8 _Command, __u8 _Subcommand, |
__u16 _Messagenumber, __u32 _Controller); |
/* |
* capi_info2str generated a readable string for Capi2.0 reasons. |
*/ |
char *capi_info2str(__u16 reason); |
/*-----------------------------------------------------------------------*/ |
/* |
* Debugging / Tracing functions |
*/ |
char *capi_cmd2str(__u8 cmd, __u8 subcmd); |
char *capi_cmsg2str(_cmsg * cmsg); |
char *capi_message2str(__u8 * msg); |
/*-----------------------------------------------------------------------*/ |
static inline void capi_cmsg_answer(_cmsg * cmsg) |
{ |
cmsg->Subcommand |= 0x01; |
} |
/*-----------------------------------------------------------------------*/ |
static inline void capi_fill_CONNECT_B3_REQ(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr, |
_cstruct NCPI) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x82, 0x80, Messagenumber, adr); |
cmsg->NCPI = NCPI; |
} |
static inline void capi_fill_FACILITY_REQ(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr, |
__u16 FacilitySelector, |
_cstruct FacilityRequestParameter) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x80, 0x80, Messagenumber, adr); |
cmsg->FacilitySelector = FacilitySelector; |
cmsg->FacilityRequestParameter = FacilityRequestParameter; |
} |
static inline void capi_fill_INFO_REQ(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr, |
_cstruct CalledPartyNumber, |
_cstruct BChannelinformation, |
_cstruct Keypadfacility, |
_cstruct Useruserdata, |
_cstruct Facilitydataarray) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x08, 0x80, Messagenumber, adr); |
cmsg->CalledPartyNumber = CalledPartyNumber; |
cmsg->BChannelinformation = BChannelinformation; |
cmsg->Keypadfacility = Keypadfacility; |
cmsg->Useruserdata = Useruserdata; |
cmsg->Facilitydataarray = Facilitydataarray; |
} |
static inline void capi_fill_LISTEN_REQ(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr, |
__u32 InfoMask, |
__u32 CIPmask, |
__u32 CIPmask2, |
_cstruct CallingPartyNumber, |
_cstruct CallingPartySubaddress) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x05, 0x80, Messagenumber, adr); |
cmsg->InfoMask = InfoMask; |
cmsg->CIPmask = CIPmask; |
cmsg->CIPmask2 = CIPmask2; |
cmsg->CallingPartyNumber = CallingPartyNumber; |
cmsg->CallingPartySubaddress = CallingPartySubaddress; |
} |
static inline void capi_fill_ALERT_REQ(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr, |
_cstruct BChannelinformation, |
_cstruct Keypadfacility, |
_cstruct Useruserdata, |
_cstruct Facilitydataarray) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x01, 0x80, Messagenumber, adr); |
cmsg->BChannelinformation = BChannelinformation; |
cmsg->Keypadfacility = Keypadfacility; |
cmsg->Useruserdata = Useruserdata; |
cmsg->Facilitydataarray = Facilitydataarray; |
} |
static inline void capi_fill_CONNECT_REQ(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr, |
__u16 CIPValue, |
_cstruct CalledPartyNumber, |
_cstruct CallingPartyNumber, |
_cstruct CalledPartySubaddress, |
_cstruct CallingPartySubaddress, |
__u16 B1protocol, |
__u16 B2protocol, |
__u16 B3protocol, |
_cstruct B1configuration, |
_cstruct B2configuration, |
_cstruct B3configuration, |
_cstruct BC, |
_cstruct LLC, |
_cstruct HLC, |
_cstruct BChannelinformation, |
_cstruct Keypadfacility, |
_cstruct Useruserdata, |
_cstruct Facilitydataarray) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x02, 0x80, Messagenumber, adr); |
cmsg->CIPValue = CIPValue; |
cmsg->CalledPartyNumber = CalledPartyNumber; |
cmsg->CallingPartyNumber = CallingPartyNumber; |
cmsg->CalledPartySubaddress = CalledPartySubaddress; |
cmsg->CallingPartySubaddress = CallingPartySubaddress; |
cmsg->B1protocol = B1protocol; |
cmsg->B2protocol = B2protocol; |
cmsg->B3protocol = B3protocol; |
cmsg->B1configuration = B1configuration; |
cmsg->B2configuration = B2configuration; |
cmsg->B3configuration = B3configuration; |
cmsg->BC = BC; |
cmsg->LLC = LLC; |
cmsg->HLC = HLC; |
cmsg->BChannelinformation = BChannelinformation; |
cmsg->Keypadfacility = Keypadfacility; |
cmsg->Useruserdata = Useruserdata; |
cmsg->Facilitydataarray = Facilitydataarray; |
} |
static inline void capi_fill_DATA_B3_REQ(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr, |
__u32 Data, |
__u16 DataLength, |
__u16 DataHandle, |
__u16 Flags) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x86, 0x80, Messagenumber, adr); |
cmsg->Data = Data; |
cmsg->DataLength = DataLength; |
cmsg->DataHandle = DataHandle; |
cmsg->Flags = Flags; |
} |
static inline void capi_fill_DISCONNECT_REQ(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr, |
_cstruct BChannelinformation, |
_cstruct Keypadfacility, |
_cstruct Useruserdata, |
_cstruct Facilitydataarray) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x04, 0x80, Messagenumber, adr); |
cmsg->BChannelinformation = BChannelinformation; |
cmsg->Keypadfacility = Keypadfacility; |
cmsg->Useruserdata = Useruserdata; |
cmsg->Facilitydataarray = Facilitydataarray; |
} |
static inline void capi_fill_DISCONNECT_B3_REQ(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr, |
_cstruct NCPI) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x84, 0x80, Messagenumber, adr); |
cmsg->NCPI = NCPI; |
} |
static inline void capi_fill_MANUFACTURER_REQ(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr, |
__u32 ManuID, |
__u32 Class, |
__u32 Function, |
_cstruct ManuData) |
{ |
capi_cmsg_header(cmsg, ApplId, 0xff, 0x80, Messagenumber, adr); |
cmsg->ManuID = ManuID; |
cmsg->Class = Class; |
cmsg->Function = Function; |
cmsg->ManuData = ManuData; |
} |
static inline void capi_fill_RESET_B3_REQ(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr, |
_cstruct NCPI) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x87, 0x80, Messagenumber, adr); |
cmsg->NCPI = NCPI; |
} |
static inline void capi_fill_SELECT_B_PROTOCOL_REQ(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr, |
__u16 B1protocol, |
__u16 B2protocol, |
__u16 B3protocol, |
_cstruct B1configuration, |
_cstruct B2configuration, |
_cstruct B3configuration) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x41, 0x80, Messagenumber, adr); |
cmsg->B1protocol = B1protocol; |
cmsg->B2protocol = B2protocol; |
cmsg->B3protocol = B3protocol; |
cmsg->B1configuration = B1configuration; |
cmsg->B2configuration = B2configuration; |
cmsg->B3configuration = B3configuration; |
} |
static inline void capi_fill_CONNECT_RESP(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr, |
__u16 Reject, |
__u16 B1protocol, |
__u16 B2protocol, |
__u16 B3protocol, |
_cstruct B1configuration, |
_cstruct B2configuration, |
_cstruct B3configuration, |
_cstruct ConnectedNumber, |
_cstruct ConnectedSubaddress, |
_cstruct LLC, |
_cstruct BChannelinformation, |
_cstruct Keypadfacility, |
_cstruct Useruserdata, |
_cstruct Facilitydataarray) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x02, 0x83, Messagenumber, adr); |
cmsg->Reject = Reject; |
cmsg->B1protocol = B1protocol; |
cmsg->B2protocol = B2protocol; |
cmsg->B3protocol = B3protocol; |
cmsg->B1configuration = B1configuration; |
cmsg->B2configuration = B2configuration; |
cmsg->B3configuration = B3configuration; |
cmsg->ConnectedNumber = ConnectedNumber; |
cmsg->ConnectedSubaddress = ConnectedSubaddress; |
cmsg->LLC = LLC; |
cmsg->BChannelinformation = BChannelinformation; |
cmsg->Keypadfacility = Keypadfacility; |
cmsg->Useruserdata = Useruserdata; |
cmsg->Facilitydataarray = Facilitydataarray; |
} |
static inline void capi_fill_CONNECT_ACTIVE_RESP(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x03, 0x83, Messagenumber, adr); |
} |
static inline void capi_fill_CONNECT_B3_ACTIVE_RESP(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x83, 0x83, Messagenumber, adr); |
} |
static inline void capi_fill_CONNECT_B3_RESP(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr, |
__u16 Reject, |
_cstruct NCPI) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x82, 0x83, Messagenumber, adr); |
cmsg->Reject = Reject; |
cmsg->NCPI = NCPI; |
} |
static inline void capi_fill_CONNECT_B3_T90_ACTIVE_RESP(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x88, 0x83, Messagenumber, adr); |
} |
static inline void capi_fill_DATA_B3_RESP(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr, |
__u16 DataHandle) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x86, 0x83, Messagenumber, adr); |
cmsg->DataHandle = DataHandle; |
} |
static inline void capi_fill_DISCONNECT_B3_RESP(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x84, 0x83, Messagenumber, adr); |
} |
static inline void capi_fill_DISCONNECT_RESP(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x04, 0x83, Messagenumber, adr); |
} |
static inline void capi_fill_FACILITY_RESP(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr, |
__u16 FacilitySelector) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x80, 0x83, Messagenumber, adr); |
cmsg->FacilitySelector = FacilitySelector; |
} |
static inline void capi_fill_INFO_RESP(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x08, 0x83, Messagenumber, adr); |
} |
static inline void capi_fill_MANUFACTURER_RESP(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr, |
__u32 ManuID, |
__u32 Class, |
__u32 Function, |
_cstruct ManuData) |
{ |
capi_cmsg_header(cmsg, ApplId, 0xff, 0x83, Messagenumber, adr); |
cmsg->ManuID = ManuID; |
cmsg->Class = Class; |
cmsg->Function = Function; |
cmsg->ManuData = ManuData; |
} |
static inline void capi_fill_RESET_B3_RESP(_cmsg * cmsg, __u16 ApplId, __u16 Messagenumber, |
__u32 adr) |
{ |
capi_cmsg_header(cmsg, ApplId, 0x87, 0x83, Messagenumber, adr); |
} |
#endif /* __CAPIUTIL_H__ */ |
/shark/trunk/drivers/linuxc26/include/linux/isdn/capilli.h |
---|
0,0 → 1,97 |
/* $Id: capilli.h,v 1.1 2004-01-28 15:32:45 giacomo Exp $ |
* |
* Kernel CAPI 2.0 Driver Interface for Linux |
* |
* Copyright 1999 by Carsten Paeth <calle@calle.de> |
* |
* This software may be used and distributed according to the terms |
* of the GNU General Public License, incorporated herein by reference. |
* |
*/ |
#ifndef __CAPILLI_H__ |
#define __CAPILLI_H__ |
#include <linux/kernel.h> |
#include <linux/list.h> |
#include <linux/capi.h> |
#include <linux/kernelcapi.h> |
typedef struct capiloaddatapart { |
int user; /* data in userspace ? */ |
int len; |
unsigned char *data; |
} capiloaddatapart; |
typedef struct capiloaddata { |
capiloaddatapart firmware; |
capiloaddatapart configuration; |
} capiloaddata; |
typedef struct capicardparams { |
unsigned int port; |
unsigned irq; |
int cardtype; |
int cardnr; |
unsigned int membase; |
} capicardparams; |
struct capi_ctr { |
/* filled in before calling attach_capi_ctr */ |
struct module *owner; |
void *driverdata; /* driver specific */ |
char name[32]; /* name of controller */ |
char *driver_name; /* name of driver */ |
int (*load_firmware)(struct capi_ctr *, capiloaddata *); |
void (*reset_ctr)(struct capi_ctr *); |
void (*register_appl)(struct capi_ctr *, u16 appl, |
capi_register_params *); |
void (*release_appl)(struct capi_ctr *, u16 appl); |
u16 (*send_message)(struct capi_ctr *, struct sk_buff *skb); |
char *(*procinfo)(struct capi_ctr *); |
int (*ctr_read_proc)(char *page, char **start, off_t off, |
int count, int *eof, struct capi_ctr *card); |
/* filled in before calling ready callback */ |
u8 manu[CAPI_MANUFACTURER_LEN]; /* CAPI_GET_MANUFACTURER */ |
capi_version version; /* CAPI_GET_VERSION */ |
capi_profile profile; /* CAPI_GET_PROFILE */ |
u8 serial[CAPI_SERIAL_LEN]; /* CAPI_GET_SERIAL */ |
/* management information for kcapi */ |
unsigned long nrecvctlpkt; |
unsigned long nrecvdatapkt; |
unsigned long nsentctlpkt; |
unsigned long nsentdatapkt; |
int cnr; /* controller number */ |
volatile unsigned short cardstate; /* controller state */ |
volatile int blocked; /* output blocked */ |
int traceflag; /* capi trace */ |
struct proc_dir_entry *procent; |
char procfn[128]; |
}; |
int attach_capi_ctr(struct capi_ctr *); |
int detach_capi_ctr(struct capi_ctr *); |
void capi_ctr_ready(struct capi_ctr * card); |
void capi_ctr_reseted(struct capi_ctr * card); |
void capi_ctr_suspend_output(struct capi_ctr * card); |
void capi_ctr_resume_output(struct capi_ctr * card); |
void capi_ctr_handle_message(struct capi_ctr * card, u16 appl, struct sk_buff *skb); |
// --------------------------------------------------------------------------- |
// library functions for use by hardware controller drivers |
void capilib_new_ncci(struct list_head *head, u16 applid, u32 ncci, u32 winsize); |
void capilib_free_ncci(struct list_head *head, u16 applid, u32 ncci); |
void capilib_release_appl(struct list_head *head, u16 applid); |
void capilib_release(struct list_head *head); |
void capilib_data_b3_conf(struct list_head *head, u16 applid, u32 ncci, u16 msgid); |
u16 capilib_data_b3_req(struct list_head *head, u16 applid, u32 ncci, u16 msgid); |
#endif /* __CAPILLI_H__ */ |
/shark/trunk/drivers/linuxc26/include/linux/isdn/capicmd.h |
---|
0,0 → 1,115 |
/* $Id: capicmd.h,v 1.1 2004-01-28 15:32:45 giacomo Exp $ |
* |
* CAPI 2.0 Interface for Linux |
* |
* Copyright 1997 by Carsten Paeth <calle@calle.de> |
* |
* This software may be used and distributed according to the terms |
* of the GNU General Public License, incorporated herein by reference. |
* |
*/ |
#ifndef __CAPICMD_H__ |
#define __CAPICMD_H__ |
#define CAPI_MSG_BASELEN 8 |
#define CAPI_DATA_B3_REQ_LEN (CAPI_MSG_BASELEN+4+4+2+2+2) |
#define CAPI_DATA_B3_RESP_LEN (CAPI_MSG_BASELEN+4+2) |
/*----- CAPI commands -----*/ |
#define CAPI_ALERT 0x01 |
#define CAPI_CONNECT 0x02 |
#define CAPI_CONNECT_ACTIVE 0x03 |
#define CAPI_CONNECT_B3_ACTIVE 0x83 |
#define CAPI_CONNECT_B3 0x82 |
#define CAPI_CONNECT_B3_T90_ACTIVE 0x88 |
#define CAPI_DATA_B3 0x86 |
#define CAPI_DISCONNECT_B3 0x84 |
#define CAPI_DISCONNECT 0x04 |
#define CAPI_FACILITY 0x80 |
#define CAPI_INFO 0x08 |
#define CAPI_LISTEN 0x05 |
#define CAPI_MANUFACTURER 0xff |
#define CAPI_RESET_B3 0x87 |
#define CAPI_SELECT_B_PROTOCOL 0x41 |
/*----- CAPI subcommands -----*/ |
#define CAPI_REQ 0x80 |
#define CAPI_CONF 0x81 |
#define CAPI_IND 0x82 |
#define CAPI_RESP 0x83 |
/*----- CAPI combined commands -----*/ |
#define CAPICMD(cmd,subcmd) (((cmd)<<8)|(subcmd)) |
#define CAPI_DISCONNECT_REQ CAPICMD(CAPI_DISCONNECT,CAPI_REQ) |
#define CAPI_DISCONNECT_CONF CAPICMD(CAPI_DISCONNECT,CAPI_CONF) |
#define CAPI_DISCONNECT_IND CAPICMD(CAPI_DISCONNECT,CAPI_IND) |
#define CAPI_DISCONNECT_RESP CAPICMD(CAPI_DISCONNECT,CAPI_RESP) |
#define CAPI_ALERT_REQ CAPICMD(CAPI_ALERT,CAPI_REQ) |
#define CAPI_ALERT_CONF CAPICMD(CAPI_ALERT,CAPI_CONF) |
#define CAPI_CONNECT_REQ CAPICMD(CAPI_CONNECT,CAPI_REQ) |
#define CAPI_CONNECT_CONF CAPICMD(CAPI_CONNECT,CAPI_CONF) |
#define CAPI_CONNECT_IND CAPICMD(CAPI_CONNECT,CAPI_IND) |
#define CAPI_CONNECT_RESP CAPICMD(CAPI_CONNECT,CAPI_RESP) |
#define CAPI_CONNECT_ACTIVE_REQ CAPICMD(CAPI_CONNECT_ACTIVE,CAPI_REQ) |
#define CAPI_CONNECT_ACTIVE_CONF CAPICMD(CAPI_CONNECT_ACTIVE,CAPI_CONF) |
#define CAPI_CONNECT_ACTIVE_IND CAPICMD(CAPI_CONNECT_ACTIVE,CAPI_IND) |
#define CAPI_CONNECT_ACTIVE_RESP CAPICMD(CAPI_CONNECT_ACTIVE,CAPI_RESP) |
#define CAPI_SELECT_B_PROTOCOL_REQ CAPICMD(CAPI_SELECT_B_PROTOCOL,CAPI_REQ) |
#define CAPI_SELECT_B_PROTOCOL_CONF CAPICMD(CAPI_SELECT_B_PROTOCOL,CAPI_CONF) |
#define CAPI_CONNECT_B3_ACTIVE_REQ CAPICMD(CAPI_CONNECT_B3_ACTIVE,CAPI_REQ) |
#define CAPI_CONNECT_B3_ACTIVE_CONF CAPICMD(CAPI_CONNECT_B3_ACTIVE,CAPI_CONF) |
#define CAPI_CONNECT_B3_ACTIVE_IND CAPICMD(CAPI_CONNECT_B3_ACTIVE,CAPI_IND) |
#define CAPI_CONNECT_B3_ACTIVE_RESP CAPICMD(CAPI_CONNECT_B3_ACTIVE,CAPI_RESP) |
#define CAPI_CONNECT_B3_REQ CAPICMD(CAPI_CONNECT_B3,CAPI_REQ) |
#define CAPI_CONNECT_B3_CONF CAPICMD(CAPI_CONNECT_B3,CAPI_CONF) |
#define CAPI_CONNECT_B3_IND CAPICMD(CAPI_CONNECT_B3,CAPI_IND) |
#define CAPI_CONNECT_B3_RESP CAPICMD(CAPI_CONNECT_B3,CAPI_RESP) |
#define CAPI_CONNECT_B3_T90_ACTIVE_IND CAPICMD(CAPI_CONNECT_B3_T90_ACTIVE,CAPI_IND) |
#define CAPI_CONNECT_B3_T90_ACTIVE_RESP CAPICMD(CAPI_CONNECT_B3_T90_ACTIVE,CAPI_RESP) |
#define CAPI_DATA_B3_REQ CAPICMD(CAPI_DATA_B3,CAPI_REQ) |
#define CAPI_DATA_B3_CONF CAPICMD(CAPI_DATA_B3,CAPI_CONF) |
#define CAPI_DATA_B3_IND CAPICMD(CAPI_DATA_B3,CAPI_IND) |
#define CAPI_DATA_B3_RESP CAPICMD(CAPI_DATA_B3,CAPI_RESP) |
#define CAPI_DISCONNECT_B3_REQ CAPICMD(CAPI_DISCONNECT_B3,CAPI_REQ) |
#define CAPI_DISCONNECT_B3_CONF CAPICMD(CAPI_DISCONNECT_B3,CAPI_CONF) |
#define CAPI_DISCONNECT_B3_IND CAPICMD(CAPI_DISCONNECT_B3,CAPI_IND) |
#define CAPI_DISCONNECT_B3_RESP CAPICMD(CAPI_DISCONNECT_B3,CAPI_RESP) |
#define CAPI_RESET_B3_REQ CAPICMD(CAPI_RESET_B3,CAPI_REQ) |
#define CAPI_RESET_B3_CONF CAPICMD(CAPI_RESET_B3,CAPI_CONF) |
#define CAPI_RESET_B3_IND CAPICMD(CAPI_RESET_B3,CAPI_IND) |
#define CAPI_RESET_B3_RESP CAPICMD(CAPI_RESET_B3,CAPI_RESP) |
#define CAPI_LISTEN_REQ CAPICMD(CAPI_LISTEN,CAPI_REQ) |
#define CAPI_LISTEN_CONF CAPICMD(CAPI_LISTEN,CAPI_CONF) |
#define CAPI_MANUFACTURER_REQ CAPICMD(CAPI_MANUFACTURER,CAPI_REQ) |
#define CAPI_MANUFACTURER_CONF CAPICMD(CAPI_MANUFACTURER,CAPI_CONF) |
#define CAPI_MANUFACTURER_IND CAPICMD(CAPI_MANUFACTURER,CAPI_IND) |
#define CAPI_MANUFACTURER_RESP CAPICMD(CAPI_MANUFACTURER,CAPI_RESP) |
#define CAPI_FACILITY_REQ CAPICMD(CAPI_FACILITY,CAPI_REQ) |
#define CAPI_FACILITY_CONF CAPICMD(CAPI_FACILITY,CAPI_CONF) |
#define CAPI_FACILITY_IND CAPICMD(CAPI_FACILITY,CAPI_IND) |
#define CAPI_FACILITY_RESP CAPICMD(CAPI_FACILITY,CAPI_RESP) |
#define CAPI_INFO_REQ CAPICMD(CAPI_INFO,CAPI_REQ) |
#define CAPI_INFO_CONF CAPICMD(CAPI_INFO,CAPI_CONF) |
#define CAPI_INFO_IND CAPICMD(CAPI_INFO,CAPI_IND) |
#define CAPI_INFO_RESP CAPICMD(CAPI_INFO,CAPI_RESP) |
#endif /* __CAPICMD_H__ */ |
/shark/trunk/drivers/linuxc26/include/linux/isdn/tpam.h |
---|
0,0 → 1,56 |
/* $Id: tpam.h,v 1.1 2004-01-28 15:32:46 giacomo Exp $ |
* |
* Turbo PAM ISDN driver for Linux. (Kernel Driver) |
* |
* Copyright 2001 Stelian Pop <stelian.pop@fr.alcove.com>, Alcôve |
* |
* For all support questions please contact: <support@auvertech.fr> |
* |
* This program is free software; you can redistribute it and/or modify |
* it under the terms of the GNU General Public License as published by |
* the Free Software Foundation; either version 2, or (at your option) |
* any later version. |
* |
* This program is distributed in the hope that it will be useful, |
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
* GNU General Public License for more details. |
* |
* You should have received a copy of the GNU General Public License |
* along with this program; if not, write to the Free Software |
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
* |
*/ |
#ifndef _TPAM_H_ |
#define _TPAM_H_ |
#include <linux/types.h> |
#include <linux/pci.h> |
/* IOCTL commands */ |
#define TPAM_CMD_DSPLOAD 0x0001 |
#define TPAM_CMD_DSPSAVE 0x0002 |
#define TPAM_CMD_DSPRUN 0x0003 |
#define TPAM_CMD_LOOPMODEON 0x0004 |
#define TPAM_CMD_LOOPMODEOFF 0x0005 |
/* addresses of debug information zones on board */ |
#define TPAM_TRAPAUDIT_REGISTER 0x005493e4 |
#define TPAM_NCOAUDIT_REGISTER 0x00500000 |
#define TPAM_MSGAUDIT_REGISTER 0x008E30F0 |
/* length of debug information zones on board */ |
#define TPAM_TRAPAUDIT_LENGTH 10000 |
#define TPAM_NCOAUDIT_LENGTH 300000 |
#define TPAM_NCOAUDIT_COUNT 30 |
#define TPAM_MSGAUDIT_LENGTH 60000 |
/* IOCTL load/save parameter */ |
typedef struct tpam_dsp_ioctl { |
__u32 address; /* address to load/save data */ |
__u32 data_len; /* size of data to be loaded/saved */ |
__u8 data[0]; /* data */ |
} tpam_dsp_ioctl; |
#endif /* _TPAM_H_ */ |
/shark/trunk/drivers/linuxc26/include/linux/isdn/fsm.h |
---|
0,0 → 1,58 |
/* Linux ISDN subsystem, finite state machine |
* |
* Author Karsten Keil |
* Copyright by Karsten Keil <keil@isdn4linux.de> |
* 2001-2002 by Kai Germaschewski <kai@germaschewski.name> |
* |
* This software may be used and distributed according to the terms |
* of the GNU General Public License, incorporated herein by reference. |
*/ |
#ifndef __ISDN_FSM_H__ |
#define __ISDN_FSM_H__ |
#include <linux/kernel.h> |
#include <linux/timer.h> |
struct fsm_inst; |
typedef int (*fsm_fn)(struct fsm_inst *, int, void *); |
struct fsm { |
fsm_fn *jumpmatrix; |
int st_cnt, ev_cnt, fn_cnt; |
char **st_str, **ev_str; |
struct fsm_node *fn_tbl; |
}; |
struct fsm_inst { |
struct fsm *fsm; |
int state; |
int debug; |
void *userdata; |
int userint; |
void (*printdebug) (struct fsm_inst *, char *, ...); |
}; |
struct fsm_node { |
int st, ev; |
fsm_fn fn; |
}; |
struct fsm_timer { |
struct fsm_inst *fi; |
struct timer_list tl; |
int ev; |
void *arg; |
}; |
int fsm_new(struct fsm *fsm); |
void fsm_free(struct fsm *fsm); |
int fsm_event(struct fsm_inst *fi, int event, void *arg); |
void fsm_change_state(struct fsm_inst *fi, int newstate); |
void fsm_init_timer(struct fsm_inst *fi, struct fsm_timer *ft); |
int fsm_add_timer(struct fsm_timer *ft, int timeout, int event); |
void fsm_mod_timer(struct fsm_timer *ft, int timeout, int event); |
void fsm_del_timer(struct fsm_timer *ft); |
#endif |
/shark/trunk/drivers/linuxc26/include/linux/hdlc/ioctl.h |
---|
0,0 → 1,48 |
#ifndef __HDLC_IOCTL_H__ |
#define __HDLC_IOCTL_H__ |
typedef struct { |
unsigned int clock_rate; /* bits per second */ |
unsigned int clock_type; /* internal, external, TX-internal etc. */ |
unsigned short loopback; |
} sync_serial_settings; /* V.35, V.24, X.21 */ |
typedef struct { |
unsigned int clock_rate; /* bits per second */ |
unsigned int clock_type; /* internal, external, TX-internal etc. */ |
unsigned short loopback; |
unsigned int slot_map; |
} te1_settings; /* T1, E1 */ |
typedef struct { |
unsigned short encoding; |
unsigned short parity; |
} raw_hdlc_proto; |
typedef struct { |
unsigned int t391; |
unsigned int t392; |
unsigned int n391; |
unsigned int n392; |
unsigned int n393; |
unsigned short lmi; |
unsigned short dce; /* 1 for DCE (network side) operation */ |
} fr_proto; |
typedef struct { |
unsigned int dlci; |
} fr_proto_pvc; /* for creating/deleting FR PVCs */ |
typedef struct { |
unsigned int dlci; |
char master[IFNAMSIZ]; /* Name of master FRAD device */ |
}fr_proto_pvc_info; /* for returning PVC information only */ |
typedef struct { |
unsigned int interval; |
unsigned int timeout; |
} cisco_proto; |
/* PPP doesn't need any info now - supply length = 0 to ioctl */ |
#endif /* __HDLC_IOCTL_H__ */ |
/shark/trunk/drivers/linuxc26/include/linux/lockd/bind.h |
---|
0,0 → 1,36 |
/* |
* linux/include/linux/lockd/bind.h |
* |
* This is the part of lockd visible to nfsd and the nfs client. |
* |
* Copyright (C) 1996, Olaf Kirch <okir@monad.swb.de> |
*/ |
#ifndef LINUX_LOCKD_BIND_H |
#define LINUX_LOCKD_BIND_H |
#include <linux/lockd/nlm.h> |
/* Dummy declarations */ |
struct svc_rqst; |
/* |
* This is the set of functions for lockd->nfsd communication |
*/ |
struct nlmsvc_binding { |
u32 (*fopen)(struct svc_rqst *, |
struct nfs_fh *, |
struct file *); |
void (*fclose)(struct file *); |
}; |
extern struct nlmsvc_binding * nlmsvc_ops; |
/* |
* Functions exported by the lockd module |
*/ |
extern int nlmclnt_proc(struct inode *, int, struct file_lock *); |
extern int lockd_up(void); |
extern void lockd_down(void); |
#endif /* LINUX_LOCKD_BIND_H */ |
/shark/trunk/drivers/linuxc26/include/linux/lockd/lockd.h |
---|
0,0 → 1,209 |
/* |
* linux/include/linux/lockd/lockd.h |
* |
* General-purpose lockd include file. |
* |
* Copyright (C) 1996 Olaf Kirch <okir@monad.swb.de> |
*/ |
#ifndef LINUX_LOCKD_LOCKD_H |
#define LINUX_LOCKD_LOCKD_H |
#ifdef __KERNEL__ |
#include <linux/config.h> |
#include <linux/in.h> |
#include <linux/fs.h> |
#include <linux/utsname.h> |
#include <linux/nfsd/nfsfh.h> |
#include <linux/lockd/bind.h> |
#include <linux/lockd/xdr.h> |
#ifdef CONFIG_LOCKD_V4 |
#include <linux/lockd/xdr4.h> |
#endif |
#include <linux/lockd/debug.h> |
/* |
* Version string |
*/ |
#define LOCKD_VERSION "0.5" |
/* |
* Default timeout for RPC calls (seconds) |
*/ |
#define LOCKD_DFLT_TIMEO 10 |
/* |
* Lockd host handle (used both by the client and server personality). |
*/ |
struct nlm_host { |
struct nlm_host * h_next; /* linked list (hash table) */ |
struct sockaddr_in h_addr; /* peer address */ |
struct rpc_clnt * h_rpcclnt; /* RPC client to talk to peer */ |
char h_name[20]; /* remote hostname */ |
u32 h_version; /* interface version */ |
rpc_authflavor_t h_authflavor; /* RPC authentication type */ |
unsigned short h_proto; /* transport proto */ |
unsigned short h_reclaiming : 1, |
h_server : 1, /* server side, not client side */ |
h_inuse : 1, |
h_killed : 1, |
h_monitored : 1; |
wait_queue_head_t h_gracewait; /* wait while reclaiming */ |
u32 h_state; /* pseudo-state counter */ |
u32 h_nsmstate; /* true remote NSM state */ |
unsigned int h_count; /* reference count */ |
struct semaphore h_sema; /* mutex for pmap binding */ |
unsigned long h_nextrebind; /* next portmap call */ |
unsigned long h_expires; /* eligible for GC */ |
}; |
/* |
* Memory chunk for NLM client RPC request. |
*/ |
#define NLMCLNT_OHSIZE (sizeof(system_utsname.nodename)+10) |
struct nlm_rqst { |
unsigned int a_flags; /* initial RPC task flags */ |
struct nlm_host * a_host; /* host handle */ |
struct nlm_args a_args; /* arguments */ |
struct nlm_res a_res; /* result */ |
char a_owner[NLMCLNT_OHSIZE]; |
}; |
/* |
* This struct describes a file held open by lockd on behalf of |
* an NFS client. |
*/ |
struct nlm_file { |
struct nlm_file * f_next; /* linked list */ |
struct nfs_fh f_handle; /* NFS file handle */ |
struct file f_file; /* VFS file pointer */ |
struct nlm_share * f_shares; /* DOS shares */ |
struct nlm_block * f_blocks; /* blocked locks */ |
unsigned int f_locks; /* guesstimate # of locks */ |
unsigned int f_count; /* reference count */ |
struct semaphore f_sema; /* avoid concurrent access */ |
int f_hash; /* hash of f_handle */ |
}; |
/* |
* This is a server block (i.e. a lock requested by some client which |
* couldn't be granted because of a conflicting lock). |
*/ |
#define NLM_NEVER (~(unsigned long) 0) |
struct nlm_block { |
struct nlm_block * b_next; /* linked list (all blocks) */ |
struct nlm_block * b_fnext; /* linked list (per file) */ |
struct nlm_rqst b_call; /* RPC args & callback info */ |
struct svc_serv * b_daemon; /* NLM service */ |
struct nlm_host * b_host; /* host handle for RPC clnt */ |
unsigned long b_when; /* next re-xmit */ |
unsigned int b_id; /* block id */ |
unsigned char b_queued; /* re-queued */ |
unsigned char b_granted; /* VFS granted lock */ |
unsigned char b_incall; /* doing callback */ |
unsigned char b_done; /* callback complete */ |
struct nlm_file * b_file; /* file in question */ |
}; |
/* |
* Valid actions for nlmsvc_traverse_files |
*/ |
#define NLM_ACT_CHECK 0 /* check for locks */ |
#define NLM_ACT_MARK 1 /* mark & sweep */ |
#define NLM_ACT_UNLOCK 2 /* release all locks */ |
/* |
* Global variables |
*/ |
extern struct rpc_program nlm_program; |
extern struct svc_procedure nlmsvc_procedures[]; |
#ifdef CONFIG_LOCKD_V4 |
extern struct svc_procedure nlmsvc_procedures4[]; |
#endif |
extern int nlmsvc_grace_period; |
extern unsigned long nlmsvc_timeout; |
/* |
* Lockd client functions |
*/ |
struct nlm_rqst * nlmclnt_alloc_call(void); |
int nlmclnt_call(struct nlm_rqst *, u32); |
int nlmclnt_async_call(struct nlm_rqst *, u32, rpc_action); |
int nlmclnt_block(struct nlm_host *, struct file_lock *, u32 *); |
int nlmclnt_cancel(struct nlm_host *, struct file_lock *); |
u32 nlmclnt_grant(struct nlm_lock *); |
void nlmclnt_recovery(struct nlm_host *, u32); |
int nlmclnt_reclaim(struct nlm_host *, struct file_lock *); |
int nlmclnt_setgrantargs(struct nlm_rqst *, struct nlm_lock *); |
void nlmclnt_freegrantargs(struct nlm_rqst *); |
/* |
* Host cache |
*/ |
struct nlm_host * nlmclnt_lookup_host(struct sockaddr_in *, int, int); |
struct nlm_host * nlmsvc_lookup_host(struct svc_rqst *); |
struct nlm_host * nlm_lookup_host(int server, struct sockaddr_in *, int, int); |
struct rpc_clnt * nlm_bind_host(struct nlm_host *); |
void nlm_rebind_host(struct nlm_host *); |
struct nlm_host * nlm_get_host(struct nlm_host *); |
void nlm_release_host(struct nlm_host *); |
void nlm_shutdown_hosts(void); |
extern struct nlm_host *nlm_find_client(void); |
/* |
* Server-side lock handling |
*/ |
int nlmsvc_async_call(struct nlm_rqst *, u32, rpc_action); |
u32 nlmsvc_lock(struct svc_rqst *, struct nlm_file *, |
struct nlm_lock *, int, struct nlm_cookie *); |
u32 nlmsvc_unlock(struct nlm_file *, struct nlm_lock *); |
u32 nlmsvc_testlock(struct nlm_file *, struct nlm_lock *, |
struct nlm_lock *); |
u32 nlmsvc_cancel_blocked(struct nlm_file *, struct nlm_lock *); |
unsigned long nlmsvc_retry_blocked(void); |
int nlmsvc_traverse_blocks(struct nlm_host *, struct nlm_file *, |
int action); |
/* |
* File handling for the server personality |
*/ |
u32 nlm_lookup_file(struct svc_rqst *, struct nlm_file **, |
struct nfs_fh *); |
void nlm_release_file(struct nlm_file *); |
void nlmsvc_mark_resources(void); |
void nlmsvc_free_host_resources(struct nlm_host *); |
void nlmsvc_invalidate_all(void); |
static __inline__ struct inode * |
nlmsvc_file_inode(struct nlm_file *file) |
{ |
return file->f_file.f_dentry->d_inode; |
} |
/* |
* Compare two host addresses (needs modifying for ipv6) |
*/ |
static __inline__ int |
nlm_cmp_addr(struct sockaddr_in *sin1, struct sockaddr_in *sin2) |
{ |
return sin1->sin_addr.s_addr == sin2->sin_addr.s_addr; |
} |
/* |
* Compare two NLM locks. |
* When the second lock is of type F_UNLCK, this acts like a wildcard. |
*/ |
static __inline__ int |
nlm_compare_locks(struct file_lock *fl1, struct file_lock *fl2) |
{ |
return fl1->fl_pid == fl2->fl_pid |
&& fl1->fl_start == fl2->fl_start |
&& fl1->fl_end == fl2->fl_end |
&&(fl1->fl_type == fl2->fl_type || fl2->fl_type == F_UNLCK); |
} |
#endif /* __KERNEL__ */ |
#endif /* LINUX_LOCKD_LOCKD_H */ |
/shark/trunk/drivers/linuxc26/include/linux/lockd/xdr.h |
---|
0,0 → 1,108 |
/* |
* linux/include/linux/lockd/xdr.h |
* |
* XDR types for the NLM protocol |
* |
* Copyright (C) 1996 Olaf Kirch <okir@monad.swb.de> |
*/ |
#ifndef LOCKD_XDR_H |
#define LOCKD_XDR_H |
#include <linux/fs.h> |
#include <linux/nfs.h> |
#include <linux/sunrpc/xdr.h> |
#define NLM_MAXSTRLEN 1024 |
#define QUADLEN(len) (((len) + 3) >> 2) |
#define nlm_granted __constant_htonl(NLM_LCK_GRANTED) |
#define nlm_lck_denied __constant_htonl(NLM_LCK_DENIED) |
#define nlm_lck_denied_nolocks __constant_htonl(NLM_LCK_DENIED_NOLOCKS) |
#define nlm_lck_blocked __constant_htonl(NLM_LCK_BLOCKED) |
#define nlm_lck_denied_grace_period __constant_htonl(NLM_LCK_DENIED_GRACE_PERIOD) |
/* Lock info passed via NLM */ |
struct nlm_lock { |
char * caller; |
int len; /* length of "caller" */ |
struct nfs_fh fh; |
struct xdr_netobj oh; |
struct file_lock fl; |
}; |
/* |
* NLM cookies. Technically they can be 1K, Nobody uses over 8 bytes |
* however. |
*/ |
struct nlm_cookie |
{ |
unsigned char data[8]; |
unsigned int len; |
}; |
/* |
* Generic lockd arguments for all but sm_notify |
*/ |
struct nlm_args { |
struct nlm_cookie cookie; |
struct nlm_lock lock; |
u32 block; |
u32 reclaim; |
u32 state; |
u32 monitor; |
u32 fsm_access; |
u32 fsm_mode; |
}; |
typedef struct nlm_args nlm_args; |
/* |
* Generic lockd result |
*/ |
struct nlm_res { |
struct nlm_cookie cookie; |
u32 status; |
struct nlm_lock lock; |
}; |
/* |
* statd callback when client has rebooted |
*/ |
struct nlm_reboot { |
char * mon; |
int len; |
u32 state; |
u32 addr; |
u32 vers; |
u32 proto; |
}; |
/* |
* Contents of statd callback when monitored host rebooted |
*/ |
#define NLMSVC_XDRSIZE sizeof(struct nlm_args) |
int nlmsvc_decode_testargs(struct svc_rqst *, u32 *, struct nlm_args *); |
int nlmsvc_encode_testres(struct svc_rqst *, u32 *, struct nlm_res *); |
int nlmsvc_decode_lockargs(struct svc_rqst *, u32 *, struct nlm_args *); |
int nlmsvc_decode_cancargs(struct svc_rqst *, u32 *, struct nlm_args *); |
int nlmsvc_decode_unlockargs(struct svc_rqst *, u32 *, struct nlm_args *); |
int nlmsvc_encode_res(struct svc_rqst *, u32 *, struct nlm_res *); |
int nlmsvc_decode_res(struct svc_rqst *, u32 *, struct nlm_res *); |
int nlmsvc_encode_void(struct svc_rqst *, u32 *, void *); |
int nlmsvc_decode_void(struct svc_rqst *, u32 *, void *); |
int nlmsvc_decode_shareargs(struct svc_rqst *, u32 *, struct nlm_args *); |
int nlmsvc_encode_shareres(struct svc_rqst *, u32 *, struct nlm_res *); |
int nlmsvc_decode_notify(struct svc_rqst *, u32 *, struct nlm_args *); |
int nlmsvc_decode_reboot(struct svc_rqst *, u32 *, struct nlm_reboot *); |
/* |
int nlmclt_encode_testargs(struct rpc_rqst *, u32 *, struct nlm_args *); |
int nlmclt_encode_lockargs(struct rpc_rqst *, u32 *, struct nlm_args *); |
int nlmclt_encode_cancargs(struct rpc_rqst *, u32 *, struct nlm_args *); |
int nlmclt_encode_unlockargs(struct rpc_rqst *, u32 *, struct nlm_args *); |
*/ |
#endif /* LOCKD_XDR_H */ |
/shark/trunk/drivers/linuxc26/include/linux/lockd/sm_inter.h |
---|
0,0 → 1,46 |
/* |
* linux/include/linux/lockd/sm_inter.h |
* |
* Declarations for the kernel statd client. |
* |
* Copyright (C) 1996, Olaf Kirch <okir@monad.swb.de> |
*/ |
#ifndef LINUX_LOCKD_SM_INTER_H |
#define LINUX_LOCKD_SM_INTER_H |
#define SM_PROGRAM 100024 |
#define SM_VERSION 1 |
#define SM_STAT 1 |
#define SM_MON 2 |
#define SM_UNMON 3 |
#define SM_UNMON_ALL 4 |
#define SM_SIMU_CRASH 5 |
#define SM_NOTIFY 6 |
#define SM_MAXSTRLEN 1024 |
/* |
* Arguments for all calls to statd |
*/ |
struct nsm_args { |
u32 addr; /* remote address */ |
u32 prog; /* RPC callback info */ |
u32 vers; |
u32 proc; |
u32 proto; /* protocol (udp/tcp) plus server/client flag */ |
}; |
/* |
* Result returned by statd |
*/ |
struct nsm_res { |
u32 status; |
u32 state; |
}; |
int nsm_monitor(struct nlm_host *); |
int nsm_unmonitor(struct nlm_host *); |
extern u32 nsm_local_state; |
#endif /* LINUX_LOCKD_SM_INTER_H */ |
/shark/trunk/drivers/linuxc26/include/linux/lockd/xdr4.h |
---|
0,0 → 1,46 |
/* |
* linux/include/linux/lockd/xdr.h |
* |
* XDR types for the NLM protocol |
* |
* Copyright (C) 1996 Olaf Kirch <okir@monad.swb.de> |
*/ |
#ifndef LOCKD_XDR4_H |
#define LOCKD_XDR4_H |
#include <linux/fs.h> |
#include <linux/nfs.h> |
#include <linux/sunrpc/xdr.h> |
#include <linux/lockd/xdr.h> |
/* error codes new to NLMv4 */ |
#define nlm4_deadlock __constant_htonl(NLM_DEADLCK) |
#define nlm4_rofs __constant_htonl(NLM_ROFS) |
#define nlm4_stale_fh __constant_htonl(NLM_STALE_FH) |
#define nlm4_fbig __constant_htonl(NLM_FBIG) |
#define nlm4_failed __constant_htonl(NLM_FAILED) |
int nlm4svc_decode_testargs(struct svc_rqst *, u32 *, struct nlm_args *); |
int nlm4svc_encode_testres(struct svc_rqst *, u32 *, struct nlm_res *); |
int nlm4svc_decode_lockargs(struct svc_rqst *, u32 *, struct nlm_args *); |
int nlm4svc_decode_cancargs(struct svc_rqst *, u32 *, struct nlm_args *); |
int nlm4svc_decode_unlockargs(struct svc_rqst *, u32 *, struct nlm_args *); |
int nlm4svc_encode_res(struct svc_rqst *, u32 *, struct nlm_res *); |
int nlm4svc_decode_res(struct svc_rqst *, u32 *, struct nlm_res *); |
int nlm4svc_encode_void(struct svc_rqst *, u32 *, void *); |
int nlm4svc_decode_void(struct svc_rqst *, u32 *, void *); |
int nlm4svc_decode_shareargs(struct svc_rqst *, u32 *, struct nlm_args *); |
int nlm4svc_encode_shareres(struct svc_rqst *, u32 *, struct nlm_res *); |
int nlm4svc_decode_notify(struct svc_rqst *, u32 *, struct nlm_args *); |
int nlm4svc_decode_reboot(struct svc_rqst *, u32 *, struct nlm_reboot *); |
/* |
int nlmclt_encode_testargs(struct rpc_rqst *, u32 *, struct nlm_args *); |
int nlmclt_encode_lockargs(struct rpc_rqst *, u32 *, struct nlm_args *); |
int nlmclt_encode_cancargs(struct rpc_rqst *, u32 *, struct nlm_args *); |
int nlmclt_encode_unlockargs(struct rpc_rqst *, u32 *, struct nlm_args *); |
*/ |
#endif /* LOCKD_XDR4_H */ |
/shark/trunk/drivers/linuxc26/include/linux/lockd/share.h |
---|
0,0 → 1,30 |
/* |
* linux/include/linux/lockd/share.h |
* |
* DOS share management for lockd. |
* |
* Copyright (C) 1996, Olaf Kirch <okir@monad.swb.de> |
*/ |
#ifndef LINUX_LOCKD_SHARE_H |
#define LINUX_LOCKD_SHARE_H |
/* |
* DOS share for a specific file |
*/ |
struct nlm_share { |
struct nlm_share * s_next; /* linked list */ |
struct nlm_host * s_host; /* client host */ |
struct nlm_file * s_file; /* shared file */ |
struct xdr_netobj s_owner; /* owner handle */ |
u32 s_access; /* access mode */ |
u32 s_mode; /* deny mode */ |
}; |
u32 nlmsvc_share_file(struct nlm_host *, struct nlm_file *, |
struct nlm_args *); |
u32 nlmsvc_unshare_file(struct nlm_host *, struct nlm_file *, |
struct nlm_args *); |
int nlmsvc_traverse_shares(struct nlm_host *, struct nlm_file *, int); |
#endif /* LINUX_LOCKD_SHARE_H */ |
/shark/trunk/drivers/linuxc26/include/linux/lockd/debug.h |
---|
0,0 → 1,48 |
/* |
* linux/include/linux/lockd/debug.h |
* |
* Debugging stuff. |
* |
* Copyright (C) 1996 Olaf Kirch <okir@monad.swb.de> |
*/ |
#ifndef LINUX_LOCKD_DEBUG_H |
#define LINUX_LOCKD_DEBUG_H |
#ifdef __KERNEL__ |
#include <linux/sunrpc/debug.h> |
/* |
* Enable lockd debugging. |
* Requires RPC_DEBUG. |
*/ |
#ifdef RPC_DEBUG |
# define LOCKD_DEBUG 1 |
#endif |
#undef ifdebug |
#if defined(RPC_DEBUG) && defined(LOCKD_DEBUG) |
# define ifdebug(flag) if (nlm_debug & NLMDBG_##flag) |
#else |
# define ifdebug(flag) if (0) |
#endif |
#endif /* __KERNEL__ */ |
/* |
* Debug flags |
*/ |
#define NLMDBG_SVC 0x0001 |
#define NLMDBG_CLIENT 0x0002 |
#define NLMDBG_CLNTLOCK 0x0004 |
#define NLMDBG_SVCLOCK 0x0008 |
#define NLMDBG_MONITOR 0x0010 |
#define NLMDBG_CLNTSUBS 0x0020 |
#define NLMDBG_SVCSUBS 0x0040 |
#define NLMDBG_HOSTCACHE 0x0080 |
#define NLMDBG_XDR 0x0100 |
#define NLMDBG_ALL 0x7fff |
#endif /* LINUX_LOCKD_DEBUG_H */ |
/shark/trunk/drivers/linuxc26/include/linux/lockd/nlm.h |
---|
0,0 → 1,58 |
/* |
* linux/include/linux/lockd/nlm.h |
* |
* Declarations for the Network Lock Manager protocol. |
* |
* Copyright (C) 1996, Olaf Kirch <okir@monad.swb.de> |
*/ |
#ifndef LINUX_LOCKD_NLM_H |
#define LINUX_LOCKD_NLM_H |
#include <linux/config.h> |
/* Maximum file offset in file_lock.fl_end */ |
# define NLM_OFFSET_MAX ((s32) 0x7fffffff) |
# define NLM4_OFFSET_MAX ((s64) ((~(u64)0) >> 1)) |
/* Return states for NLM */ |
enum { |
NLM_LCK_GRANTED = 0, |
NLM_LCK_DENIED = 1, |
NLM_LCK_DENIED_NOLOCKS = 2, |
NLM_LCK_BLOCKED = 3, |
NLM_LCK_DENIED_GRACE_PERIOD = 4, |
#ifdef CONFIG_LOCKD_V4 |
NLM_DEADLCK = 5, |
NLM_ROFS = 6, |
NLM_STALE_FH = 7, |
NLM_FBIG = 8, |
NLM_FAILED = 9, |
#endif |
}; |
#define NLM_PROGRAM 100021 |
#define NLMPROC_NULL 0 |
#define NLMPROC_TEST 1 |
#define NLMPROC_LOCK 2 |
#define NLMPROC_CANCEL 3 |
#define NLMPROC_UNLOCK 4 |
#define NLMPROC_GRANTED 5 |
#define NLMPROC_TEST_MSG 6 |
#define NLMPROC_LOCK_MSG 7 |
#define NLMPROC_CANCEL_MSG 8 |
#define NLMPROC_UNLOCK_MSG 9 |
#define NLMPROC_GRANTED_MSG 10 |
#define NLMPROC_TEST_RES 11 |
#define NLMPROC_LOCK_RES 12 |
#define NLMPROC_CANCEL_RES 13 |
#define NLMPROC_UNLOCK_RES 14 |
#define NLMPROC_GRANTED_RES 15 |
#define NLMPROC_NSM_NOTIFY 16 /* statd callback */ |
#define NLMPROC_SHARE 20 |
#define NLMPROC_UNSHARE 21 |
#define NLMPROC_NM_LOCK 22 |
#define NLMPROC_FREE_ALL 23 |
#endif /* LINUX_LOCKD_NLM_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-summit/mach_ipi.h |
---|
0,0 → 1,25 |
#ifndef __ASM_MACH_IPI_H |
#define __ASM_MACH_IPI_H |
inline void send_IPI_mask_sequence(cpumask_t mask, int vector); |
static inline void send_IPI_mask(cpumask_t mask, int vector) |
{ |
send_IPI_mask_sequence(mask, vector); |
} |
static inline void send_IPI_allbutself(int vector) |
{ |
cpumask_t mask = cpu_online_map; |
cpu_clear(smp_processor_id(), mask); |
if (!cpus_empty(mask)) |
send_IPI_mask(mask, vector); |
} |
static inline void send_IPI_all(int vector) |
{ |
send_IPI_mask(cpu_online_map, vector); |
} |
#endif /* __ASM_MACH_IPI_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-summit/mach_mpparse.h |
---|
0,0 → 1,118 |
#ifndef __ASM_MACH_MPPARSE_H |
#define __ASM_MACH_MPPARSE_H |
#include <mach_apic.h> |
extern int use_cyclone; |
#ifdef CONFIG_NUMA |
extern void setup_summit(void); |
#else /* !CONFIG_NUMA */ |
#define setup_summit() {} |
#endif /* CONFIG_NUMA */ |
static inline void mpc_oem_bus_info(struct mpc_config_bus *m, char *name, |
struct mpc_config_translation *translation) |
{ |
Dprintk("Bus #%d is %s\n", m->mpc_busid, name); |
} |
static inline void mpc_oem_pci_bus(struct mpc_config_bus *m, |
struct mpc_config_translation *translation) |
{ |
} |
static inline int mps_oem_check(struct mp_config_table *mpc, char *oem, |
char *productid) |
{ |
if (!strncmp(oem, "IBM ENSW", 8) && |
(!strncmp(productid, "VIGIL SMP", 9) |
|| !strncmp(productid, "EXA", 3) |
|| !strncmp(productid, "RUTHLESS SMP", 12))){ |
use_cyclone = 1; /*enable cyclone-timer*/ |
setup_summit(); |
return 1; |
} |
return 0; |
} |
/* Hook from generic ACPI tables.c */ |
static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
{ |
if (!strncmp(oem_id, "IBM", 3) && |
(!strncmp(oem_table_id, "SERVIGIL", 8) |
|| !strncmp(oem_table_id, "EXA", 3))){ |
use_cyclone = 1; /*enable cyclone-timer*/ |
setup_summit(); |
return 1; |
} |
return 0; |
} |
struct rio_table_hdr { |
unsigned char version; /* Version number of this data structure */ |
/* Version 3 adds chassis_num & WP_index */ |
unsigned char num_scal_dev; /* # of Scalability devices (Twisters for Vigil) */ |
unsigned char num_rio_dev; /* # of RIO I/O devices (Cyclones and Winnipegs) */ |
} __attribute__((packed)); |
struct scal_detail { |
unsigned char node_id; /* Scalability Node ID */ |
unsigned long CBAR; /* Address of 1MB register space */ |
unsigned char port0node; /* Node ID port connected to: 0xFF=None */ |
unsigned char port0port; /* Port num port connected to: 0,1,2, or 0xFF=None */ |
unsigned char port1node; /* Node ID port connected to: 0xFF = None */ |
unsigned char port1port; /* Port num port connected to: 0,1,2, or 0xFF=None */ |
unsigned char port2node; /* Node ID port connected to: 0xFF = None */ |
unsigned char port2port; /* Port num port connected to: 0,1,2, or 0xFF=None */ |
unsigned char chassis_num; /* 1 based Chassis number (1 = boot node) */ |
} __attribute__((packed)); |
struct rio_detail { |
unsigned char node_id; /* RIO Node ID */ |
unsigned long BBAR; /* Address of 1MB register space */ |
unsigned char type; /* Type of device */ |
unsigned char owner_id; /* For WPEG: Node ID of Cyclone that owns this WPEG*/ |
/* For CYC: Node ID of Twister that owns this CYC */ |
unsigned char port0node; /* Node ID port connected to: 0xFF=None */ |
unsigned char port0port; /* Port num port connected to: 0,1,2, or 0xFF=None */ |
unsigned char port1node; /* Node ID port connected to: 0xFF=None */ |
unsigned char port1port; /* Port num port connected to: 0,1,2, or 0xFF=None */ |
unsigned char first_slot; /* For WPEG: Lowest slot number below this WPEG */ |
/* For CYC: 0 */ |
unsigned char status; /* For WPEG: Bit 0 = 1 : the XAPIC is used */ |
/* = 0 : the XAPIC is not used, ie:*/ |
/* ints fwded to another XAPIC */ |
/* Bits1:7 Reserved */ |
/* For CYC: Bits0:7 Reserved */ |
unsigned char WP_index; /* For WPEG: WPEG instance index - lower ones have */ |
/* lower slot numbers/PCI bus numbers */ |
/* For CYC: No meaning */ |
unsigned char chassis_num; /* 1 based Chassis number */ |
/* For LookOut WPEGs this field indicates the */ |
/* Expansion Chassis #, enumerated from Boot */ |
/* Node WPEG external port, then Boot Node CYC */ |
/* external port, then Next Vigil chassis WPEG */ |
/* external port, etc. */ |
/* Shared Lookouts have only 1 chassis number (the */ |
/* first one assigned) */ |
} __attribute__((packed)); |
typedef enum { |
CompatTwister = 0, /* Compatibility Twister */ |
AltTwister = 1, /* Alternate Twister of internal 8-way */ |
CompatCyclone = 2, /* Compatibility Cyclone */ |
AltCyclone = 3, /* Alternate Cyclone of internal 8-way */ |
CompatWPEG = 4, /* Compatibility WPEG */ |
AltWPEG = 5, /* Second Planar WPEG */ |
LookOutAWPEG = 6, /* LookOut WPEG */ |
LookOutBWPEG = 7, /* LookOut WPEG */ |
} node_type; |
static inline int is_WPEG(node_type type){ |
return (type == CompatWPEG || type == AltWPEG || |
type == LookOutAWPEG || type == LookOutBWPEG); |
} |
#endif /* __ASM_MACH_MPPARSE_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-summit/mach_mpspec.h |
---|
0,0 → 1,13 |
#ifndef __ASM_MACH_MPSPEC_H |
#define __ASM_MACH_MPSPEC_H |
/* |
* a maximum of 256 APICs with the current APIC ID architecture. |
*/ |
#define MAX_APICS 256 |
#define MAX_IRQ_SOURCES 256 |
#define MAX_MP_BUSSES 32 |
#endif /* __ASM_MACH_MPSPEC_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-summit/mach_apicdef.h |
---|
0,0 → 1,13 |
#ifndef __ASM_MACH_APICDEF_H |
#define __ASM_MACH_APICDEF_H |
#define APIC_ID_MASK (0xFF<<24) |
static inline unsigned get_apic_id(unsigned long x) |
{ |
return (((x)>>24)&0xFF); |
} |
#define GET_APIC_ID(x) get_apic_id(x) |
#endif |
/shark/trunk/drivers/linuxc26/include/asm/mach-summit/mach_apic.h |
---|
0,0 → 1,176 |
#ifndef __ASM_MACH_APIC_H |
#define __ASM_MACH_APIC_H |
#include <linux/config.h> |
#include <asm/smp.h> |
#define esr_disable (1) |
#define NO_BALANCE_IRQ (0) |
#define NO_IOAPIC_CHECK (1) /* Don't check I/O APIC ID for xAPIC */ |
/* In clustered mode, the high nibble of APIC ID is a cluster number. |
* The low nibble is a 4-bit bitmap. */ |
#define XAPIC_DEST_CPUS_SHIFT 4 |
#define XAPIC_DEST_CPUS_MASK ((1u << XAPIC_DEST_CPUS_SHIFT) - 1) |
#define XAPIC_DEST_CLUSTER_MASK (XAPIC_DEST_CPUS_MASK << XAPIC_DEST_CPUS_SHIFT) |
#define APIC_DFR_VALUE (APIC_DFR_CLUSTER) |
static inline cpumask_t target_cpus(void) |
{ |
cpumask_t tmp = CPU_MASK_ALL; |
return tmp; |
} |
#define TARGET_CPUS (target_cpus()) |
#define INT_DELIVERY_MODE (dest_Fixed) |
#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */ |
#define APIC_BROADCAST_ID (0xFF) |
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) |
{ |
return 0; |
} |
/* we don't use the phys_cpu_present_map to indicate apicid presence */ |
static inline unsigned long check_apicid_present(int bit) |
{ |
return 1; |
} |
#define apicid_cluster(apicid) ((apicid) & XAPIC_DEST_CLUSTER_MASK) |
extern u8 bios_cpu_apicid[]; |
extern u8 cpu_2_logical_apicid[]; |
static inline void init_apic_ldr(void) |
{ |
unsigned long val, id; |
int i, count; |
u8 lid; |
u8 my_id = (u8)hard_smp_processor_id(); |
u8 my_cluster = (u8)apicid_cluster(my_id); |
/* Create logical APIC IDs by counting CPUs already in cluster. */ |
for (count = 0, i = NR_CPUS; --i >= 0; ) { |
lid = cpu_2_logical_apicid[i]; |
if (lid != BAD_APICID && apicid_cluster(lid) == my_cluster) |
++count; |
} |
/* We only have a 4 wide bitmap in cluster mode. If a deranged |
* BIOS puts 5 CPUs in one APIC cluster, we're hosed. */ |
BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT); |
id = my_cluster | (1UL << count); |
apic_write_around(APIC_DFR, APIC_DFR_VALUE); |
val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; |
val |= SET_APIC_LOGICAL_ID(id); |
apic_write_around(APIC_LDR, val); |
} |
static inline int multi_timer_check(int apic, int irq) |
{ |
return 0; |
} |
static inline int apic_id_registered(void) |
{ |
return 1; |
} |
static inline void clustered_apic_check(void) |
{ |
printk("Enabling APIC mode: Summit. Using %d I/O APICs\n", |
nr_ioapics); |
} |
static inline int apicid_to_node(int logical_apicid) |
{ |
return logical_apicid >> 5; /* 2 clusterids per CEC */ |
} |
/* Mapping from cpu number to logical apicid */ |
static inline int cpu_to_logical_apicid(int cpu) |
{ |
if (cpu >= NR_CPUS) |
return BAD_APICID; |
return (int)cpu_2_logical_apicid[cpu]; |
} |
static inline int cpu_present_to_apicid(int mps_cpu) |
{ |
if (mps_cpu < NR_CPUS) |
return (int)bios_cpu_apicid[mps_cpu]; |
else |
return BAD_APICID; |
} |
static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_id_map) |
{ |
/* For clustered we don't have a good way to do this yet - hack */ |
return physids_promote(0x0F); |
} |
static inline physid_mask_t apicid_to_cpu_present(int apicid) |
{ |
return physid_mask_of_physid(0); |
} |
static inline int mpc_apic_id(struct mpc_config_processor *m, |
struct mpc_config_translation *translation_record) |
{ |
printk("Processor #%d %ld:%ld APIC version %d\n", |
m->mpc_apicid, |
(m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8, |
(m->mpc_cpufeature & CPU_MODEL_MASK) >> 4, |
m->mpc_apicver); |
return (m->mpc_apicid); |
} |
static inline void setup_portio_remap(void) |
{ |
} |
static inline int check_phys_apicid_present(int boot_cpu_physical_apicid) |
{ |
return 1; |
} |
static inline void enable_apic_mode(void) |
{ |
} |
static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask) |
{ |
int num_bits_set; |
int cpus_found = 0; |
int cpu; |
int apicid; |
num_bits_set = cpus_weight_const(cpumask); |
/* Return id to all */ |
if (num_bits_set == NR_CPUS) |
return (int) 0xFF; |
/* |
* The cpus in the mask must all be on the apic cluster. If are not |
* on the same apicid cluster return default value of TARGET_CPUS. |
*/ |
cpu = first_cpu_const(cpumask); |
apicid = cpu_to_logical_apicid(cpu); |
while (cpus_found < num_bits_set) { |
if (cpu_isset_const(cpu, cpumask)) { |
int new_apicid = cpu_to_logical_apicid(cpu); |
if (apicid_cluster(apicid) != |
apicid_cluster(new_apicid)){ |
printk ("%s: Not a valid mask!\n",__FUNCTION__); |
return 0xFF; |
} |
apicid = apicid | new_apicid; |
cpus_found++; |
} |
cpu++; |
} |
return apicid; |
} |
#endif /* __ASM_MACH_APIC_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-bigsmp/mach_ipi.h |
---|
0,0 → 1,25 |
#ifndef __ASM_MACH_IPI_H |
#define __ASM_MACH_IPI_H |
inline void send_IPI_mask_sequence(cpumask_t mask, int vector); |
static inline void send_IPI_mask(cpumask_t mask, int vector) |
{ |
send_IPI_mask_sequence(mask, vector); |
} |
static inline void send_IPI_allbutself(int vector) |
{ |
cpumask_t mask = cpu_online_map; |
cpu_clear(smp_processor_id(), mask); |
if (!cpus_empty(mask)) |
send_IPI_mask(mask, vector); |
} |
static inline void send_IPI_all(int vector) |
{ |
send_IPI_mask(cpu_online_map, vector); |
} |
#endif /* __ASM_MACH_IPI_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-bigsmp/mach_mpspec.h |
---|
0,0 → 1,13 |
#ifndef __ASM_MACH_MPSPEC_H |
#define __ASM_MACH_MPSPEC_H |
/* |
* a maximum of 16 APICs with the current APIC ID architecture. |
*/ |
#define MAX_APICS 16 |
#define MAX_IRQ_SOURCES 256 |
#define MAX_MP_BUSSES 32 |
#endif /* __ASM_MACH_MPSPEC_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-bigsmp/mach_apicdef.h |
---|
0,0 → 1,13 |
#ifndef __ASM_MACH_APICDEF_H |
#define __ASM_MACH_APICDEF_H |
#define APIC_ID_MASK (0x0F<<24) |
static inline unsigned get_apic_id(unsigned long x) |
{ |
return (((x)>>24)&0x0F); |
} |
#define GET_APIC_ID(x) get_apic_id(x) |
#endif |
/shark/trunk/drivers/linuxc26/include/asm/mach-bigsmp/mach_apic.h |
---|
0,0 → 1,176 |
#ifndef __ASM_MACH_APIC_H |
#define __ASM_MACH_APIC_H |
#include <asm/smp.h> |
#define SEQUENTIAL_APICID |
#ifdef SEQUENTIAL_APICID |
#define xapic_phys_to_log_apicid(phys_apic) ( (1ul << ((phys_apic) & 0x3)) |\ |
((phys_apic<<2) & (~0xf)) ) |
#elif CLUSTERED_APICID |
#define xapic_phys_to_log_apicid(phys_apic) ( (1ul << ((phys_apic) & 0x3)) |\ |
((phys_apic) & (~0xf)) ) |
#endif |
#define NO_BALANCE_IRQ (1) |
#define esr_disable (1) |
#define NO_IOAPIC_CHECK (0) |
static inline int apic_id_registered(void) |
{ |
return (1); |
} |
#define APIC_DFR_VALUE (APIC_DFR_CLUSTER) |
static inline cpumask_t target_cpus(void) |
{ |
return cpu_online_map; |
} |
#define TARGET_CPUS (target_cpus()) |
#define INT_DELIVERY_MODE dest_LowestPrio |
#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */ |
#define APIC_BROADCAST_ID (0xff) |
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) |
{ |
return 0; |
} |
static inline unsigned long check_apicid_present(int bit) |
{ |
return physid_isset(bit, phys_cpu_present_map); |
} |
#define apicid_cluster(apicid) (apicid & 0xF0) |
static inline unsigned long calculate_ldr(unsigned long old) |
{ |
unsigned long id; |
id = xapic_phys_to_log_apicid(hard_smp_processor_id()); |
return ((old & ~APIC_LDR_MASK) | SET_APIC_LOGICAL_ID(id)); |
} |
/* |
* Set up the logical destination ID. |
* |
* Intel recommends to set DFR, LDR and TPR before enabling |
* an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel |
* document number 292116). So here it goes... |
*/ |
static inline void init_apic_ldr(void) |
{ |
unsigned long val; |
apic_write_around(APIC_DFR, APIC_DFR_VALUE); |
val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; |
val = calculate_ldr(val); |
apic_write_around(APIC_LDR, val); |
} |
static inline void clustered_apic_check(void) |
{ |
printk("Enabling APIC mode: %s. Using %d I/O APICs\n", |
"Cluster", nr_ioapics); |
} |
static inline int multi_timer_check(int apic, int irq) |
{ |
return 0; |
} |
static inline int apicid_to_node(int logical_apicid) |
{ |
return 0; |
} |
extern u8 bios_cpu_apicid[]; |
static inline int cpu_present_to_apicid(int mps_cpu) |
{ |
if (mps_cpu < NR_CPUS) |
return (int)bios_cpu_apicid[mps_cpu]; |
else |
return BAD_APICID; |
} |
static inline physid_mask_t apicid_to_cpu_present(int phys_apicid) |
{ |
return physid_mask_of_physid(phys_apicid); |
} |
extern u8 cpu_2_logical_apicid[]; |
/* Mapping from cpu number to logical apicid */ |
static inline int cpu_to_logical_apicid(int cpu) |
{ |
if (cpu >= NR_CPUS) |
return BAD_APICID; |
return (int)cpu_2_logical_apicid[cpu]; |
} |
static inline int mpc_apic_id(struct mpc_config_processor *m, |
struct mpc_config_translation *translation_record) |
{ |
printk("Processor #%d %ld:%ld APIC version %d\n", |
m->mpc_apicid, |
(m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8, |
(m->mpc_cpufeature & CPU_MODEL_MASK) >> 4, |
m->mpc_apicver); |
return m->mpc_apicid; |
} |
static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map) |
{ |
/* For clustered we don't have a good way to do this yet - hack */ |
return physids_promote(0xFUL); |
} |
#define WAKE_SECONDARY_VIA_INIT |
static inline void setup_portio_remap(void) |
{ |
} |
static inline void enable_apic_mode(void) |
{ |
} |
static inline int check_phys_apicid_present(int boot_cpu_physical_apicid) |
{ |
return (1); |
} |
static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask) |
{ |
int num_bits_set; |
int cpus_found = 0; |
int cpu; |
int apicid; |
num_bits_set = cpus_weight_const(cpumask); |
/* Return id to all */ |
if (num_bits_set == NR_CPUS) |
return (int) 0xFF; |
/* |
* The cpus in the mask must all be on the apic cluster. If are not |
* on the same apicid cluster return default value of TARGET_CPUS. |
*/ |
cpu = first_cpu_const(cpumask); |
apicid = cpu_to_logical_apicid(cpu); |
while (cpus_found < num_bits_set) { |
if (cpu_isset_const(cpu, cpumask)) { |
int new_apicid = cpu_to_logical_apicid(cpu); |
if (apicid_cluster(apicid) != |
apicid_cluster(new_apicid)){ |
printk ("%s: Not a valid mask!\n",__FUNCTION__); |
return 0xFF; |
} |
apicid = apicid | new_apicid; |
cpus_found++; |
} |
cpu++; |
} |
return apicid; |
} |
#endif /* __ASM_MACH_APIC_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-visws/lithium.h |
---|
0,0 → 1,53 |
#ifndef __I386_SGI_LITHIUM_H |
#define __I386_SGI_LITHIUM_H |
#include <asm/fixmap.h> |
/* |
* Lithium is the SGI Visual Workstation I/O ASIC |
*/ |
#define LI_PCI_A_PHYS 0xfc000000 /* Enet is dev 3 */ |
#define LI_PCI_B_PHYS 0xfd000000 /* PIIX4 is here */ |
/* see set_fixmap() and asm/fixmap.h */ |
#define LI_PCIA_VADDR (fix_to_virt(FIX_LI_PCIA)) |
#define LI_PCIB_VADDR (fix_to_virt(FIX_LI_PCIB)) |
/* Not a standard PCI? (not in linux/pci.h) */ |
#define LI_PCI_BUSNUM 0x44 /* lo8: primary, hi8: sub */ |
#define LI_PCI_INTEN 0x46 |
/* LI_PCI_INTENT bits */ |
#define LI_INTA_0 0x0001 |
#define LI_INTA_1 0x0002 |
#define LI_INTA_2 0x0004 |
#define LI_INTA_3 0x0008 |
#define LI_INTA_4 0x0010 |
#define LI_INTB 0x0020 |
#define LI_INTC 0x0040 |
#define LI_INTD 0x0080 |
/* More special purpose macros... */ |
extern __inline void li_pcia_write16(unsigned long reg, unsigned short v) |
{ |
*((volatile unsigned short *)(LI_PCIA_VADDR+reg))=v; |
} |
extern __inline unsigned short li_pcia_read16(unsigned long reg) |
{ |
return *((volatile unsigned short *)(LI_PCIA_VADDR+reg)); |
} |
extern __inline void li_pcib_write16(unsigned long reg, unsigned short v) |
{ |
*((volatile unsigned short *)(LI_PCIB_VADDR+reg))=v; |
} |
extern __inline unsigned short li_pcib_read16(unsigned long reg) |
{ |
return *((volatile unsigned short *)(LI_PCIB_VADDR+reg)); |
} |
#endif |
/shark/trunk/drivers/linuxc26/include/asm/mach-visws/piix4.h |
---|
0,0 → 1,107 |
#ifndef __I386_SGI_PIIX_H |
#define __I386_SGI_PIIX_H |
/* |
* PIIX4 as used on SGI Visual Workstations |
*/ |
#define PIIX_PM_START 0x0F80 |
#define SIO_GPIO_START 0x0FC0 |
#define SIO_PM_START 0x0FC8 |
#define PMBASE PIIX_PM_START |
#define GPIREG0 (PMBASE+0x30) |
#define GPIREG(x) (GPIREG0+((x)/8)) |
#define GPIBIT(x) (1 << ((x)%8)) |
#define PIIX_GPI_BD_ID1 18 |
#define PIIX_GPI_BD_ID2 19 |
#define PIIX_GPI_BD_ID3 20 |
#define PIIX_GPI_BD_ID4 21 |
#define PIIX_GPI_BD_REG GPIREG(PIIX_GPI_BD_ID1) |
#define PIIX_GPI_BD_MASK (GPIBIT(PIIX_GPI_BD_ID1) | \ |
GPIBIT(PIIX_GPI_BD_ID2) | \ |
GPIBIT(PIIX_GPI_BD_ID3) | \ |
GPIBIT(PIIX_GPI_BD_ID4) ) |
#define PIIX_GPI_BD_SHIFT (PIIX_GPI_BD_ID1 % 8) |
#define SIO_INDEX 0x2e |
#define SIO_DATA 0x2f |
#define SIO_DEV_SEL 0x7 |
#define SIO_DEV_ENB 0x30 |
#define SIO_DEV_MSB 0x60 |
#define SIO_DEV_LSB 0x61 |
#define SIO_GP_DEV 0x7 |
#define SIO_GP_BASE SIO_GPIO_START |
#define SIO_GP_MSB (SIO_GP_BASE>>8) |
#define SIO_GP_LSB (SIO_GP_BASE&0xff) |
#define SIO_GP_DATA1 (SIO_GP_BASE+0) |
#define SIO_PM_DEV 0x8 |
#define SIO_PM_BASE SIO_PM_START |
#define SIO_PM_MSB (SIO_PM_BASE>>8) |
#define SIO_PM_LSB (SIO_PM_BASE&0xff) |
#define SIO_PM_INDEX (SIO_PM_BASE+0) |
#define SIO_PM_DATA (SIO_PM_BASE+1) |
#define SIO_PM_FER2 0x1 |
#define SIO_PM_GP_EN 0x80 |
/* |
* This is the dev/reg where generating a config cycle will |
* result in a PCI special cycle. |
*/ |
#define SPECIAL_DEV 0xff |
#define SPECIAL_REG 0x00 |
/* |
* PIIX4 needs to see a special cycle with the following data |
* to be convinced the processor has gone into the stop grant |
* state. PIIX4 insists on seeing this before it will power |
* down a system. |
*/ |
#define PIIX_SPECIAL_STOP 0x00120002 |
#define PIIX4_RESET_PORT 0xcf9 |
#define PIIX4_RESET_VAL 0x6 |
#define PMSTS_PORT 0xf80 // 2 bytes PM Status |
#define PMEN_PORT 0xf82 // 2 bytes PM Enable |
#define PMCNTRL_PORT 0xf84 // 2 bytes PM Control |
#define PM_SUSPEND_ENABLE 0x2000 // start sequence to suspend state |
/* |
* PMSTS and PMEN I/O bit definitions. |
* (Bits are the same in both registers) |
*/ |
#define PM_STS_RSM (1<<15) // Resume Status |
#define PM_STS_PWRBTNOR (1<<11) // Power Button Override |
#define PM_STS_RTC (1<<10) // RTC status |
#define PM_STS_PWRBTN (1<<8) // Power Button Pressed? |
#define PM_STS_GBL (1<<5) // Global Status |
#define PM_STS_BM (1<<4) // Bus Master Status |
#define PM_STS_TMROF (1<<0) // Timer Overflow Status. |
/* |
* Stop clock GPI register |
*/ |
#define PIIX_GPIREG0 (0xf80 + 0x30) |
/* |
* Stop clock GPI bit in GPIREG0 |
*/ |
#define PIIX_GPI_STPCLK 0x4 // STPCLK signal routed back in |
#endif |
/shark/trunk/drivers/linuxc26/include/asm/mach-visws/entry_arch.h |
---|
0,0 → 1,23 |
/* |
* The following vectors are part of the Linux architecture, there |
* is no hardware IRQ pin equivalent for them, they are triggered |
* through the ICC by us (IPIs) |
*/ |
#ifdef CONFIG_X86_SMP |
BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR) |
BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR) |
BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR) |
#endif |
/* |
* every pentium local APIC has two 'local interrupts', with a |
* soft-definable vector attached to both interrupts, one of |
* which is a timer interrupt, the other one is error counter |
* overflow. Linux uses the local APIC timer interrupt to get |
* a much simpler SMP time architecture: |
*/ |
#ifdef CONFIG_X86_LOCAL_APIC |
BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR) |
BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR) |
BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR) |
#endif |
/shark/trunk/drivers/linuxc26/include/asm/mach-visws/irq_vectors.h |
---|
0,0 → 1,61 |
#ifndef _ASM_IRQ_VECTORS_H |
#define _ASM_IRQ_VECTORS_H |
/* |
* IDT vectors usable for external interrupt sources start |
* at 0x20: |
*/ |
#define FIRST_EXTERNAL_VECTOR 0x20 |
#define SYSCALL_VECTOR 0x80 |
/* |
* Vectors 0x20-0x2f are used for ISA interrupts. |
*/ |
/* |
* Special IRQ vectors used by the SMP architecture, 0xf0-0xff |
* |
* some of the following vectors are 'rare', they are merged |
* into a single vector (CALL_FUNCTION_VECTOR) to save vector space. |
* TLB, reschedule and local APIC vectors are performance-critical. |
* |
* Vectors 0xf0-0xfa are free (reserved for future Linux use). |
*/ |
#define SPURIOUS_APIC_VECTOR 0xff |
#define ERROR_APIC_VECTOR 0xfe |
#define INVALIDATE_TLB_VECTOR 0xfd |
#define RESCHEDULE_VECTOR 0xfc |
#define CALL_FUNCTION_VECTOR 0xfb |
#define THERMAL_APIC_VECTOR 0xf0 |
/* |
* Local APIC timer IRQ vector is on a different priority level, |
* to work around the 'lost local interrupt if more than 2 IRQ |
* sources per level' errata. |
*/ |
#define LOCAL_TIMER_VECTOR 0xef |
/* |
* First APIC vector available to drivers: (vectors 0x30-0xee) |
* we start at 0x31 to spread out vectors evenly between priority |
* levels. (0x80 is the syscall vector) |
*/ |
#define FIRST_DEVICE_VECTOR 0x31 |
#define FIRST_SYSTEM_VECTOR 0xef |
#define TIMER_IRQ 0 |
/* |
* |
*/ |
#define NR_IRQS 224 |
#define NR_IRQ_VECTORS NR_IRQS |
#define FPU_IRQ 13 |
#define FIRST_VM86_IRQ 3 |
#define LAST_VM86_IRQ 15 |
#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15) |
#endif /* _ASM_IRQ_VECTORS_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-visws/setup_arch_post.h |
---|
0,0 → 1,49 |
/* Hook for machine specific memory setup. |
* |
* This is included late in kernel/setup.c so that it can make use of all of |
* the static functions. */ |
#define MB (1024 * 1024) |
unsigned long sgivwfb_mem_phys; |
unsigned long sgivwfb_mem_size; |
long long mem_size __initdata = 0; |
static inline char * __init machine_specific_memory_setup(void) |
{ |
long long gfx_mem_size = 8 * MB; |
mem_size = ALT_MEM_K; |
if (!mem_size) { |
printk(KERN_WARNING "Bootloader didn't set memory size, upgrade it !\n"); |
mem_size = 128 * MB; |
} |
/* |
* this hardcodes the graphics memory to 8 MB |
* it really should be sized dynamically (or at least |
* set as a boot param) |
*/ |
if (!sgivwfb_mem_size) { |
printk(KERN_WARNING "Defaulting to 8 MB framebuffer size\n"); |
sgivwfb_mem_size = 8 * MB; |
} |
/* |
* Trim to nearest MB |
*/ |
sgivwfb_mem_size &= ~((1 << 20) - 1); |
sgivwfb_mem_phys = mem_size - gfx_mem_size; |
add_memory_region(0, LOWMEMSIZE(), E820_RAM); |
add_memory_region(HIGH_MEMORY, mem_size - sgivwfb_mem_size - HIGH_MEMORY, E820_RAM); |
add_memory_region(sgivwfb_mem_phys, sgivwfb_mem_size, E820_RESERVED); |
return "PROM"; |
/* Remove gcc warnings */ |
(void) sanitize_e820_map(NULL, NULL); |
(void) copy_e820_map(NULL, 0); |
} |
/shark/trunk/drivers/linuxc26/include/asm/mach-visws/do_timer.h |
---|
0,0 → 1,49 |
/* defines for inline arch setup functions */ |
#include <asm/fixmap.h> |
#include "cobalt.h" |
static inline void do_timer_interrupt_hook(struct pt_regs *regs) |
{ |
/* Clear the interrupt */ |
co_cpu_write(CO_CPU_STAT,co_cpu_read(CO_CPU_STAT) & ~CO_STAT_TIMEINTR); |
do_timer(regs); |
/* |
* In the SMP case we use the local APIC timer interrupt to do the |
* profiling, except when we simulate SMP mode on a uniprocessor |
* system, in that case we have to call the local interrupt handler. |
*/ |
#ifndef CONFIG_X86_LOCAL_APIC |
x86_do_profile(regs); |
#else |
if (!using_apic_timer) |
smp_local_timer_interrupt(regs); |
#endif |
} |
static inline int do_timer_overflow(int count) |
{ |
int i; |
spin_lock(&i8259A_lock); |
/* |
* This is tricky when I/O APICs are used; |
* see do_timer_interrupt(). |
*/ |
i = inb(0x20); |
spin_unlock(&i8259A_lock); |
/* assumption about timer being IRQ0 */ |
if (i & 0x01) { |
/* |
* We cannot detect lost timer interrupts ... |
* well, that's why we call them lost, don't we? :) |
* [hmm, on the Pentium and Alpha we can ... sort of] |
*/ |
count -= LATCH; |
} else { |
printk("do_slow_gettimeoffset(): hardware timer problem?\n"); |
} |
return count; |
} |
/shark/trunk/drivers/linuxc26/include/asm/mach-visws/mach_apicdef.h |
---|
0,0 → 1,12 |
#ifndef __ASM_MACH_APICDEF_H |
#define __ASM_MACH_APICDEF_H |
#define APIC_ID_MASK (0xF<<24) |
static inline unsigned get_apic_id(unsigned long x) |
{ |
return (((x)>>24)&0xF); |
} |
#define GET_APIC_ID(x) get_apic_id(x) |
#endif |
/shark/trunk/drivers/linuxc26/include/asm/mach-visws/setup_arch_pre.h |
---|
0,0 → 1,5 |
/* Hook to call BIOS initialisation function */ |
/* no action for visws */ |
#define ARCH_SETUP |
/shark/trunk/drivers/linuxc26/include/asm/mach-visws/mach_apic.h |
---|
0,0 → 1,91 |
#ifndef __ASM_MACH_APIC_H |
#define __ASM_MACH_APIC_H |
#include <mach_apicdef.h> |
#define APIC_DFR_VALUE (APIC_DFR_FLAT) |
#define no_balance_irq (0) |
#define esr_disable (0) |
#define NO_IOAPIC_CHECK (0) |
#define INT_DELIVERY_MODE dest_LowestPrio |
#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */ |
#ifdef CONFIG_SMP |
#define TARGET_CPUS cpu_online_map |
#else |
#define TARGET_CPUS cpumask_of_cpu(0) |
#endif |
#define APIC_BROADCAST_ID 0x0F |
#define check_apicid_used(bitmap, apicid) physid_isset(apicid, bitmap) |
#define check_apicid_present(bit) physid_isset(bit, phys_cpu_present_map) |
static inline int apic_id_registered(void) |
{ |
return physid_isset(GET_APIC_ID(apic_read(APIC_ID)), phys_cpu_present_map); |
} |
/* |
* Set up the logical destination ID. |
* |
* Intel recommends to set DFR, LDR and TPR before enabling |
* an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel |
* document number 292116). So here it goes... |
*/ |
static inline void init_apic_ldr(void) |
{ |
unsigned long val; |
apic_write_around(APIC_DFR, APIC_DFR_VALUE); |
val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; |
val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id()); |
apic_write_around(APIC_LDR, val); |
} |
static inline void summit_check(char *oem, char *productid) |
{ |
} |
static inline void clustered_apic_check(void) |
{ |
} |
/* Mapping from cpu number to logical apicid */ |
static inline int cpu_to_logical_apicid(int cpu) |
{ |
return 1 << cpu; |
} |
static inline int cpu_present_to_apicid(int mps_cpu) |
{ |
return mps_cpu; |
} |
static inline physid_mask_t apicid_to_cpu_present(int apicid) |
{ |
return physid_mask_of_physid(apicid); |
} |
#define WAKE_SECONDARY_VIA_INIT |
static inline void setup_portio_remap(void) |
{ |
} |
static inline void enable_apic_mode(void) |
{ |
} |
static inline int check_phys_apicid_present(int boot_cpu_physical_apicid) |
{ |
return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map); |
} |
static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask) |
{ |
return cpus_coerce_const(cpumask); |
} |
#endif /* __ASM_MACH_APIC_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-visws/cobalt.h |
---|
0,0 → 1,125 |
#ifndef __I386_SGI_COBALT_H |
#define __I386_SGI_COBALT_H |
#include <asm/fixmap.h> |
/* |
* Cobalt SGI Visual Workstation system ASIC |
*/ |
#define CO_CPU_NUM_PHYS 0x1e00 |
#define CO_CPU_TAB_PHYS (CO_CPU_NUM_PHYS + 2) |
#define CO_CPU_MAX 4 |
#define CO_CPU_PHYS 0xc2000000 |
#define CO_APIC_PHYS 0xc4000000 |
/* see set_fixmap() and asm/fixmap.h */ |
#define CO_CPU_VADDR (fix_to_virt(FIX_CO_CPU)) |
#define CO_APIC_VADDR (fix_to_virt(FIX_CO_APIC)) |
/* Cobalt CPU registers -- relative to CO_CPU_VADDR, use co_cpu_*() */ |
#define CO_CPU_REV 0x08 |
#define CO_CPU_CTRL 0x10 |
#define CO_CPU_STAT 0x20 |
#define CO_CPU_TIMEVAL 0x30 |
/* CO_CPU_CTRL bits */ |
#define CO_CTRL_TIMERUN 0x04 /* 0 == disabled */ |
#define CO_CTRL_TIMEMASK 0x08 /* 0 == unmasked */ |
/* CO_CPU_STATUS bits */ |
#define CO_STAT_TIMEINTR 0x02 /* (r) 1 == int pend, (w) 0 == clear */ |
/* CO_CPU_TIMEVAL value */ |
#define CO_TIME_HZ 100000000 /* Cobalt core rate */ |
/* Cobalt APIC registers -- relative to CO_APIC_VADDR, use co_apic_*() */ |
#define CO_APIC_HI(n) (((n) * 0x10) + 4) |
#define CO_APIC_LO(n) ((n) * 0x10) |
#define CO_APIC_ID 0x0ffc |
/* CO_APIC_ID bits */ |
#define CO_APIC_ENABLE 0x00000100 |
/* CO_APIC_LO bits */ |
#define CO_APIC_MASK 0x00010000 /* 0 = enabled */ |
#define CO_APIC_LEVEL 0x00008000 /* 0 = edge */ |
/* |
* Where things are physically wired to Cobalt |
* #defines with no board _<type>_<rev>_ are common to all (thus far) |
*/ |
#define CO_APIC_IDE0 4 |
#define CO_APIC_IDE1 2 /* Only on 320 */ |
#define CO_APIC_8259 12 /* serial, floppy, par-l-l */ |
/* Lithium PCI Bridge A -- "the one with 82557 Ethernet" */ |
#define CO_APIC_PCIA_BASE0 0 /* and 1 */ /* slot 0, line 0 */ |
#define CO_APIC_PCIA_BASE123 5 /* and 6 */ /* slot 0, line 1 */ |
#define CO_APIC_PIIX4_USB 7 /* this one is weird */ |
/* Lithium PCI Bridge B -- "the one with PIIX4" */ |
#define CO_APIC_PCIB_BASE0 8 /* and 9-12 *//* slot 0, line 0 */ |
#define CO_APIC_PCIB_BASE123 13 /* 14.15 */ /* slot 0, line 1 */ |
#define CO_APIC_VIDOUT0 16 |
#define CO_APIC_VIDOUT1 17 |
#define CO_APIC_VIDIN0 18 |
#define CO_APIC_VIDIN1 19 |
#define CO_APIC_LI_AUDIO 22 |
#define CO_APIC_AS 24 |
#define CO_APIC_RE 25 |
#define CO_APIC_CPU 28 /* Timer and Cache interrupt */ |
#define CO_APIC_NMI 29 |
#define CO_APIC_LAST CO_APIC_NMI |
/* |
* This is how irqs are assigned on the Visual Workstation. |
* Legacy devices get irq's 1-15 (system clock is 0 and is CO_APIC_CPU). |
* All other devices (including PCI) go to Cobalt and are irq's 16 on up. |
*/ |
#define CO_IRQ_APIC0 16 /* irq of apic entry 0 */ |
#define IS_CO_APIC(irq) ((irq) >= CO_IRQ_APIC0) |
#define CO_IRQ(apic) (CO_IRQ_APIC0 + (apic)) /* apic ent to irq */ |
#define CO_APIC(irq) ((irq) - CO_IRQ_APIC0) /* irq to apic ent */ |
#define CO_IRQ_IDE0 14 /* knowledge of... */ |
#define CO_IRQ_IDE1 15 /* ... ide driver defaults! */ |
#define CO_IRQ_8259 CO_IRQ(CO_APIC_8259) |
#ifdef CONFIG_X86_VISWS_APIC |
extern __inline void co_cpu_write(unsigned long reg, unsigned long v) |
{ |
*((volatile unsigned long *)(CO_CPU_VADDR+reg))=v; |
} |
extern __inline unsigned long co_cpu_read(unsigned long reg) |
{ |
return *((volatile unsigned long *)(CO_CPU_VADDR+reg)); |
} |
extern __inline void co_apic_write(unsigned long reg, unsigned long v) |
{ |
*((volatile unsigned long *)(CO_APIC_VADDR+reg))=v; |
} |
extern __inline unsigned long co_apic_read(unsigned long reg) |
{ |
return *((volatile unsigned long *)(CO_APIC_VADDR+reg)); |
} |
#endif |
extern char visws_board_type; |
#define VISWS_320 0 |
#define VISWS_540 1 |
extern char visws_board_rev; |
#endif /* __I386_SGI_COBALT_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-visws/smpboot_hooks.h |
---|
0,0 → 1,24 |
static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip) |
{ |
CMOS_WRITE(0xa, 0xf); |
local_flush_tlb(); |
Dprintk("1.\n"); |
*((volatile unsigned short *) TRAMPOLINE_HIGH) = start_eip >> 4; |
Dprintk("2.\n"); |
*((volatile unsigned short *) TRAMPOLINE_LOW) = start_eip & 0xf; |
Dprintk("3.\n"); |
} |
/* for visws do nothing for any of these */ |
static inline void smpboot_clear_io_apic_irqs(void) |
{ |
} |
static inline void smpboot_restore_warm_reset_vector(void) |
{ |
} |
static inline void smpboot_setup_io_apic(void) |
{ |
} |
/shark/trunk/drivers/linuxc26/include/asm/mach-generic/mach_ipi.h |
---|
0,0 → 1,10 |
#ifndef _MACH_IPI_H |
#define _MACH_IPI_H 1 |
#include <asm/genapic.h> |
#define send_IPI_mask (genapic->send_IPI_mask) |
#define send_IPI_allbutself (genapic->send_IPI_allbutself) |
#define send_IPI_all (genapic->send_IPI_all) |
#endif |
/shark/trunk/drivers/linuxc26/include/asm/mach-generic/mach_mpparse.h |
---|
0,0 → 1,12 |
#ifndef _MACH_MPPARSE_H |
#define _MACH_MPPARSE_H 1 |
#include <asm/genapic.h> |
#define mpc_oem_bus_info (genapic->mpc_oem_bus_info) |
#define mpc_oem_pci_bus (genapic->mpc_oem_pci_bus) |
int mps_oem_check(struct mp_config_table *mpc, char *oem, char *productid); |
int acpi_madt_oem_check(char *oem_id, char *oem_table_id); |
#endif |
/shark/trunk/drivers/linuxc26/include/asm/mach-generic/mach_mpspec.h |
---|
0,0 → 1,13 |
#ifndef __ASM_MACH_MPSPEC_H |
#define __ASM_MACH_MPSPEC_H |
/* |
* a maximum of 256 APICs with the current APIC ID architecture. |
*/ |
#define MAX_APICS 256 |
#define MAX_IRQ_SOURCES 256 |
#define MAX_MP_BUSSES 32 |
#endif /* __ASM_MACH_MPSPEC_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-generic/mach_apicdef.h |
---|
0,0 → 1,11 |
#ifndef _GENAPIC_MACH_APICDEF_H |
#define _GENAPIC_MACH_APICDEF_H 1 |
#ifndef APIC_DEFINITION |
#include <asm/genapic.h> |
#define GET_APIC_ID (genapic->get_apic_id) |
#define APIC_ID_MASK (genapic->apic_id_mask) |
#endif |
#endif |
/shark/trunk/drivers/linuxc26/include/asm/mach-generic/mach_apic.h |
---|
0,0 → 1,31 |
#ifndef __ASM_MACH_APIC_H |
#define __ASM_MACH_APIC_H |
#include <asm/genapic.h> |
#define esr_disable (genapic->esr_disable) |
#define NO_BALANCE_IRQ (genapic->no_balance_irq) |
#define NO_IOAPIC_CHECK (genapic->no_ioapic_check) |
#define APIC_BROADCAST_ID (genapic->apic_broadcast_id) |
#define INT_DELIVERY_MODE (genapic->int_delivery_mode) |
#define INT_DEST_MODE (genapic->int_dest_mode) |
#define TARGET_CPUS (genapic->target_cpus()) |
#define apic_id_registered (genapic->apic_id_registered) |
#define apic_id_registered (genapic->apic_id_registered) |
#define init_apic_ldr (genapic->init_apic_ldr) |
#define ioapic_phys_id_map (genapic->ioapic_phys_id_map) |
#define clustered_apic_check (genapic->clustered_apic_check) |
#define multi_timer_check (genapic->multi_timer_check) |
#define apicid_to_node (genapic->apicid_to_node) |
#define cpu_to_logical_apicid (genapic->cpu_to_logical_apicid) |
#define cpu_present_to_apicid (genapic->cpu_present_to_apicid) |
#define apicid_to_cpu_present (genapic->apicid_to_cpu_present) |
#define mpc_apic_id (genapic->mpc_apic_id) |
#define setup_portio_remap (genapic->setup_portio_remap) |
#define check_apicid_present (genapic->check_apicid_present) |
#define check_phys_apicid_present (genapic->check_phys_apicid_present) |
#define check_apicid_used (genapic->check_apicid_used) |
#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid) |
#define enable_apic_mode (genapic->enable_apic_mode) |
#endif /* __ASM_MACH_APIC_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-pc9800/apm.h |
---|
0,0 → 1,82 |
/* |
* include/asm-i386/mach-pc9800/apm.h |
* |
* Machine specific APM BIOS functions for NEC PC9800. |
* Split out from apm.c by Osamu Tomita <tomita@cinet.co.jp> |
*/ |
#ifndef _ASM_APM_H |
#define _ASM_APM_H |
#include <linux/apm_bios.h> |
#ifdef APM_ZERO_SEGS |
# define APM_DO_ZERO_SEGS \ |
"pushl %%ds\n\t" \ |
"pushl %%es\n\t" \ |
"xorl %%edx, %%edx\n\t" \ |
"mov %%dx, %%ds\n\t" \ |
"mov %%dx, %%es\n\t" \ |
"mov %%dx, %%fs\n\t" \ |
"mov %%dx, %%gs\n\t" |
# define APM_DO_POP_SEGS \ |
"popl %%es\n\t" \ |
"popl %%ds\n\t" |
#else |
# define APM_DO_ZERO_SEGS |
# define APM_DO_POP_SEGS |
#endif |
static inline void apm_bios_call_asm(u32 func, u32 ebx_in, u32 ecx_in, |
u32 *eax, u32 *ebx, u32 *ecx, |
u32 *edx, u32 *esi) |
{ |
/* |
* N.B. We do NOT need a cld after the BIOS call |
* because we always save and restore the flags. |
*/ |
__asm__ __volatile__(APM_DO_ZERO_SEGS |
"pushl %%edi\n\t" |
"pushl %%ebp\n\t" |
"pushfl\n\t" |
"lcall *%%cs:apm_bios_entry\n\t" |
"setc %%al\n\t" |
"popl %%ebp\n\t" |
"popl %%edi\n\t" |
APM_DO_POP_SEGS |
: "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx), |
"=S" (*esi) |
: "a" (func), "b" (ebx_in), "c" (ecx_in) |
: "memory", "cc"); |
} |
static inline u8 apm_bios_call_simple_asm(u32 func, u32 ebx_in, |
u32 ecx_in, u32 *eax) |
{ |
int cx, dx, si; |
u8 error; |
/* |
* N.B. We do NOT need a cld after the BIOS call |
* because we always save and restore the flags. |
*/ |
__asm__ __volatile__(APM_DO_ZERO_SEGS |
"pushl %%edi\n\t" |
"pushl %%ebp\n\t" |
"pushfl\n\t" |
"lcall *%%cs:apm_bios_entry\n\t" |
"setc %%bl\n\t" |
"popl %%ebp\n\t" |
"popl %%edi\n\t" |
APM_DO_POP_SEGS |
: "=a" (*eax), "=b" (error), "=c" (cx), "=d" (dx), |
"=S" (si) |
: "a" (func), "b" (ebx_in), "c" (ecx_in) |
: "memory", "cc"); |
if (func == APM_FUNC_VERSION) |
*eax = (*eax & 0xff00) | ((*eax & 0x00f0) >> 4); |
return error; |
} |
#endif /* _ASM_APM_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-pc9800/io_ports.h |
---|
0,0 → 1,30 |
/* |
* arch/i386/mach-pc9800/io_ports.h |
* |
* Machine specific IO port address definition for PC-9800. |
* Written by Osamu Tomita <tomita@cinet.co.jp> |
*/ |
#ifndef _MACH_IO_PORTS_H |
#define _MACH_IO_PORTS_H |
/* i8253A PIT registers */ |
#define PIT_MODE 0x77 |
#define PIT_CH0 0x71 |
#define PIT_CH2 0x75 |
/* i8259A PIC registers */ |
#define PIC_MASTER_CMD 0x00 |
#define PIC_MASTER_IMR 0x02 |
#define PIC_MASTER_ISR PIC_MASTER_CMD |
#define PIC_MASTER_POLL PIC_MASTER_ISR |
#define PIC_MASTER_OCW3 PIC_MASTER_ISR |
#define PIC_SLAVE_CMD 0x08 |
#define PIC_SLAVE_IMR 0x0a |
/* i8259A PIC related values */ |
#define PIC_CASCADE_IR 7 |
#define MASTER_ICW4_DEFAULT 0x1d |
#define SLAVE_ICW4_DEFAULT 0x09 |
#define PIC_ICW4_AEOI 0x02 |
#endif /* !_MACH_IO_PORTS_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-pc9800/irq_vectors.h |
---|
0,0 → 1,98 |
/* |
* This file should contain #defines for all of the interrupt vector |
* numbers used by this architecture. |
* |
* In addition, there are some standard defines: |
* |
* FIRST_EXTERNAL_VECTOR: |
* The first free place for external interrupts |
* |
* SYSCALL_VECTOR: |
* The IRQ vector a syscall makes the user to kernel transition |
* under. |
* |
* TIMER_IRQ: |
* The IRQ number the timer interrupt comes in at. |
* |
* NR_IRQS: |
* The total number of interrupt vectors (including all the |
* architecture specific interrupts) needed. |
* |
* NR_IRQ_VECTORS: |
* The total number of IO APIC vector inputs |
* |
*/ |
#ifndef _ASM_IRQ_VECTORS_H |
#define _ASM_IRQ_VECTORS_H |
/* |
* IDT vectors usable for external interrupt sources start |
* at 0x20: |
*/ |
#define FIRST_EXTERNAL_VECTOR 0x20 |
#define SYSCALL_VECTOR 0x80 |
/* |
* Vectors 0x20-0x2f are used for ISA interrupts. |
*/ |
/* |
* Special IRQ vectors used by the SMP architecture, 0xf0-0xff |
* |
* some of the following vectors are 'rare', they are merged |
* into a single vector (CALL_FUNCTION_VECTOR) to save vector space. |
* TLB, reschedule and local APIC vectors are performance-critical. |
* |
* Vectors 0xf0-0xfa are free (reserved for future Linux use). |
*/ |
#define SPURIOUS_APIC_VECTOR 0xff |
#define ERROR_APIC_VECTOR 0xfe |
#define INVALIDATE_TLB_VECTOR 0xfd |
#define RESCHEDULE_VECTOR 0xfc |
#define CALL_FUNCTION_VECTOR 0xfb |
#define THERMAL_APIC_VECTOR 0xf0 |
/* |
* Local APIC timer IRQ vector is on a different priority level, |
* to work around the 'lost local interrupt if more than 2 IRQ |
* sources per level' errata. |
*/ |
#define LOCAL_TIMER_VECTOR 0xef |
/* |
* First APIC vector available to drivers: (vectors 0x30-0xee) |
* we start at 0x31 to spread out vectors evenly between priority |
* levels. (0x80 is the syscall vector) |
*/ |
#define FIRST_DEVICE_VECTOR 0x31 |
#define FIRST_SYSTEM_VECTOR 0xef |
#define TIMER_IRQ 0 |
/* |
* 16 8259A IRQ's, 208 potential APIC interrupt sources. |
* Right now the APIC is mostly only used for SMP. |
* 256 vectors is an architectural limit. (we can have |
* more than 256 devices theoretically, but they will |
* have to use shared interrupts) |
* Since vectors 0x00-0x1f are used/reserved for the CPU, |
* the usable vector space is 0x20-0xff (224 vectors) |
*/ |
#ifdef CONFIG_X86_IO_APIC |
#define NR_IRQS 224 |
#else |
#define NR_IRQS 16 |
#endif |
#define NR_IRQ_VECTORS NR_IRQS |
#define FPU_IRQ 8 |
#define FIRST_VM86_IRQ 2 |
#define LAST_VM86_IRQ 15 |
#define invalid_vm86_irq(irq) ((irq) < 2 || (irq) == 7 || (irq) > 15) |
#endif /* _ASM_IRQ_VECTORS_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-pc9800/pci-functions.h |
---|
0,0 → 1,20 |
/* |
* PCI BIOS function codes for the PC9800. Different to |
* standard PC systems |
*/ |
/* Note: PC-9800 confirms PCI 2.1 on only few models */ |
#define PCIBIOS_PCI_FUNCTION_ID 0xccXX |
#define PCIBIOS_PCI_BIOS_PRESENT 0xcc81 |
#define PCIBIOS_FIND_PCI_DEVICE 0xcc82 |
#define PCIBIOS_FIND_PCI_CLASS_CODE 0xcc83 |
/* PCIBIOS_GENERATE_SPECIAL_CYCLE 0xcc86 (not supported by bios) */ |
#define PCIBIOS_READ_CONFIG_BYTE 0xcc88 |
#define PCIBIOS_READ_CONFIG_WORD 0xcc89 |
#define PCIBIOS_READ_CONFIG_DWORD 0xcc8a |
#define PCIBIOS_WRITE_CONFIG_BYTE 0xcc8b |
#define PCIBIOS_WRITE_CONFIG_WORD 0xcc8c |
#define PCIBIOS_WRITE_CONFIG_DWORD 0xcc8d |
#define PCIBIOS_GET_ROUTING_OPTIONS 0xcc8e /* PCI 2.1 only */ |
#define PCIBIOS_SET_PCI_HW_INT 0xcc8f /* PCI 2.1 only */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-pc9800/mach_traps.h |
---|
0,0 → 1,27 |
/* |
* include/asm-i386/mach-pc9800/mach_traps.h |
* |
* Machine specific NMI handling for PC-9800. |
* Written by Osamu Tomita <tomita@cinet.co.jp> |
*/ |
#ifndef _MACH_TRAPS_H |
#define _MACH_TRAPS_H |
static inline void clear_mem_error(unsigned char reason) |
{ |
outb(0x08, 0x37); |
outb(0x09, 0x37); |
} |
static inline unsigned char get_nmi_reason(void) |
{ |
return (inb(0x33) & 6) ? 0x80 : 0; |
} |
static inline void reassert_nmi(void) |
{ |
outb(0x09, 0x50); /* disable NMI once */ |
outb(0x09, 0x52); /* re-enable it */ |
} |
#endif /* !_MACH_TRAPS_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-pc9800/mach_resources.h |
---|
0,0 → 1,191 |
/* |
* include/asm-i386/mach-pc9800/mach_resources.h |
* |
* Machine specific resource allocation for PC-9800. |
* Written by Osamu Tomita <tomita@cinet.co.jp> |
*/ |
#ifndef _MACH_RESOURCES_H |
#define _MACH_RESOURCES_H |
static char str_pic1[] = "pic1"; |
static char str_dma[] = "dma"; |
static char str_pic2[] = "pic2"; |
static char str_calender_clock[] = "calender clock"; |
static char str_system[] = "system"; |
static char str_nmi_control[] = "nmi control"; |
static char str_kanji_rom[] = "kanji rom"; |
static char str_keyboard[] = "keyboard"; |
static char str_text_gdc[] = "text gdc"; |
static char str_crtc[] = "crtc"; |
static char str_timer[] = "timer"; |
static char str_graphic_gdc[] = "graphic gdc"; |
static char str_dma_ex_bank[] = "dma ex. bank"; |
static char str_beep_freq[] = "beep freq."; |
static char str_mouse_pio[] = "mouse pio"; |
struct resource standard_io_resources[] = { |
{ str_pic1, 0x00, 0x00, IORESOURCE_BUSY }, |
{ str_dma, 0x01, 0x01, IORESOURCE_BUSY }, |
{ str_pic1, 0x02, 0x02, IORESOURCE_BUSY }, |
{ str_dma, 0x03, 0x03, IORESOURCE_BUSY }, |
{ str_dma, 0x05, 0x05, IORESOURCE_BUSY }, |
{ str_dma, 0x07, 0x07, IORESOURCE_BUSY }, |
{ str_pic2, 0x08, 0x08, IORESOURCE_BUSY }, |
{ str_dma, 0x09, 0x09, IORESOURCE_BUSY }, |
{ str_pic2, 0x0a, 0x0a, IORESOURCE_BUSY }, |
{ str_dma, 0x0b, 0x0b, IORESOURCE_BUSY }, |
{ str_dma, 0x0d, 0x0d, IORESOURCE_BUSY }, |
{ str_dma, 0x0f, 0x0f, IORESOURCE_BUSY }, |
{ str_dma, 0x11, 0x11, IORESOURCE_BUSY }, |
{ str_dma, 0x13, 0x13, IORESOURCE_BUSY }, |
{ str_dma, 0x15, 0x15, IORESOURCE_BUSY }, |
{ str_dma, 0x17, 0x17, IORESOURCE_BUSY }, |
{ str_dma, 0x19, 0x19, IORESOURCE_BUSY }, |
{ str_dma, 0x1b, 0x1b, IORESOURCE_BUSY }, |
{ str_dma, 0x1d, 0x1d, IORESOURCE_BUSY }, |
{ str_dma, 0x1f, 0x1f, IORESOURCE_BUSY }, |
{ str_calender_clock, 0x20, 0x20, 0 }, |
{ str_dma, 0x21, 0x21, IORESOURCE_BUSY }, |
{ str_calender_clock, 0x22, 0x22, 0 }, |
{ str_dma, 0x23, 0x23, IORESOURCE_BUSY }, |
{ str_dma, 0x25, 0x25, IORESOURCE_BUSY }, |
{ str_dma, 0x27, 0x27, IORESOURCE_BUSY }, |
{ str_dma, 0x29, 0x29, IORESOURCE_BUSY }, |
{ str_dma, 0x2b, 0x2b, IORESOURCE_BUSY }, |
{ str_dma, 0x2d, 0x2d, IORESOURCE_BUSY }, |
{ str_system, 0x31, 0x31, IORESOURCE_BUSY }, |
{ str_system, 0x33, 0x33, IORESOURCE_BUSY }, |
{ str_system, 0x35, 0x35, IORESOURCE_BUSY }, |
{ str_system, 0x37, 0x37, IORESOURCE_BUSY }, |
{ str_nmi_control, 0x50, 0x50, IORESOURCE_BUSY }, |
{ str_nmi_control, 0x52, 0x52, IORESOURCE_BUSY }, |
{ "time stamp", 0x5c, 0x5f, IORESOURCE_BUSY }, |
{ str_kanji_rom, 0xa1, 0xa1, IORESOURCE_BUSY }, |
{ str_kanji_rom, 0xa3, 0xa3, IORESOURCE_BUSY }, |
{ str_kanji_rom, 0xa5, 0xa5, IORESOURCE_BUSY }, |
{ str_kanji_rom, 0xa7, 0xa7, IORESOURCE_BUSY }, |
{ str_kanji_rom, 0xa9, 0xa9, IORESOURCE_BUSY }, |
{ str_keyboard, 0x41, 0x41, IORESOURCE_BUSY }, |
{ str_keyboard, 0x43, 0x43, IORESOURCE_BUSY }, |
{ str_text_gdc, 0x60, 0x60, IORESOURCE_BUSY }, |
{ str_text_gdc, 0x62, 0x62, IORESOURCE_BUSY }, |
{ str_text_gdc, 0x64, 0x64, IORESOURCE_BUSY }, |
{ str_text_gdc, 0x66, 0x66, IORESOURCE_BUSY }, |
{ str_text_gdc, 0x68, 0x68, IORESOURCE_BUSY }, |
{ str_text_gdc, 0x6a, 0x6a, IORESOURCE_BUSY }, |
{ str_text_gdc, 0x6c, 0x6c, IORESOURCE_BUSY }, |
{ str_text_gdc, 0x6e, 0x6e, IORESOURCE_BUSY }, |
{ str_crtc, 0x70, 0x70, IORESOURCE_BUSY }, |
{ str_crtc, 0x72, 0x72, IORESOURCE_BUSY }, |
{ str_crtc, 0x74, 0x74, IORESOURCE_BUSY }, |
{ str_crtc, 0x74, 0x74, IORESOURCE_BUSY }, |
{ str_crtc, 0x76, 0x76, IORESOURCE_BUSY }, |
{ str_crtc, 0x78, 0x78, IORESOURCE_BUSY }, |
{ str_crtc, 0x7a, 0x7a, IORESOURCE_BUSY }, |
{ str_timer, 0x71, 0x71, IORESOURCE_BUSY }, |
{ str_timer, 0x73, 0x73, IORESOURCE_BUSY }, |
{ str_timer, 0x75, 0x75, IORESOURCE_BUSY }, |
{ str_timer, 0x77, 0x77, IORESOURCE_BUSY }, |
{ str_graphic_gdc, 0xa0, 0xa0, IORESOURCE_BUSY }, |
{ str_graphic_gdc, 0xa2, 0xa2, IORESOURCE_BUSY }, |
{ str_graphic_gdc, 0xa4, 0xa4, IORESOURCE_BUSY }, |
{ str_graphic_gdc, 0xa6, 0xa6, IORESOURCE_BUSY }, |
{ "cpu", 0xf0, 0xf7, IORESOURCE_BUSY }, |
{ "fpu", 0xf8, 0xff, IORESOURCE_BUSY }, |
{ str_dma_ex_bank, 0x0e05, 0x0e05, 0 }, |
{ str_dma_ex_bank, 0x0e07, 0x0e07, 0 }, |
{ str_dma_ex_bank, 0x0e09, 0x0e09, 0 }, |
{ str_dma_ex_bank, 0x0e0b, 0x0e0b, 0 }, |
{ str_beep_freq, 0x3fd9, 0x3fd9, IORESOURCE_BUSY }, |
{ str_beep_freq, 0x3fdb, 0x3fdb, IORESOURCE_BUSY }, |
{ str_beep_freq, 0x3fdd, 0x3fdd, IORESOURCE_BUSY }, |
{ str_beep_freq, 0x3fdf, 0x3fdf, IORESOURCE_BUSY }, |
/* All PC-9800 have (exactly) one mouse interface. */ |
{ str_mouse_pio, 0x7fd9, 0x7fd9, 0 }, |
{ str_mouse_pio, 0x7fdb, 0x7fdb, 0 }, |
{ str_mouse_pio, 0x7fdd, 0x7fdd, 0 }, |
{ str_mouse_pio, 0x7fdf, 0x7fdf, 0 }, |
{ "mouse timer", 0xbfdb, 0xbfdb, 0 }, |
{ "mouse irq", 0x98d7, 0x98d7, 0 }, |
}; |
#define STANDARD_IO_RESOURCES (sizeof(standard_io_resources)/sizeof(struct resource)) |
static struct resource tvram_resource = { "Text VRAM/CG window", 0xa0000, 0xa4fff, IORESOURCE_BUSY }; |
static struct resource gvram_brg_resource = { "Graphic VRAM (B/R/G)", 0xa8000, 0xbffff, IORESOURCE_BUSY }; |
static struct resource gvram_e_resource = { "Graphic VRAM (E)", 0xe0000, 0xe7fff, IORESOURCE_BUSY }; |
/* System ROM resources */ |
#define MAXROMS 6 |
static struct resource rom_resources[MAXROMS] = { |
{ "System ROM", 0xe8000, 0xfffff, IORESOURCE_BUSY } |
}; |
static inline void probe_video_rom(int roms) |
{ |
/* PC-9800 has no video ROM */ |
} |
static inline void probe_extension_roms(int roms) |
{ |
int i; |
__u8 *xrom_id; |
xrom_id = (__u8 *) isa_bus_to_virt(PC9800SCA_XROM_ID + 0x10); |
for (i = 0; i < 16; i++) { |
if (xrom_id[i] & 0x80) { |
int j; |
for (j = i + 1; j < 16 && (xrom_id[j] & 0x80); j++) |
; |
rom_resources[roms].start = 0x0d0000 + i * 0x001000; |
rom_resources[roms].end = 0x0d0000 + j * 0x001000 - 1; |
rom_resources[roms].name = "Extension ROM"; |
rom_resources[roms].flags = IORESOURCE_BUSY; |
request_resource(&iomem_resource, |
rom_resources + roms); |
if (++roms >= MAXROMS) |
return; |
} |
} |
} |
static inline void request_graphics_resource(void) |
{ |
int i; |
if (PC9800_HIGHRESO_P()) { |
tvram_resource.start = 0xe0000; |
tvram_resource.end = 0xe4fff; |
gvram_brg_resource.name = "Graphic VRAM"; |
gvram_brg_resource.start = 0xc0000; |
gvram_brg_resource.end = 0xdffff; |
} |
request_resource(&iomem_resource, &tvram_resource); |
request_resource(&iomem_resource, &gvram_brg_resource); |
if (!PC9800_HIGHRESO_P()) |
request_resource(&iomem_resource, &gvram_e_resource); |
if (PC9800_HIGHRESO_P() || PC9800_9821_P()) { |
static char graphics[] = "graphics"; |
static struct resource graphics_resources[] = { |
{ graphics, 0x9a0, 0x9a0, 0 }, |
{ graphics, 0x9a2, 0x9a2, 0 }, |
{ graphics, 0x9a4, 0x9a4, 0 }, |
{ graphics, 0x9a6, 0x9a6, 0 }, |
{ graphics, 0x9a8, 0x9a8, 0 }, |
{ graphics, 0x9aa, 0x9aa, 0 }, |
{ graphics, 0x9ac, 0x9ac, 0 }, |
{ graphics, 0x9ae, 0x9ae, 0 }, |
}; |
#define GRAPHICS_RESOURCES (sizeof(graphics_resources)/sizeof(struct resource)) |
for (i = 0; i < GRAPHICS_RESOURCES; i++) |
request_resource(&ioport_resource, graphics_resources + i); |
} |
} |
#endif /* !_MACH_RESOURCES_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-pc9800/mach_reboot.h |
---|
0,0 → 1,21 |
/* |
* arch/i386/mach-pc9800/mach_reboot.h |
* |
* Machine specific reboot functions for PC-9800. |
* Written by Osamu Tomita <tomita@cinet.co.jp> |
*/ |
#ifndef _MACH_REBOOT_H |
#define _MACH_REBOOT_H |
#ifdef CMOS_WRITE |
#undef CMOS_WRITE |
#define CMOS_WRITE(a,b) do{}while(0) |
#endif |
static inline void mach_reboot(void) |
{ |
outb(0, 0xf0); /* signal CPU reset */ |
mdelay(1); |
} |
#endif /* !_MACH_REBOOT_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-pc9800/setup_arch_post.h |
---|
0,0 → 1,29 |
/** |
* machine_specific_memory_setup - Hook for machine specific memory setup. |
* |
* Description: |
* This is included late in kernel/setup.c so that it can make |
* use of all of the static functions. |
**/ |
static inline char * __init machine_specific_memory_setup(void) |
{ |
char *who; |
unsigned long low_mem_size, lower_high, higher_high; |
who = "BIOS (common area)"; |
low_mem_size = ((*(unsigned char *)__va(PC9800SCA_BIOS_FLAG) & 7) + 1) << 17; |
add_memory_region(0, low_mem_size, 1); |
lower_high = (__u32) *(__u8 *) bus_to_virt(PC9800SCA_EXPMMSZ) << 17; |
higher_high = (__u32) *(__u16 *) bus_to_virt(PC9800SCA_MMSZ16M) << 20; |
if (lower_high != 0x00f00000UL) { |
add_memory_region(HIGH_MEMORY, lower_high, 1); |
add_memory_region(0x01000000UL, higher_high, 1); |
} |
else |
add_memory_region(HIGH_MEMORY, lower_high + higher_high, 1); |
return who; |
} |
/shark/trunk/drivers/linuxc26/include/asm/mach-pc9800/do_timer.h |
---|
0,0 → 1,82 |
/* defines for inline arch setup functions */ |
#include <asm/apic.h> |
/** |
* do_timer_interrupt_hook - hook into timer tick |
* @regs: standard registers from interrupt |
* |
* Description: |
* This hook is called immediately after the timer interrupt is ack'd. |
* It's primary purpose is to allow architectures that don't possess |
* individual per CPU clocks (like the CPU APICs supply) to broadcast the |
* timer interrupt as a means of triggering reschedules etc. |
**/ |
static inline void do_timer_interrupt_hook(struct pt_regs *regs) |
{ |
do_timer(regs); |
/* |
* In the SMP case we use the local APIC timer interrupt to do the |
* profiling, except when we simulate SMP mode on a uniprocessor |
* system, in that case we have to call the local interrupt handler. |
*/ |
#ifndef CONFIG_X86_LOCAL_APIC |
x86_do_profile(regs); |
#else |
if (!using_apic_timer) |
smp_local_timer_interrupt(regs); |
#endif |
} |
/* you can safely undefine this if you don't have the Neptune chipset */ |
#define BUGGY_NEPTUN_TIMER |
/** |
* do_timer_overflow - process a detected timer overflow condition |
* @count: hardware timer interrupt count on overflow |
* |
* Description: |
* This call is invoked when the jiffies count has not incremented but |
* the hardware timer interrupt has. It means that a timer tick interrupt |
* came along while the previous one was pending, thus a tick was missed |
**/ |
static inline int do_timer_overflow(int count) |
{ |
int i; |
spin_lock(&i8259A_lock); |
/* |
* This is tricky when I/O APICs are used; |
* see do_timer_interrupt(). |
*/ |
i = inb(0x00); |
spin_unlock(&i8259A_lock); |
/* assumption about timer being IRQ0 */ |
if (i & 0x01) { |
/* |
* We cannot detect lost timer interrupts ... |
* well, that's why we call them lost, don't we? :) |
* [hmm, on the Pentium and Alpha we can ... sort of] |
*/ |
count -= LATCH; |
} else { |
#ifdef BUGGY_NEPTUN_TIMER |
/* |
* for the Neptun bug we know that the 'latch' |
* command doesn't latch the high and low value |
* of the counter atomically. Thus we have to |
* substract 256 from the counter |
* ... funny, isnt it? :) |
*/ |
count -= 256; |
#else |
printk("do_slow_gettimeoffset(): hardware timer problem?\n"); |
#endif |
} |
return count; |
} |
/shark/trunk/drivers/linuxc26/include/asm/mach-pc9800/setup_arch_pre.h |
---|
0,0 → 1,36 |
/* Hook to call BIOS initialisation function */ |
/* no action for generic */ |
#define ARCH_SETUP arch_setup_pc9800(); |
#include <linux/timex.h> |
#include <asm/io.h> |
#include <asm/pc9800.h> |
#include <asm/pc9800_sca.h> |
int CLOCK_TICK_RATE; |
extern unsigned long tick_usec; /* ACTHZ period (usec) */ |
extern unsigned long tick_nsec; /* USER_HZ period (nsec) */ |
unsigned char pc9800_misc_flags; |
/* (bit 0) 1:High Address Video ram exists 0:otherwise */ |
#ifdef CONFIG_SMP |
#define MPC_TABLE_SIZE 512 |
#define MPC_TABLE ((char *) (PARAM+0x400)) |
char mpc_table[MPC_TABLE_SIZE]; |
#endif |
static inline void arch_setup_pc9800(void) |
{ |
CLOCK_TICK_RATE = PC9800_8MHz_P() ? 1996800 : 2457600; |
printk(KERN_DEBUG "CLOCK_TICK_RATE = %d\n", CLOCK_TICK_RATE); |
tick_usec = TICK_USEC; /* USER_HZ period (usec) */ |
tick_nsec = TICK_NSEC; /* ACTHZ period (nsec) */ |
pc9800_misc_flags = PC9800_MISC_FLAGS; |
#ifdef CONFIG_SMP |
if ((*(u32 *)(MPC_TABLE)) == 0x504d4350) |
memcpy(mpc_table, MPC_TABLE, *(u16 *)(MPC_TABLE + 4)); |
#endif /* CONFIG_SMP */ |
} |
/shark/trunk/drivers/linuxc26/include/asm/mach-pc9800/smpboot_hooks.h |
---|
0,0 → 1,52 |
/* two abstractions specific to kernel/smpboot.c, mainly to cater to visws |
* which needs to alter them. */ |
static inline void smpboot_clear_io_apic_irqs(void) |
{ |
io_apic_irqs = 0; |
} |
static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip) |
{ |
/* reset code is stored in 8255 on PC-9800. */ |
outb(0x0e, 0x37); /* SHUT0 = 0 */ |
local_flush_tlb(); |
Dprintk("1.\n"); |
*((volatile unsigned short *) TRAMPOLINE_HIGH) = start_eip >> 4; |
Dprintk("2.\n"); |
*((volatile unsigned short *) TRAMPOLINE_LOW) = start_eip & 0xf; |
Dprintk("3.\n"); |
/* |
* On PC-9800, continuation on warm reset is done by loading |
* %ss:%sp from 0x0000:0404 and executing 'lret', so: |
*/ |
/* 0x3f0 is on unused interrupt vector and should be safe... */ |
*((volatile unsigned long *) phys_to_virt(0x404)) = 0x000003f0; |
Dprintk("4.\n"); |
} |
static inline void smpboot_restore_warm_reset_vector(void) |
{ |
/* |
* Install writable page 0 entry to set BIOS data area. |
*/ |
local_flush_tlb(); |
/* |
* Paranoid: Set warm reset code and vector here back |
* to default values. |
*/ |
outb(0x0f, 0x37); /* SHUT0 = 1 */ |
*((volatile long *) phys_to_virt(0x404)) = 0; |
} |
static inline void smpboot_setup_io_apic(void) |
{ |
/* |
* Here we can be sure that there is an IO-APIC in the system. Let's |
* go and set it up: |
*/ |
if (!skip_ioapic_setup && nr_ioapics) |
setup_IO_APIC(); |
} |
/shark/trunk/drivers/linuxc26/include/asm/mach-pc9800/mach_time.h |
---|
0,0 → 1,100 |
/* |
* include/asm-i386/mach-pc9800/mach_time.h |
* |
* Machine specific set RTC function for PC-9800. |
* Written by Osamu Tomita <tomita@cinet.co.jp> |
*/ |
#ifndef _MACH_TIME_H |
#define _MACH_TIME_H |
#include <linux/bcd.h> |
#include <linux/upd4990a.h> |
/* for check timing call set_rtc_mmss() */ |
/* used in arch/i386/time.c::do_timer_interrupt() */ |
/* |
* Because PC-9800's RTC (NEC uPD4990A) does not allow setting |
* time partially, we always have to read-modify-write the |
* entire time (including year) so that set_rtc_mmss() will |
* take quite much time to execute. You may want to relax |
* RTC resetting interval (currently ~11 minuts)... |
*/ |
#define USEC_AFTER 1000000 |
#define USEC_BEFORE 0 |
static inline int mach_set_rtc_mmss(unsigned long nowtime) |
{ |
int retval = 0; |
int real_seconds, real_minutes, cmos_minutes; |
struct upd4990a_raw_data data; |
upd4990a_get_time(&data, 1); |
cmos_minutes = BCD2BIN(data.min); |
/* |
* since we're only adjusting minutes and seconds, |
* don't interfere with hour overflow. This avoids |
* messing with unknown time zones but requires your |
* RTC not to be off by more than 15 minutes |
*/ |
real_seconds = nowtime % 60; |
real_minutes = nowtime / 60; |
if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1) |
real_minutes += 30; /* correct for half hour time zone */ |
real_minutes %= 60; |
if (abs(real_minutes - cmos_minutes) < 30) { |
u8 temp_seconds = (real_seconds / 10) * 16 + real_seconds % 10; |
u8 temp_minutes = (real_minutes / 10) * 16 + real_minutes % 10; |
if (data.sec != temp_seconds || data.min != temp_minutes) { |
data.sec = temp_seconds; |
data.min = temp_minutes; |
upd4990a_set_time(&data, 1); |
} |
} else { |
printk(KERN_WARNING |
"set_rtc_mmss: can't update from %d to %d\n", |
cmos_minutes, real_minutes); |
retval = -1; |
} |
/* uPD4990A users' manual says we should issue Register Hold |
* command after reading time, or future Time Read command |
* may not work. When we have set the time, this also starts |
* the clock. |
*/ |
upd4990a_serial_command(UPD4990A_REGISTER_HOLD); |
return retval; |
} |
static inline unsigned long mach_get_cmos_time(void) |
{ |
int i; |
u8 prev, cur; |
unsigned int year; |
struct upd4990a_raw_data data; |
/* Connect uPD4990A's DATA OUT pin to its 1Hz reference clock. */ |
upd4990a_serial_command(UPD4990A_REGISTER_HOLD); |
/* Catch rising edge of reference clock. */ |
prev = ~UPD4990A_READ_DATA(); |
for (i = 0; i < 1800000; i++) { /* may take up to 1 second... */ |
__asm__ ("outb %%al,%0" : : "N" (0x5f)); /* 0.6usec delay */ |
cur = UPD4990A_READ_DATA(); |
if (!(prev & cur & 1)) |
break; |
prev = ~cur; |
} |
upd4990a_get_time(&data, 0); |
if ((year = BCD2BIN(data.year) + 1900) < 1995) |
year += 100; |
return mktime(year, data.mon, BCD2BIN(data.mday), BCD2BIN(data.hour), |
BCD2BIN(data.min), BCD2BIN(data.sec)); |
} |
#endif /* !_MACH_TIME_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-pc9800/bios_ebda.h |
---|
0,0 → 1,14 |
#ifndef _MACH_BIOS_EBDA_H |
#define _MACH_BIOS_EBDA_H |
/* |
* PC-9800 has no EBDA. |
* Its BIOS uses 0x40E for other purpose, |
* Not pointer to 4K EBDA area. |
*/ |
static inline unsigned int get_bios_ebda(void) |
{ |
return 0; /* 0 means none */ |
} |
#endif /* _MACH_BIOS_EBDA_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-pc9800/mach_wakecpu.h |
---|
0,0 → 1,45 |
#ifndef __ASM_MACH_WAKECPU_H |
#define __ASM_MACH_WAKECPU_H |
/* |
* This file copes with machines that wakeup secondary CPUs by the |
* INIT, INIT, STARTUP sequence. |
*/ |
#define WAKE_SECONDARY_VIA_INIT |
/* |
* On PC-9800, continuation on warm reset is done by loading |
* %ss:%sp from 0x0000:0404 and executing 'lret', so: |
*/ |
#define TRAMPOLINE_LOW phys_to_virt(0x4fa) |
#define TRAMPOLINE_HIGH phys_to_virt(0x4fc) |
#define boot_cpu_apicid boot_cpu_physical_apicid |
static inline void wait_for_init_deassert(atomic_t *deassert) |
{ |
while (!atomic_read(deassert)); |
return; |
} |
/* Nothing to do for most platforms, since cleared by the INIT cycle */ |
static inline void smp_callin_clear_local_apic(void) |
{ |
} |
static inline void store_NMI_vector(unsigned short *high, unsigned short *low) |
{ |
} |
static inline void restore_NMI_vector(unsigned short *high, unsigned short *low) |
{ |
} |
#if APIC_DEBUG |
#define inquire_remote_apic(apicid) __inquire_remote_apic(apicid) |
#else |
#define inquire_remote_apic(apicid) {} |
#endif |
#endif /* __ASM_MACH_WAKECPU_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-pc9800/mach_timer.h |
---|
0,0 → 1,31 |
/* |
* include/asm-i386/mach-pc9800/mach_timer.h |
* |
* Machine specific calibrate_tsc() for PC-9800. |
* Written by Osamu Tomita <tomita@cinet.co.jp> |
*/ |
/* ------ Calibrate the TSC ------- |
* PC-9800: |
* CTC cannot be used because some models (especially |
* note-machines) may disable clock to speaker channel (#1) |
* unless speaker is enabled. We use ARTIC instead. |
*/ |
#ifndef _MACH_TIMER_H |
#define _MACH_TIMER_H |
#define CALIBRATE_LATCH (5 * 307200/HZ) /* 0.050sec * 307200Hz = 15360 */ |
static inline void mach_prepare_counter(void) |
{ |
/* ARTIC can't be stopped nor reset. So we wait roundup. */ |
while (inw(0x5c)); |
} |
static inline void mach_countup(unsigned long *count) |
{ |
do { |
*count = inw(0x5c); |
} while (*count < CALIBRATE_LATCH); |
} |
#endif /* !_MACH_TIMER_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-numaq/mach_ipi.h |
---|
0,0 → 1,25 |
#ifndef __ASM_MACH_IPI_H |
#define __ASM_MACH_IPI_H |
static inline void send_IPI_mask_sequence(cpumask_t, int vector); |
static inline void send_IPI_mask(cpumask_t mask, int vector) |
{ |
send_IPI_mask_sequence(mask, vector); |
} |
static inline void send_IPI_allbutself(int vector) |
{ |
cpumask_t mask = cpu_online_map; |
cpu_clear(smp_processor_id(), mask); |
if (!cpus_empty(mask)) |
send_IPI_mask(mask, vector); |
} |
static inline void send_IPI_all(int vector) |
{ |
send_IPI_mask(cpu_online_map, vector); |
} |
#endif /* __ASM_MACH_IPI_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-numaq/mach_mpparse.h |
---|
0,0 → 1,29 |
#ifndef __ASM_MACH_MPPARSE_H |
#define __ASM_MACH_MPPARSE_H |
static inline void mpc_oem_bus_info(struct mpc_config_bus *m, char *name, |
struct mpc_config_translation *translation) |
{ |
int quad = translation->trans_quad; |
int local = translation->trans_local; |
mp_bus_id_to_node[m->mpc_busid] = quad; |
mp_bus_id_to_local[m->mpc_busid] = local; |
printk("Bus #%d is %s (node %d)\n", m->mpc_busid, name, quad); |
} |
static inline void mpc_oem_pci_bus(struct mpc_config_bus *m, |
struct mpc_config_translation *translation) |
{ |
int quad = translation->trans_quad; |
int local = translation->trans_local; |
quad_local_to_mp_bus_id[quad][local] = m->mpc_busid; |
} |
/* Hook from generic ACPI tables.c */ |
static inline void acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
{ |
} |
#endif /* __ASM_MACH_MPPARSE_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-numaq/mach_mpspec.h |
---|
0,0 → 1,13 |
#ifndef __ASM_MACH_MPSPEC_H |
#define __ASM_MACH_MPSPEC_H |
/* |
* a maximum of 256 APICs with the current APIC ID architecture. |
*/ |
#define MAX_APICS 256 |
#define MAX_IRQ_SOURCES 512 |
#define MAX_MP_BUSSES 32 |
#endif /* __ASM_MACH_MPSPEC_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-numaq/mach_apicdef.h |
---|
0,0 → 1,14 |
#ifndef __ASM_MACH_APICDEF_H |
#define __ASM_MACH_APICDEF_H |
#define APIC_ID_MASK (0xF<<24) |
static inline unsigned get_apic_id(unsigned long x) |
{ |
return (((x)>>24)&0x0F); |
} |
#define GET_APIC_ID(x) get_apic_id(x) |
#endif |
/shark/trunk/drivers/linuxc26/include/asm/mach-numaq/mach_apic.h |
---|
0,0 → 1,144 |
#ifndef __ASM_MACH_APIC_H |
#define __ASM_MACH_APIC_H |
#include <asm/io.h> |
#include <linux/mmzone.h> |
#define APIC_DFR_VALUE (APIC_DFR_CLUSTER) |
static inline cpumask_t target_cpus(void) |
{ |
cpumask_t tmp = CPU_MASK_ALL; |
return tmp; |
} |
#define TARGET_CPUS (target_cpus()) |
#define NO_BALANCE_IRQ (1) |
#define esr_disable (1) |
#define NO_IOAPIC_CHECK (0) |
#define INT_DELIVERY_MODE dest_LowestPrio |
#define INT_DEST_MODE 0 /* physical delivery on LOCAL quad */ |
#define APIC_BROADCAST_ID 0x0F |
#define check_apicid_used(bitmap, apicid) physid_isset(apicid, bitmap) |
#define check_apicid_present(bit) physid_isset(bit, phys_cpu_present_map) |
#define apicid_cluster(apicid) (apicid & 0xF0) |
static inline int apic_id_registered(void) |
{ |
return 1; |
} |
static inline void init_apic_ldr(void) |
{ |
/* Already done in NUMA-Q firmware */ |
} |
static inline void clustered_apic_check(void) |
{ |
printk("Enabling APIC mode: %s. Using %d I/O APICs\n", |
"NUMA-Q", nr_ioapics); |
} |
/* |
* Skip adding the timer int on secondary nodes, which causes |
* a small but painful rift in the time-space continuum. |
*/ |
static inline int multi_timer_check(int apic, int irq) |
{ |
return apic != 0 && irq == 0; |
} |
static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map) |
{ |
/* We don't have a good way to do this yet - hack */ |
return physids_promote(0xFUL); |
} |
/* Mapping from cpu number to logical apicid */ |
extern u8 cpu_2_logical_apicid[]; |
static inline int cpu_to_logical_apicid(int cpu) |
{ |
if (cpu >= NR_CPUS) |
return BAD_APICID; |
return (int)cpu_2_logical_apicid[cpu]; |
} |
/* |
* Supporting over 60 cpus on NUMA-Q requires a locality-dependent |
* cpu to APIC ID relation to properly interact with the intelligent |
* mode of the cluster controller. |
*/ |
static inline int cpu_present_to_apicid(int mps_cpu) |
{ |
if (mps_cpu < 60) |
return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3)); |
else |
return BAD_APICID; |
} |
static inline int generate_logical_apicid(int quad, int phys_apicid) |
{ |
return (quad << 4) + (phys_apicid ? phys_apicid << 1 : 1); |
} |
static inline int apicid_to_node(int logical_apicid) |
{ |
return logical_apicid >> 4; |
} |
static inline physid_mask_t apicid_to_cpu_present(int logical_apicid) |
{ |
int node = apicid_to_node(logical_apicid); |
int cpu = __ffs(logical_apicid & 0xf); |
return physid_mask_of_physid(cpu + 4*node); |
} |
static inline int mpc_apic_id(struct mpc_config_processor *m, |
struct mpc_config_translation *translation_record) |
{ |
int quad = translation_record->trans_quad; |
int logical_apicid = generate_logical_apicid(quad, m->mpc_apicid); |
printk("Processor #%d %ld:%ld APIC version %d (quad %d, apic %d)\n", |
m->mpc_apicid, |
(m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8, |
(m->mpc_cpufeature & CPU_MODEL_MASK) >> 4, |
m->mpc_apicver, quad, logical_apicid); |
return logical_apicid; |
} |
static inline void setup_portio_remap(void) |
{ |
if (numnodes <= 1) |
return; |
printk("Remapping cross-quad port I/O for %d quads\n", numnodes); |
xquad_portio = ioremap (XQUAD_PORTIO_BASE, numnodes*XQUAD_PORTIO_QUAD); |
printk("xquad_portio vaddr 0x%08lx, len %08lx\n", |
(u_long) xquad_portio, (u_long) numnodes*XQUAD_PORTIO_QUAD); |
} |
static inline int check_phys_apicid_present(int boot_cpu_physical_apicid) |
{ |
return (1); |
} |
static inline void enable_apic_mode(void) |
{ |
} |
/* |
* We use physical apicids here, not logical, so just return the default |
* physical broadcast to stop people from breaking us |
*/ |
static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask) |
{ |
return (int) 0xF; |
} |
#endif /* __ASM_MACH_APIC_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-numaq/mach_wakecpu.h |
---|
0,0 → 1,43 |
#ifndef __ASM_MACH_WAKECPU_H |
#define __ASM_MACH_WAKECPU_H |
/* This file copes with machines that wakeup secondary CPUs by NMIs */ |
#define WAKE_SECONDARY_VIA_NMI |
#define TRAMPOLINE_LOW phys_to_virt(0x8) |
#define TRAMPOLINE_HIGH phys_to_virt(0xa) |
#define boot_cpu_apicid boot_cpu_logical_apicid |
/* We don't do anything here because we use NMI's to boot instead */ |
static inline void wait_for_init_deassert(atomic_t *deassert) |
{ |
} |
/* |
* Because we use NMIs rather than the INIT-STARTUP sequence to |
* bootstrap the CPUs, the APIC may be in a weird state. Kick it. |
*/ |
static inline void smp_callin_clear_local_apic(void) |
{ |
clear_local_APIC(); |
} |
static inline void store_NMI_vector(unsigned short *high, unsigned short *low) |
{ |
printk("Storing NMI vector\n"); |
*high = *((volatile unsigned short *) TRAMPOLINE_HIGH); |
*low = *((volatile unsigned short *) TRAMPOLINE_LOW); |
} |
static inline void restore_NMI_vector(unsigned short *high, unsigned short *low) |
{ |
printk("Restoring NMI vector\n"); |
*((volatile unsigned short *) TRAMPOLINE_HIGH) = *high; |
*((volatile unsigned short *) TRAMPOLINE_LOW) = *low; |
} |
#define inquire_remote_apic(apicid) {} |
#endif /* __ASM_MACH_WAKECPU_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-voyager/entry_arch.h |
---|
0,0 → 1,26 |
/* -*- mode: c; c-basic-offset: 8 -*- */ |
/* Copyright (C) 2002 |
* |
* Author: James.Bottomley@HansenPartnership.com |
* |
* linux/arch/i386/voyager/entry_arch.h |
* |
* This file builds the VIC and QIC CPI gates |
*/ |
/* initialise the voyager interrupt gates |
* |
* This uses the macros in irq.h to set up assembly jump gates. The |
* calls are then redirected to the same routine with smp_ prefixed */ |
BUILD_INTERRUPT(vic_sys_interrupt, VIC_SYS_INT) |
BUILD_INTERRUPT(vic_cmn_interrupt, VIC_CMN_INT) |
BUILD_INTERRUPT(vic_cpi_interrupt, VIC_CPI_LEVEL0); |
/* do all the QIC interrupts */ |
BUILD_INTERRUPT(qic_timer_interrupt, QIC_TIMER_CPI); |
BUILD_INTERRUPT(qic_invalidate_interrupt, QIC_INVALIDATE_CPI); |
BUILD_INTERRUPT(qic_reschedule_interrupt, QIC_RESCHEDULE_CPI); |
BUILD_INTERRUPT(qic_enable_irq_interrupt, QIC_ENABLE_IRQ_CPI); |
BUILD_INTERRUPT(qic_call_function_interrupt, QIC_CALL_FUNCTION_CPI); |
/shark/trunk/drivers/linuxc26/include/asm/mach-voyager/irq_vectors.h |
---|
0,0 → 1,78 |
/* -*- mode: c; c-basic-offset: 8 -*- */ |
/* Copyright (C) 2002 |
* |
* Author: James.Bottomley@HansenPartnership.com |
* |
* linux/arch/i386/voyager/irq_vectors.h |
* |
* This file provides definitions for the VIC and QIC CPIs |
*/ |
#ifndef _ASM_IRQ_VECTORS_H |
#define _ASM_IRQ_VECTORS_H |
/* |
* IDT vectors usable for external interrupt sources start |
* at 0x20: |
*/ |
#define FIRST_EXTERNAL_VECTOR 0x20 |
#define SYSCALL_VECTOR 0x80 |
/* |
* Vectors 0x20-0x2f are used for ISA interrupts. |
*/ |
/* These define the CPIs we use in linux */ |
#define VIC_CPI_LEVEL0 0 |
#define VIC_CPI_LEVEL1 1 |
/* now the fake CPIs */ |
#define VIC_TIMER_CPI 2 |
#define VIC_INVALIDATE_CPI 3 |
#define VIC_RESCHEDULE_CPI 4 |
#define VIC_ENABLE_IRQ_CPI 5 |
#define VIC_CALL_FUNCTION_CPI 6 |
/* Now the QIC CPIs: Since we don't need the two initial levels, |
* these are 2 less than the VIC CPIs */ |
#define QIC_CPI_OFFSET 1 |
#define QIC_TIMER_CPI (VIC_TIMER_CPI - QIC_CPI_OFFSET) |
#define QIC_INVALIDATE_CPI (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET) |
#define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET) |
#define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET) |
#define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET) |
#define VIC_START_FAKE_CPI VIC_TIMER_CPI |
#define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_CPI |
/* this is the SYS_INT CPI. */ |
#define VIC_SYS_INT 8 |
#define VIC_CMN_INT 15 |
/* This is the boot CPI for alternate processors. It gets overwritten |
* by the above once the system has activated all available processors */ |
#define VIC_CPU_BOOT_CPI VIC_CPI_LEVEL0 |
#define VIC_CPU_BOOT_ERRATA_CPI (VIC_CPI_LEVEL0 + 8) |
#define NR_IRQS 224 |
#define NR_IRQ_VECTORS NR_IRQS |
#define FPU_IRQ 13 |
#define FIRST_VM86_IRQ 3 |
#define LAST_VM86_IRQ 15 |
#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15) |
#ifndef __ASSEMBLY__ |
extern asmlinkage void vic_cpi_interrupt(void); |
extern asmlinkage void vic_sys_interrupt(void); |
extern asmlinkage void vic_cmn_interrupt(void); |
extern asmlinkage void qic_timer_interrupt(void); |
extern asmlinkage void qic_invalidate_interrupt(void); |
extern asmlinkage void qic_reschedule_interrupt(void); |
extern asmlinkage void qic_enable_irq_interrupt(void); |
extern asmlinkage void qic_call_function_interrupt(void); |
#endif /* !__ASSEMBLY__ */ |
#endif /* _ASM_IRQ_VECTORS_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-voyager/setup_arch_post.h |
---|
0,0 → 1,73 |
/* Hook for machine specific memory setup. |
* |
* This is included late in kernel/setup.c so that it can make use of all of |
* the static functions. */ |
static inline char * __init machine_specific_memory_setup(void) |
{ |
char *who; |
who = "NOT VOYAGER"; |
if(voyager_level == 5) { |
__u32 addr, length; |
int i; |
who = "Voyager-SUS"; |
e820.nr_map = 0; |
for(i=0; voyager_memory_detect(i, &addr, &length); i++) { |
add_memory_region(addr, length, E820_RAM); |
} |
return who; |
} else if(voyager_level == 4) { |
__u32 tom; |
__u16 catbase = inb(VOYAGER_SSPB_RELOCATION_PORT)<<8; |
/* select the DINO config space */ |
outb(VOYAGER_DINO, VOYAGER_CAT_CONFIG_PORT); |
/* Read DINO top of memory register */ |
tom = ((inb(catbase + 0x4) & 0xf0) << 16) |
+ ((inb(catbase + 0x5) & 0x7f) << 24); |
if(inb(catbase) != VOYAGER_DINO) { |
printk(KERN_ERR "Voyager: Failed to get DINO for L4, setting tom to EXT_MEM_K\n"); |
tom = (EXT_MEM_K)<<10; |
} |
who = "Voyager-TOM"; |
add_memory_region(0, 0x9f000, E820_RAM); |
/* map from 1M to top of memory */ |
add_memory_region(1*1024*1024, tom - 1*1024*1024, E820_RAM); |
/* FIXME: Should check the ASICs to see if I need to |
* take out the 8M window. Just do it at the moment |
* */ |
add_memory_region(8*1024*1024, 8*1024*1024, E820_RESERVED); |
return who; |
} |
who = "BIOS-e820"; |
/* |
* Try to copy the BIOS-supplied E820-map. |
* |
* Otherwise fake a memory map; one section from 0k->640k, |
* the next section from 1mb->appropriate_mem_k |
*/ |
sanitize_e820_map(E820_MAP, &E820_MAP_NR); |
if (copy_e820_map(E820_MAP, E820_MAP_NR) < 0) { |
unsigned long mem_size; |
/* compare results from other methods and take the greater */ |
if (ALT_MEM_K < EXT_MEM_K) { |
mem_size = EXT_MEM_K; |
who = "BIOS-88"; |
} else { |
mem_size = ALT_MEM_K; |
who = "BIOS-e801"; |
} |
e820.nr_map = 0; |
add_memory_region(0, LOWMEMSIZE(), E820_RAM); |
add_memory_region(HIGH_MEMORY, mem_size << 10, E820_RAM); |
} |
return who; |
} |
/shark/trunk/drivers/linuxc26/include/asm/mach-voyager/do_timer.h |
---|
0,0 → 1,22 |
/* defines for inline arch setup functions */ |
#include <asm/voyager.h> |
static inline void do_timer_interrupt_hook(struct pt_regs *regs) |
{ |
do_timer(regs); |
voyager_timer_interrupt(regs); |
} |
static inline int do_timer_overflow(int count) |
{ |
/* can't read the ISR, just assume 1 tick |
overflow */ |
if(count > LATCH || count < 0) { |
printk(KERN_ERR "VOYAGER PROBLEM: count is %d, latch is %d\n", count, LATCH); |
count = LATCH; |
} |
count -= LATCH; |
return count; |
} |
/shark/trunk/drivers/linuxc26/include/asm/mach-voyager/setup_arch_pre.h |
---|
0,0 → 1,10 |
#include <asm/voyager.h> |
#define VOYAGER_BIOS_INFO ((struct voyager_bios_info *)(PARAM+0x40)) |
/* Hook to call BIOS initialisation function */ |
/* for voyager, pass the voyager BIOS/SUS info area to the detection |
* routines */ |
#define ARCH_SETUP voyager_detect(VOYAGER_BIOS_INFO); |
/shark/trunk/drivers/linuxc26/include/asm/mach-es7000/mach_ipi.h |
---|
0,0 → 1,25 |
#ifndef __ASM_MACH_IPI_H |
#define __ASM_MACH_IPI_H |
static inline void send_IPI_mask_sequence(cpumask_t mask, int vector); |
static inline void send_IPI_mask(cpumask_t mask, int vector) |
{ |
send_IPI_mask_sequence(mask, vector); |
} |
static inline void send_IPI_allbutself(int vector) |
{ |
cpumask_t mask = cpumask_of_cpu(smp_processor_id()); |
cpus_complement(mask); |
cpus_and(mask, mask, cpu_online_map); |
if (!cpus_empty(mask)) |
send_IPI_mask(mask, vector); |
} |
static inline void send_IPI_all(int vector) |
{ |
send_IPI_mask(cpu_online_map, vector); |
} |
#endif /* __ASM_MACH_IPI_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-es7000/mach_mpparse.h |
---|
0,0 → 1,38 |
#ifndef __ASM_MACH_MPPARSE_H |
#define __ASM_MACH_MPPARSE_H |
static inline void mpc_oem_bus_info(struct mpc_config_bus *m, char *name, |
struct mpc_config_translation *translation) |
{ |
Dprintk("Bus #%d is %s\n", m->mpc_busid, name); |
} |
static inline void mpc_oem_pci_bus(struct mpc_config_bus *m, |
struct mpc_config_translation *translation) |
{ |
} |
extern void parse_unisys_oem (char *oemptr, int oem_entries); |
extern int find_unisys_acpi_oem_table(unsigned long *oem_addr, int *length); |
static inline void mps_oem_check(struct mp_config_table *mpc, char *oem, |
char *productid) |
{ |
if (mpc->mpc_oemptr) { |
struct mp_config_oemtable *oem_table = |
(struct mp_config_oemtable *)mpc->mpc_oemptr; |
parse_unisys_oem((char *)oem_table, oem_table->oem_length); |
} |
} |
/* Hook from generic ACPI tables.c */ |
static inline void acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
{ |
unsigned long oem_addr; |
int oem_entries; |
if (!find_unisys_acpi_oem_table(&oem_addr, &oem_entries)) |
parse_unisys_oem((char *)oem_addr, oem_entries); |
} |
#endif /* __ASM_MACH_MPPARSE_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-es7000/mach_mpspec.h |
---|
0,0 → 1,13 |
#ifndef __ASM_MACH_MPSPEC_H |
#define __ASM_MACH_MPSPEC_H |
/* |
* a maximum of 256 APICs with the current APIC ID architecture. |
*/ |
#define MAX_APICS 256 |
#define MAX_IRQ_SOURCES 256 |
#define MAX_MP_BUSSES 32 |
#endif /* __ASM_MACH_MPSPEC_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-es7000/mach_apicdef.h |
---|
0,0 → 1,13 |
#ifndef __ASM_MACH_APICDEF_H |
#define __ASM_MACH_APICDEF_H |
#define APIC_ID_MASK (0xFF<<24) |
static inline unsigned get_apic_id(unsigned long x) |
{ |
return (((x)>>24)&0xFF); |
} |
#define GET_APIC_ID(x) get_apic_id(x) |
#endif |
/shark/trunk/drivers/linuxc26/include/asm/mach-es7000/mach_apic.h |
---|
0,0 → 1,194 |
#ifndef __ASM_MACH_APIC_H |
#define __ASM_MACH_APIC_H |
extern u8 bios_cpu_apicid[]; |
#define xapic_phys_to_log_apicid(cpu) (bios_cpu_apicid[cpu]) |
#define esr_disable (1) |
static inline int apic_id_registered(void) |
{ |
return (1); |
} |
static inline cpumask_t target_cpus(void) |
{ |
#if defined CONFIG_ES7000_CLUSTERED_APIC |
return CPU_MASK_ALL; |
#else |
return cpumask_of_cpu(bios_cpu_apicid[smp_processor_id()]); |
#endif |
} |
#define TARGET_CPUS (target_cpus()) |
#if defined CONFIG_ES7000_CLUSTERED_APIC |
#define APIC_DFR_VALUE (APIC_DFR_CLUSTER) |
#define INT_DELIVERY_MODE (dest_LowestPrio) |
#define INT_DEST_MODE (1) /* logical delivery broadcast to all procs */ |
#define NO_BALANCE_IRQ (1) |
#undef WAKE_SECONDARY_VIA_INIT |
#define WAKE_SECONDARY_VIA_MIP |
#else |
#define APIC_DFR_VALUE (APIC_DFR_FLAT) |
#define INT_DELIVERY_MODE (dest_Fixed) |
#define INT_DEST_MODE (0) /* phys delivery to target procs */ |
#define NO_BALANCE_IRQ (0) |
#undef APIC_DEST_LOGICAL |
#define APIC_DEST_LOGICAL 0x0 |
#define WAKE_SECONDARY_VIA_INIT |
#endif |
#define APIC_BROADCAST_ID (0xff) |
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) |
{ |
return 0; |
} |
static inline unsigned long check_apicid_present(int bit) |
{ |
return physid_isset(bit, phys_cpu_present_map); |
} |
#define apicid_cluster(apicid) (apicid & 0xF0) |
static inline unsigned long calculate_ldr(int cpu) |
{ |
unsigned long id; |
id = xapic_phys_to_log_apicid(cpu); |
return (SET_APIC_LOGICAL_ID(id)); |
} |
/* |
* Set up the logical destination ID. |
* |
* Intel recommends to set DFR, LdR and TPR before enabling |
* an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel |
* document number 292116). So here it goes... |
*/ |
static inline void init_apic_ldr(void) |
{ |
unsigned long val; |
int cpu = smp_processor_id(); |
apic_write_around(APIC_DFR, APIC_DFR_VALUE); |
val = calculate_ldr(cpu); |
apic_write_around(APIC_LDR, val); |
} |
extern void es7000_sw_apic(void); |
static inline void enable_apic_mode(void) |
{ |
es7000_sw_apic(); |
return; |
} |
extern int apic_version [MAX_APICS]; |
static inline void clustered_apic_check(void) |
{ |
int apic = bios_cpu_apicid[smp_processor_id()]; |
printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n", |
(apic_version[apic] == 0x14) ? |
"Physical Cluster" : "Logical Cluster", nr_ioapics, cpus_coerce(TARGET_CPUS)); |
} |
static inline int multi_timer_check(int apic, int irq) |
{ |
return 0; |
} |
static inline int apicid_to_node(int logical_apicid) |
{ |
return 0; |
} |
static inline int cpu_present_to_apicid(int mps_cpu) |
{ |
if (!mps_cpu) |
return boot_cpu_physical_apicid; |
else if (mps_cpu < NR_CPUS) |
return (int) bios_cpu_apicid[mps_cpu]; |
else |
return BAD_APICID; |
} |
static inline physid_mask_t apicid_to_cpu_present(int phys_apicid) |
{ |
static int id = 0; |
physid_mask_t mask; |
mask = physid_mask_of_physid(id); |
++id; |
return mask; |
} |
extern u8 cpu_2_logical_apicid[]; |
/* Mapping from cpu number to logical apicid */ |
static inline int cpu_to_logical_apicid(int cpu) |
{ |
if (cpu >= NR_CPUS) |
return BAD_APICID; |
return (int)cpu_2_logical_apicid[cpu]; |
} |
static inline int mpc_apic_id(struct mpc_config_processor *m, struct mpc_config_translation *unused) |
{ |
printk("Processor #%d %ld:%ld APIC version %d\n", |
m->mpc_apicid, |
(m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8, |
(m->mpc_cpufeature & CPU_MODEL_MASK) >> 4, |
m->mpc_apicver); |
return (m->mpc_apicid); |
} |
static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map) |
{ |
/* For clustered we don't have a good way to do this yet - hack */ |
return physids_promote(0xff); |
} |
static inline void setup_portio_remap(void) |
{ |
} |
extern unsigned int boot_cpu_physical_apicid; |
static inline int check_phys_apicid_present(int cpu_physical_apicid) |
{ |
boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID)); |
return (1); |
} |
static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask) |
{ |
int num_bits_set; |
int cpus_found = 0; |
int cpu; |
int apicid; |
num_bits_set = cpus_weight_const(cpumask); |
/* Return id to all */ |
if (num_bits_set == NR_CPUS) |
return 0xFF; |
/* |
* The cpus in the mask must all be on the apic cluster. If are not |
* on the same apicid cluster return default value of TARGET_CPUS. |
*/ |
cpu = first_cpu_const(cpumask); |
apicid = cpu_to_logical_apicid(cpu); |
while (cpus_found < num_bits_set) { |
if (cpu_isset_const(cpu, cpumask)) { |
int new_apicid = cpu_to_logical_apicid(cpu); |
if (apicid_cluster(apicid) != |
apicid_cluster(new_apicid)){ |
printk ("%s: Not a valid mask!\n",__FUNCTION__); |
return 0xFF; |
} |
apicid = new_apicid; |
cpus_found++; |
} |
cpu++; |
} |
return apicid; |
} |
#endif /* __ASM_MACH_APIC_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-es7000/mach_wakecpu.h |
---|
0,0 → 1,58 |
#ifndef __ASM_MACH_WAKECPU_H |
#define __ASM_MACH_WAKECPU_H |
/* |
* This file copes with machines that wakeup secondary CPUs by the |
* INIT, INIT, STARTUP sequence. |
*/ |
#ifdef CONFIG_ES7000_CLUSTERED_APIC |
#define WAKE_SECONDARY_VIA_MIP |
#else |
#define WAKE_SECONDARY_VIA_INIT |
#endif |
#ifdef WAKE_SECONDARY_VIA_MIP |
extern int es7000_start_cpu(int cpu, unsigned long eip); |
static inline int |
wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip) |
{ |
int boot_error = 0; |
boot_error = es7000_start_cpu(phys_apicid, start_eip); |
return boot_error; |
} |
#endif |
#define TRAMPOLINE_LOW phys_to_virt(0x467) |
#define TRAMPOLINE_HIGH phys_to_virt(0x469) |
#define boot_cpu_apicid boot_cpu_physical_apicid |
static inline void wait_for_init_deassert(atomic_t *deassert) |
{ |
#ifdef WAKE_SECONDARY_VIA_INIT |
while (!atomic_read(deassert)); |
#endif |
return; |
} |
/* Nothing to do for most platforms, since cleared by the INIT cycle */ |
static inline void smp_callin_clear_local_apic(void) |
{ |
} |
static inline void store_NMI_vector(unsigned short *high, unsigned short *low) |
{ |
} |
static inline void restore_NMI_vector(unsigned short *high, unsigned short *low) |
{ |
} |
#if APIC_DEBUG |
#define inquire_remote_apic(apicid) __inquire_remote_apic(apicid) |
#else |
#define inquire_remote_apic(apicid) {} |
#endif |
#endif /* __ASM_MACH_WAKECPU_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-default/entry_arch.h |
---|
0,0 → 1,34 |
/* |
* This file is designed to contain the BUILD_INTERRUPT specifications for |
* all of the extra named interrupt vectors used by the architecture. |
* Usually this is the Inter Process Interrupts (IPIs) |
*/ |
/* |
* The following vectors are part of the Linux architecture, there |
* is no hardware IRQ pin equivalent for them, they are triggered |
* through the ICC by us (IPIs) |
*/ |
#ifdef CONFIG_X86_SMP |
BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR) |
BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR) |
BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR) |
#endif |
/* |
* every pentium local APIC has two 'local interrupts', with a |
* soft-definable vector attached to both interrupts, one of |
* which is a timer interrupt, the other one is error counter |
* overflow. Linux uses the local APIC timer interrupt to get |
* a much simpler SMP time architecture: |
*/ |
#ifdef CONFIG_X86_LOCAL_APIC |
BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR) |
BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR) |
BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR) |
#ifdef CONFIG_X86_MCE_P4THERMAL |
BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR) |
#endif |
#endif |
/shark/trunk/drivers/linuxc26/include/asm/mach-default/io_ports.h |
---|
0,0 → 1,30 |
/* |
* arch/i386/mach-generic/io_ports.h |
* |
* Machine specific IO port address definition for generic. |
* Written by Osamu Tomita <tomita@cinet.co.jp> |
*/ |
#ifndef _MACH_IO_PORTS_H |
#define _MACH_IO_PORTS_H |
/* i8253A PIT registers */ |
#define PIT_MODE 0x43 |
#define PIT_CH0 0x40 |
#define PIT_CH2 0x42 |
/* i8259A PIC registers */ |
#define PIC_MASTER_CMD 0x20 |
#define PIC_MASTER_IMR 0x21 |
#define PIC_MASTER_ISR PIC_MASTER_CMD |
#define PIC_MASTER_POLL PIC_MASTER_ISR |
#define PIC_MASTER_OCW3 PIC_MASTER_ISR |
#define PIC_SLAVE_CMD 0xa0 |
#define PIC_SLAVE_IMR 0xa1 |
/* i8259A PIC related value */ |
#define PIC_CASCADE_IR 2 |
#define MASTER_ICW4_DEFAULT 0x01 |
#define SLAVE_ICW4_DEFAULT 0x01 |
#define PIC_ICW4_AEOI 2 |
#endif /* !_MACH_IO_PORTS_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-default/mach_mpparse.h |
---|
0,0 → 1,28 |
#ifndef __ASM_MACH_MPPARSE_H |
#define __ASM_MACH_MPPARSE_H |
static inline void mpc_oem_bus_info(struct mpc_config_bus *m, char *name, |
struct mpc_config_translation *translation) |
{ |
// Dprintk("Bus #%d is %s\n", m->mpc_busid, name); |
} |
static inline void mpc_oem_pci_bus(struct mpc_config_bus *m, |
struct mpc_config_translation *translation) |
{ |
} |
static inline int mps_oem_check(struct mp_config_table *mpc, char *oem, |
char *productid) |
{ |
return 0; |
} |
/* Hook from generic ACPI tables.c */ |
static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
{ |
return 0; |
} |
#endif /* __ASM_MACH_MPPARSE_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-default/irq_vectors.h |
---|
0,0 → 1,98 |
/* |
* This file should contain #defines for all of the interrupt vector |
* numbers used by this architecture. |
* |
* In addition, there are some standard defines: |
* |
* FIRST_EXTERNAL_VECTOR: |
* The first free place for external interrupts |
* |
* SYSCALL_VECTOR: |
* The IRQ vector a syscall makes the user to kernel transition |
* under. |
* |
* TIMER_IRQ: |
* The IRQ number the timer interrupt comes in at. |
* |
* NR_IRQS: |
* The total number of interrupt vectors (including all the |
* architecture specific interrupts) needed. |
* |
*/ |
#ifndef _ASM_IRQ_VECTORS_H |
#define _ASM_IRQ_VECTORS_H |
/* |
* IDT vectors usable for external interrupt sources start |
* at 0x20: |
*/ |
#define FIRST_EXTERNAL_VECTOR 0x20 |
#define SYSCALL_VECTOR 0x80 |
/* |
* Vectors 0x20-0x2f are used for ISA interrupts. |
*/ |
/* |
* Special IRQ vectors used by the SMP architecture, 0xf0-0xff |
* |
* some of the following vectors are 'rare', they are merged |
* into a single vector (CALL_FUNCTION_VECTOR) to save vector space. |
* TLB, reschedule and local APIC vectors are performance-critical. |
* |
* Vectors 0xf0-0xfa are free (reserved for future Linux use). |
*/ |
#define SPURIOUS_APIC_VECTOR 0xff |
#define ERROR_APIC_VECTOR 0xfe |
#define INVALIDATE_TLB_VECTOR 0xfd |
#define RESCHEDULE_VECTOR 0xfc |
#define CALL_FUNCTION_VECTOR 0xfb |
#define THERMAL_APIC_VECTOR 0xf0 |
/* |
* Local APIC timer IRQ vector is on a different priority level, |
* to work around the 'lost local interrupt if more than 2 IRQ |
* sources per level' errata. |
*/ |
#define LOCAL_TIMER_VECTOR 0xef |
/* |
* First APIC vector available to drivers: (vectors 0x30-0xee) |
* we start at 0x31 to spread out vectors evenly between priority |
* levels. (0x80 is the syscall vector) |
*/ |
#define FIRST_DEVICE_VECTOR 0x31 |
#define FIRST_SYSTEM_VECTOR 0xef |
#define TIMER_IRQ 0 |
/* |
* 16 8259A IRQ's, 208 potential APIC interrupt sources. |
* Right now the APIC is mostly only used for SMP. |
* 256 vectors is an architectural limit. (we can have |
* more than 256 devices theoretically, but they will |
* have to use shared interrupts) |
* Since vectors 0x00-0x1f are used/reserved for the CPU, |
* the usable vector space is 0x20-0xff (224 vectors) |
*/ |
#ifdef CONFIG_X86_IO_APIC |
#define NR_IRQS 224 |
# if (224 >= 32 * NR_CPUS) |
# define NR_IRQ_VECTORS NR_IRQS |
# else |
# define NR_IRQ_VECTORS (32 * NR_CPUS) |
# endif |
#else |
#define NR_IRQS 16 |
#define NR_IRQ_VECTORS NR_IRQS |
#endif |
#define FPU_IRQ 13 |
#define FIRST_VM86_IRQ 3 |
#define LAST_VM86_IRQ 15 |
#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15) |
#endif /* _ASM_IRQ_VECTORS_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-default/setup_arch_post.h |
---|
0,0 → 1,40 |
/** |
* machine_specific_memory_setup - Hook for machine specific memory setup. |
* |
* Description: |
* This is included late in kernel/setup.c so that it can make |
* use of all of the static functions. |
**/ |
static inline char * __init machine_specific_memory_setup(void) |
{ |
char *who; |
who = "BIOS-e820"; |
/* |
* Try to copy the BIOS-supplied E820-map. |
* |
* Otherwise fake a memory map; one section from 0k->640k, |
* the next section from 1mb->appropriate_mem_k |
*/ |
sanitize_e820_map(E820_MAP, &E820_MAP_NR); |
if (copy_e820_map(E820_MAP, E820_MAP_NR) < 0) { |
unsigned long mem_size; |
/* compare results from other methods and take the greater */ |
if (ALT_MEM_K < EXT_MEM_K) { |
mem_size = EXT_MEM_K; |
who = "BIOS-88"; |
} else { |
mem_size = ALT_MEM_K; |
who = "BIOS-e801"; |
} |
e820.nr_map = 0; |
add_memory_region(0, LOWMEMSIZE(), E820_RAM); |
add_memory_region(HIGH_MEMORY, mem_size << 10, E820_RAM); |
} |
return who; |
} |
/shark/trunk/drivers/linuxc26/include/asm/mach-default/mach_resources.h |
---|
0,0 → 1,106 |
/* |
* include/asm-i386/mach-default/mach_resources.h |
* |
* Machine specific resource allocation for generic. |
* Split out from setup.c by Osamu Tomita <tomita@cinet.co.jp> |
*/ |
#ifndef _MACH_RESOURCES_H |
#define _MACH_RESOURCES_H |
struct resource standard_io_resources[] = { |
{ "dma1", 0x00, 0x1f, IORESOURCE_BUSY }, |
{ "pic1", 0x20, 0x21, IORESOURCE_BUSY }, |
{ "timer", 0x40, 0x5f, IORESOURCE_BUSY }, |
{ "keyboard", 0x60, 0x6f, IORESOURCE_BUSY }, |
{ "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY }, |
{ "pic2", 0xa0, 0xa1, IORESOURCE_BUSY }, |
{ "dma2", 0xc0, 0xdf, IORESOURCE_BUSY }, |
{ "fpu", 0xf0, 0xff, IORESOURCE_BUSY } |
}; |
#define STANDARD_IO_RESOURCES (sizeof(standard_io_resources)/sizeof(struct resource)) |
static struct resource vram_resource = { "Video RAM area", 0xa0000, 0xbffff, IORESOURCE_BUSY }; |
/* System ROM resources */ |
#define MAXROMS 6 |
static struct resource rom_resources[MAXROMS] = { |
{ "System ROM", 0xF0000, 0xFFFFF, IORESOURCE_BUSY }, |
{ "Video ROM", 0xc0000, 0xc7fff, IORESOURCE_BUSY } |
}; |
#define romsignature(x) (*(unsigned short *)(x) == 0xaa55) |
static inline void probe_video_rom(int roms) |
{ |
unsigned long base; |
unsigned char *romstart; |
/* Video ROM is standard at C000:0000 - C7FF:0000, check signature */ |
for (base = 0xC0000; base < 0xE0000; base += 2048) { |
romstart = isa_bus_to_virt(base); |
if (!romsignature(romstart)) |
continue; |
request_resource(&iomem_resource, rom_resources + roms); |
roms++; |
break; |
} |
} |
static inline void probe_extension_roms(int roms) |
{ |
unsigned long base; |
unsigned char *romstart; |
/* Extension roms at C800:0000 - DFFF:0000 */ |
for (base = 0xC8000; base < 0xE0000; base += 2048) { |
unsigned long length; |
romstart = isa_bus_to_virt(base); |
if (!romsignature(romstart)) |
continue; |
length = romstart[2] * 512; |
if (length) { |
unsigned int i; |
unsigned char chksum; |
chksum = 0; |
for (i = 0; i < length; i++) |
chksum += romstart[i]; |
/* Good checksum? */ |
if (!chksum) { |
rom_resources[roms].start = base; |
rom_resources[roms].end = base + length - 1; |
rom_resources[roms].name = "Extension ROM"; |
rom_resources[roms].flags = IORESOURCE_BUSY; |
request_resource(&iomem_resource, rom_resources + roms); |
roms++; |
if (roms >= MAXROMS) |
return; |
} |
} |
} |
/* Final check for motherboard extension rom at E000:0000 */ |
base = 0xE0000; |
romstart = isa_bus_to_virt(base); |
if (romsignature(romstart)) { |
rom_resources[roms].start = base; |
rom_resources[roms].end = base + 65535; |
rom_resources[roms].name = "Extension ROM"; |
rom_resources[roms].flags = IORESOURCE_BUSY; |
request_resource(&iomem_resource, rom_resources + roms); |
} |
} |
static inline void request_graphics_resource(void) |
{ |
request_resource(&iomem_resource, &vram_resource); |
} |
#endif /* !_MACH_RESOURCES_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-default/do_timer.h |
---|
0,0 → 1,82 |
/* defines for inline arch setup functions */ |
#include <asm/apic.h> |
/** |
* do_timer_interrupt_hook - hook into timer tick |
* @regs: standard registers from interrupt |
* |
* Description: |
* This hook is called immediately after the timer interrupt is ack'd. |
* It's primary purpose is to allow architectures that don't possess |
* individual per CPU clocks (like the CPU APICs supply) to broadcast the |
* timer interrupt as a means of triggering reschedules etc. |
**/ |
static inline void do_timer_interrupt_hook(struct pt_regs *regs) |
{ |
do_timer(regs); |
/* |
* In the SMP case we use the local APIC timer interrupt to do the |
* profiling, except when we simulate SMP mode on a uniprocessor |
* system, in that case we have to call the local interrupt handler. |
*/ |
#ifndef CONFIG_X86_LOCAL_APIC |
x86_do_profile(regs); |
#else |
if (!using_apic_timer) |
smp_local_timer_interrupt(regs); |
#endif |
} |
/* you can safely undefine this if you don't have the Neptune chipset */ |
#define BUGGY_NEPTUN_TIMER |
/** |
* do_timer_overflow - process a detected timer overflow condition |
* @count: hardware timer interrupt count on overflow |
* |
* Description: |
* This call is invoked when the jiffies count has not incremented but |
* the hardware timer interrupt has. It means that a timer tick interrupt |
* came along while the previous one was pending, thus a tick was missed |
**/ |
static inline int do_timer_overflow(int count) |
{ |
int i; |
spin_lock(&i8259A_lock); |
/* |
* This is tricky when I/O APICs are used; |
* see do_timer_interrupt(). |
*/ |
i = inb(0x20); |
spin_unlock(&i8259A_lock); |
/* assumption about timer being IRQ0 */ |
if (i & 0x01) { |
/* |
* We cannot detect lost timer interrupts ... |
* well, that's why we call them lost, don't we? :) |
* [hmm, on the Pentium and Alpha we can ... sort of] |
*/ |
count -= LATCH; |
} else { |
#ifdef BUGGY_NEPTUN_TIMER |
/* |
* for the Neptun bug we know that the 'latch' |
* command doesn't latch the high and low value |
* of the counter atomically. Thus we have to |
* substract 256 from the counter |
* ... funny, isnt it? :) |
*/ |
count -= 256; |
#else |
printk("do_slow_gettimeoffset(): hardware timer problem?\n"); |
#endif |
} |
return count; |
} |
/shark/trunk/drivers/linuxc26/include/asm/mach-default/setup_arch_pre.h |
---|
0,0 → 1,5 |
/* Hook to call BIOS initialisation function */ |
/* no action for generic */ |
#define ARCH_SETUP |
/shark/trunk/drivers/linuxc26/include/asm/mach-default/mach_apic.h |
---|
0,0 → 1,130 |
#ifndef __ASM_MACH_APIC_H |
#define __ASM_MACH_APIC_H |
#include <mach_apicdef.h> |
#define APIC_DFR_VALUE (APIC_DFR_FLAT) |
static inline cpumask_t target_cpus(void) |
{ |
#ifdef CONFIG_SMP |
return cpu_online_map; |
#else |
return cpumask_of_cpu(0); |
#endif |
} |
#define TARGET_CPUS (target_cpus()) |
#define NO_BALANCE_IRQ (0) |
#define esr_disable (0) |
#define NO_IOAPIC_CHECK (0) |
#define INT_DELIVERY_MODE dest_LowestPrio |
#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */ |
/* |
* this isn't really broadcast, just a (potentially inaccurate) upper |
* bound for valid physical APIC id's |
*/ |
#define APIC_BROADCAST_ID 0x0F |
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) |
{ |
return physid_isset(apicid, bitmap); |
} |
static inline unsigned long check_apicid_present(int bit) |
{ |
return physid_isset(bit, phys_cpu_present_map); |
} |
/* |
* Set up the logical destination ID. |
* |
* Intel recommends to set DFR, LDR and TPR before enabling |
* an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel |
* document number 292116). So here it goes... |
*/ |
static inline void init_apic_ldr(void) |
{ |
unsigned long val; |
apic_write_around(APIC_DFR, APIC_DFR_VALUE); |
val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; |
val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id()); |
apic_write_around(APIC_LDR, val); |
} |
static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map) |
{ |
return phys_map; |
} |
static inline void clustered_apic_check(void) |
{ |
printk("Enabling APIC mode: %s. Using %d I/O APICs\n", |
"Flat", nr_ioapics); |
} |
static inline int multi_timer_check(int apic, int irq) |
{ |
return 0; |
} |
static inline int apicid_to_node(int logical_apicid) |
{ |
return 0; |
} |
/* Mapping from cpu number to logical apicid */ |
static inline int cpu_to_logical_apicid(int cpu) |
{ |
return 1 << cpu; |
} |
static inline int cpu_present_to_apicid(int mps_cpu) |
{ |
return mps_cpu; |
} |
static inline physid_mask_t apicid_to_cpu_present(int phys_apicid) |
{ |
return physid_mask_of_physid(phys_apicid); |
} |
static inline int mpc_apic_id(struct mpc_config_processor *m, |
struct mpc_config_translation *translation_record) |
{ |
printk("Processor #%d %ld:%ld APIC version %d\n", |
m->mpc_apicid, |
(m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8, |
(m->mpc_cpufeature & CPU_MODEL_MASK) >> 4, |
m->mpc_apicver); |
return (m->mpc_apicid); |
} |
static inline void setup_portio_remap(void) |
{ |
} |
static inline int check_phys_apicid_present(int boot_cpu_physical_apicid) |
{ |
return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map); |
} |
static inline int apic_id_registered(void) |
{ |
return physid_isset(GET_APIC_ID(apic_read(APIC_ID)), phys_cpu_present_map); |
} |
static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask) |
{ |
return cpus_coerce_const(cpumask); |
} |
static inline void enable_apic_mode(void) |
{ |
} |
#endif /* __ASM_MACH_APIC_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-default/bios_ebda.h |
---|
0,0 → 1,15 |
#ifndef _MACH_BIOS_EBDA_H |
#define _MACH_BIOS_EBDA_H |
/* |
* there is a real-mode segmented pointer pointing to the |
* 4K EBDA area at 0x40E. |
*/ |
static inline unsigned int get_bios_ebda(void) |
{ |
unsigned int address = *(unsigned short *)phys_to_virt(0x40E); |
address <<= 4; |
return address; /* 0 means none */ |
} |
#endif /* _MACH_BIOS_EBDA_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-default/mach_timer.h |
---|
0,0 → 1,48 |
/* |
* include/asm-i386/mach-default/mach_timer.h |
* |
* Machine specific calibrate_tsc() for generic. |
* Split out from timer_tsc.c by Osamu Tomita <tomita@cinet.co.jp> |
*/ |
/* ------ Calibrate the TSC ------- |
* Return 2^32 * (1 / (TSC clocks per usec)) for do_fast_gettimeoffset(). |
* Too much 64-bit arithmetic here to do this cleanly in C, and for |
* accuracy's sake we want to keep the overhead on the CTC speaker (channel 2) |
* output busy loop as low as possible. We avoid reading the CTC registers |
* directly because of the awkward 8-bit access mechanism of the 82C54 |
* device. |
*/ |
#ifndef _MACH_TIMER_H |
#define _MACH_TIMER_H |
#define CALIBRATE_LATCH (5 * LATCH) |
static inline void mach_prepare_counter(void) |
{ |
/* Set the Gate high, disable speaker */ |
outb((inb(0x61) & ~0x02) | 0x01, 0x61); |
/* |
* Now let's take care of CTC channel 2 |
* |
* Set the Gate high, program CTC channel 2 for mode 0, |
* (interrupt on terminal count mode), binary count, |
* load 5 * LATCH count, (LSB and MSB) to begin countdown. |
* |
* Some devices need a delay here. |
*/ |
outb(0xb0, 0x43); /* binary, mode 0, LSB/MSB, Ch 2 */ |
outb_p(CALIBRATE_LATCH & 0xff, 0x42); /* LSB of count */ |
outb_p(CALIBRATE_LATCH >> 8, 0x42); /* MSB of count */ |
} |
static inline void mach_countup(unsigned long *count_p) |
{ |
unsigned long count = 0; |
do { |
count++; |
} while ((inb_p(0x61) & 0x20) == 0); |
*count_p = count; |
} |
#endif /* !_MACH_TIMER_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-default/mach_ipi.h |
---|
0,0 → 1,30 |
#ifndef __ASM_MACH_IPI_H |
#define __ASM_MACH_IPI_H |
inline void send_IPI_mask_bitmask(cpumask_t mask, int vector); |
inline void __send_IPI_shortcut(unsigned int shortcut, int vector); |
static inline void send_IPI_mask(cpumask_t mask, int vector) |
{ |
send_IPI_mask_bitmask(mask, vector); |
} |
static inline void send_IPI_allbutself(int vector) |
{ |
/* |
* if there are no other CPUs in the system then we get an APIC send |
* error if we try to broadcast, thus avoid sending IPIs in this case. |
*/ |
if (!(num_online_cpus() > 1)) |
return; |
__send_IPI_shortcut(APIC_DEST_ALLBUT, vector); |
return; |
} |
static inline void send_IPI_all(int vector) |
{ |
__send_IPI_shortcut(APIC_DEST_ALLINC, vector); |
} |
#endif /* __ASM_MACH_IPI_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-default/apm.h |
---|
0,0 → 1,75 |
/* |
* include/asm-i386/mach-default/apm.h |
* |
* Machine specific APM BIOS functions for generic. |
* Split out from apm.c by Osamu Tomita <tomita@cinet.co.jp> |
*/ |
#ifndef _ASM_APM_H |
#define _ASM_APM_H |
#ifdef APM_ZERO_SEGS |
# define APM_DO_ZERO_SEGS \ |
"pushl %%ds\n\t" \ |
"pushl %%es\n\t" \ |
"xorl %%edx, %%edx\n\t" \ |
"mov %%dx, %%ds\n\t" \ |
"mov %%dx, %%es\n\t" \ |
"mov %%dx, %%fs\n\t" \ |
"mov %%dx, %%gs\n\t" |
# define APM_DO_POP_SEGS \ |
"popl %%es\n\t" \ |
"popl %%ds\n\t" |
#else |
# define APM_DO_ZERO_SEGS |
# define APM_DO_POP_SEGS |
#endif |
static inline void apm_bios_call_asm(u32 func, u32 ebx_in, u32 ecx_in, |
u32 *eax, u32 *ebx, u32 *ecx, |
u32 *edx, u32 *esi) |
{ |
/* |
* N.B. We do NOT need a cld after the BIOS call |
* because we always save and restore the flags. |
*/ |
__asm__ __volatile__(APM_DO_ZERO_SEGS |
"pushl %%edi\n\t" |
"pushl %%ebp\n\t" |
"lcall *%%cs:apm_bios_entry\n\t" |
"setc %%al\n\t" |
"popl %%ebp\n\t" |
"popl %%edi\n\t" |
APM_DO_POP_SEGS |
: "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx), |
"=S" (*esi) |
: "a" (func), "b" (ebx_in), "c" (ecx_in) |
: "memory", "cc"); |
} |
static inline u8 apm_bios_call_simple_asm(u32 func, u32 ebx_in, |
u32 ecx_in, u32 *eax) |
{ |
int cx, dx, si; |
u8 error; |
/* |
* N.B. We do NOT need a cld after the BIOS call |
* because we always save and restore the flags. |
*/ |
__asm__ __volatile__(APM_DO_ZERO_SEGS |
"pushl %%edi\n\t" |
"pushl %%ebp\n\t" |
"lcall *%%cs:apm_bios_entry\n\t" |
"setc %%bl\n\t" |
"popl %%ebp\n\t" |
"popl %%edi\n\t" |
APM_DO_POP_SEGS |
: "=a" (*eax), "=b" (error), "=c" (cx), "=d" (dx), |
"=S" (si) |
: "a" (func), "b" (ebx_in), "c" (ecx_in) |
: "memory", "cc"); |
return error; |
} |
#endif /* _ASM_APM_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-default/mach_mpspec.h |
---|
0,0 → 1,13 |
#ifndef __ASM_MACH_MPSPEC_H |
#define __ASM_MACH_MPSPEC_H |
/* |
* a maximum of 16 APICs with the current APIC ID architecture. |
*/ |
#define MAX_APICS 16 |
#define MAX_IRQ_SOURCES 256 |
#define MAX_MP_BUSSES 32 |
#endif /* __ASM_MACH_MPSPEC_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-default/pci-functions.h |
---|
0,0 → 1,19 |
/* |
* PCI BIOS function numbering for conventional PCI BIOS |
* systems |
*/ |
#define PCIBIOS_PCI_FUNCTION_ID 0xb1XX |
#define PCIBIOS_PCI_BIOS_PRESENT 0xb101 |
#define PCIBIOS_FIND_PCI_DEVICE 0xb102 |
#define PCIBIOS_FIND_PCI_CLASS_CODE 0xb103 |
#define PCIBIOS_GENERATE_SPECIAL_CYCLE 0xb106 |
#define PCIBIOS_READ_CONFIG_BYTE 0xb108 |
#define PCIBIOS_READ_CONFIG_WORD 0xb109 |
#define PCIBIOS_READ_CONFIG_DWORD 0xb10a |
#define PCIBIOS_WRITE_CONFIG_BYTE 0xb10b |
#define PCIBIOS_WRITE_CONFIG_WORD 0xb10c |
#define PCIBIOS_WRITE_CONFIG_DWORD 0xb10d |
#define PCIBIOS_GET_ROUTING_OPTIONS 0xb10e |
#define PCIBIOS_SET_PCI_HW_INT 0xb10f |
/shark/trunk/drivers/linuxc26/include/asm/mach-default/mach_traps.h |
---|
0,0 → 1,29 |
/* |
* include/asm-i386/mach-default/mach_traps.h |
* |
* Machine specific NMI handling for generic. |
* Split out from traps.c by Osamu Tomita <tomita@cinet.co.jp> |
*/ |
#ifndef _MACH_TRAPS_H |
#define _MACH_TRAPS_H |
static inline void clear_mem_error(unsigned char reason) |
{ |
reason = (reason & 0xf) | 4; |
outb(reason, 0x61); |
} |
static inline unsigned char get_nmi_reason(void) |
{ |
return inb(0x61); |
} |
static inline void reassert_nmi(void) |
{ |
outb(0x8f, 0x70); |
inb(0x71); /* dummy */ |
outb(0x0f, 0x70); |
inb(0x71); /* dummy */ |
} |
#endif /* !_MACH_TRAPS_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-default/mach_reboot.h |
---|
0,0 → 1,30 |
/* |
* arch/i386/mach-generic/mach_reboot.h |
* |
* Machine specific reboot functions for generic. |
* Split out from reboot.c by Osamu Tomita <tomita@cinet.co.jp> |
*/ |
#ifndef _MACH_REBOOT_H |
#define _MACH_REBOOT_H |
static inline void kb_wait(void) |
{ |
int i; |
for (i = 0; i < 0x10000; i++) |
if ((inb_p(0x64) & 0x02) == 0) |
break; |
} |
static inline void mach_reboot(void) |
{ |
int i; |
for (i = 0; i < 100; i++) { |
kb_wait(); |
udelay(50); |
outb(0xfe, 0x64); /* pulse reset low */ |
udelay(50); |
} |
} |
#endif /* !_MACH_REBOOT_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-default/mach_apicdef.h |
---|
0,0 → 1,13 |
#ifndef __ASM_MACH_APICDEF_H |
#define __ASM_MACH_APICDEF_H |
#define APIC_ID_MASK (0xF<<24) |
static inline unsigned get_apic_id(unsigned long x) |
{ |
return (((x)>>24)&0xF); |
} |
#define GET_APIC_ID(x) get_apic_id(x) |
#endif |
/shark/trunk/drivers/linuxc26/include/asm/mach-default/mach_time.h |
---|
0,0 → 1,122 |
/* |
* include/asm-i386/mach-default/mach_time.h |
* |
* Machine specific set RTC function for generic. |
* Split out from time.c by Osamu Tomita <tomita@cinet.co.jp> |
*/ |
#ifndef _MACH_TIME_H |
#define _MACH_TIME_H |
#include <linux/mc146818rtc.h> |
/* for check timing call set_rtc_mmss() 500ms */ |
/* used in arch/i386/time.c::do_timer_interrupt() */ |
#define USEC_AFTER 500000 |
#define USEC_BEFORE 500000 |
/* |
* In order to set the CMOS clock precisely, set_rtc_mmss has to be |
* called 500 ms after the second nowtime has started, because when |
* nowtime is written into the registers of the CMOS clock, it will |
* jump to the next second precisely 500 ms later. Check the Motorola |
* MC146818A or Dallas DS12887 data sheet for details. |
* |
* BUG: This routine does not handle hour overflow properly; it just |
* sets the minutes. Usually you'll only notice that after reboot! |
*/ |
static inline int mach_set_rtc_mmss(unsigned long nowtime) |
{ |
int retval = 0; |
int real_seconds, real_minutes, cmos_minutes; |
unsigned char save_control, save_freq_select; |
save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */ |
CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL); |
save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */ |
CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT); |
cmos_minutes = CMOS_READ(RTC_MINUTES); |
if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) |
BCD_TO_BIN(cmos_minutes); |
/* |
* since we're only adjusting minutes and seconds, |
* don't interfere with hour overflow. This avoids |
* messing with unknown time zones but requires your |
* RTC not to be off by more than 15 minutes |
*/ |
real_seconds = nowtime % 60; |
real_minutes = nowtime / 60; |
if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1) |
real_minutes += 30; /* correct for half hour time zone */ |
real_minutes %= 60; |
if (abs(real_minutes - cmos_minutes) < 30) { |
if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { |
BIN_TO_BCD(real_seconds); |
BIN_TO_BCD(real_minutes); |
} |
CMOS_WRITE(real_seconds,RTC_SECONDS); |
CMOS_WRITE(real_minutes,RTC_MINUTES); |
} else { |
printk(KERN_WARNING |
"set_rtc_mmss: can't update from %d to %d\n", |
cmos_minutes, real_minutes); |
retval = -1; |
} |
/* The following flags have to be released exactly in this order, |
* otherwise the DS12887 (popular MC146818A clone with integrated |
* battery and quartz) will not reset the oscillator and will not |
* update precisely 500 ms later. You won't find this mentioned in |
* the Dallas Semiconductor data sheets, but who believes data |
* sheets anyway ... -- Markus Kuhn |
*/ |
CMOS_WRITE(save_control, RTC_CONTROL); |
CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); |
return retval; |
} |
static inline unsigned long mach_get_cmos_time(void) |
{ |
unsigned int year, mon, day, hour, min, sec; |
int i; |
/* The Linux interpretation of the CMOS clock register contents: |
* When the Update-In-Progress (UIP) flag goes from 1 to 0, the |
* RTC registers show the second which has precisely just started. |
* Let's hope other operating systems interpret the RTC the same way. |
*/ |
/* read RTC exactly on falling edge of update flag */ |
for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */ |
if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP) |
break; |
for (i = 0 ; i < 1000000 ; i++) /* must try at least 2.228 ms */ |
if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)) |
break; |
do { /* Isn't this overkill ? UIP above should guarantee consistency */ |
sec = CMOS_READ(RTC_SECONDS); |
min = CMOS_READ(RTC_MINUTES); |
hour = CMOS_READ(RTC_HOURS); |
day = CMOS_READ(RTC_DAY_OF_MONTH); |
mon = CMOS_READ(RTC_MONTH); |
year = CMOS_READ(RTC_YEAR); |
} while (sec != CMOS_READ(RTC_SECONDS)); |
if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) |
{ |
BCD_TO_BIN(sec); |
BCD_TO_BIN(min); |
BCD_TO_BIN(hour); |
BCD_TO_BIN(day); |
BCD_TO_BIN(mon); |
BCD_TO_BIN(year); |
} |
if ((year += 1900) < 1970) |
year += 100; |
return mktime(year, mon, day, hour, min, sec); |
} |
#endif /* !_MACH_TIME_H */ |
/shark/trunk/drivers/linuxc26/include/asm/mach-default/smpboot_hooks.h |
---|
0,0 → 1,44 |
/* two abstractions specific to kernel/smpboot.c, mainly to cater to visws |
* which needs to alter them. */ |
static inline void smpboot_clear_io_apic_irqs(void) |
{ |
io_apic_irqs = 0; |
} |
static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip) |
{ |
CMOS_WRITE(0xa, 0xf); |
local_flush_tlb(); |
Dprintk("1.\n"); |
*((volatile unsigned short *) TRAMPOLINE_HIGH) = start_eip >> 4; |
Dprintk("2.\n"); |
*((volatile unsigned short *) TRAMPOLINE_LOW) = start_eip & 0xf; |
Dprintk("3.\n"); |
} |
static inline void smpboot_restore_warm_reset_vector(void) |
{ |
/* |
* Install writable page 0 entry to set BIOS data area. |
*/ |
local_flush_tlb(); |
/* |
* Paranoid: Set warm reset code and vector here back |
* to default values. |
*/ |
CMOS_WRITE(0, 0xf); |
*((volatile long *) phys_to_virt(0x467)) = 0; |
} |
static inline void smpboot_setup_io_apic(void) |
{ |
/* |
* Here we can be sure that there is an IO-APIC in the system. Let's |
* go and set it up: |
*/ |
if (!skip_ioapic_setup && nr_ioapics) |
setup_IO_APIC(); |
} |
/shark/trunk/drivers/linuxc26/include/asm/mach-default/mach_wakecpu.h |
---|
0,0 → 1,41 |
#ifndef __ASM_MACH_WAKECPU_H |
#define __ASM_MACH_WAKECPU_H |
/* |
* This file copes with machines that wakeup secondary CPUs by the |
* INIT, INIT, STARTUP sequence. |
*/ |
#define WAKE_SECONDARY_VIA_INIT |
#define TRAMPOLINE_LOW phys_to_virt(0x467) |
#define TRAMPOLINE_HIGH phys_to_virt(0x469) |
#define boot_cpu_apicid boot_cpu_physical_apicid |
static inline void wait_for_init_deassert(atomic_t *deassert) |
{ |
while (!atomic_read(deassert)); |
return; |
} |
/* Nothing to do for most platforms, since cleared by the INIT cycle */ |
static inline void smp_callin_clear_local_apic(void) |
{ |
} |
static inline void store_NMI_vector(unsigned short *high, unsigned short *low) |
{ |
} |
static inline void restore_NMI_vector(unsigned short *high, unsigned short *low) |
{ |
} |
#if APIC_DEBUG |
#define inquire_remote_apic(apicid) __inquire_remote_apic(apicid) |
#else |
#define inquire_remote_apic(apicid) {} |
#endif |
#endif /* __ASM_MACH_WAKECPU_H */ |