/shark/trunk/drivers/pci6025e/include/drivers/pci6025e/pci6025e.h |
---|
0,0 → 1,110 |
/***************************************************************************** |
* Filename: pci6025e.h * |
* Author: Ziglioli Marco * |
* Date: 15/03/2001 * |
* Last update: * |
* Description: Header file which contains declaration of structure variables * |
* and routines used to interface with PCI6025E * |
*----------------------------------------------------------------------------* |
* Notes: Based on National C Routines * |
*****************************************************************************/ |
/* This file is part of the S.Ha.R.K. Project - http://shark.sssup.it |
* |
* Copyright (C) 2001 Marco Ziglioli |
* |
* This program is free software; you can redistribute it and/or modify |
* it under the terms of the GNU General Public License as published by |
* the Free Software Foundation; either version 2 of the License, or |
* (at your option) any later version. |
* |
* This program is distributed in the hope that it will be useful, |
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
* GNU General Public License for more details. |
* |
* You should have received a copy of the GNU General Public License |
* along with this program; if not, write to the Free Software |
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
* |
*/ |
#ifndef _MY_PCI6025E_ |
#define _MY_PCI6025E_ |
#include <kernel/kern.h> |
#include <drivers/pci.h> |
#include <ll/i386/hw-instr.h> |
#include "regconst.h" |
#include "ll/sys/cdefs.h" |
__BEGIN_DECLS |
//#define __REG_DEBUG__ //enable this in debug mode to see |
//configuration registers value |
#define NI_CODE 0x1093 //NI Vendor_ID board code |
#define Board_Address STC_Base_Address |
#define BAR0 0xE8000L //New address of MITE |
#define BAR1 0xEA000L //New address of STC |
#define INT_NO NIDevice_info[0].InterruptLevel |
struct pci6025e_deviceinfo { |
WORD DEVID; |
BYTE DevFunction; |
BYTE BusNumber; |
DWORD BAR0Value; |
DWORD IntLineRegValue; |
DWORD RevisionID; |
BYTE InterruptLevel; |
}; |
extern struct pci6025e_deviceinfo NIDevice_info[10]; |
extern DWORD *IntLinestructptr; |
extern DWORD *BAR0structptr; |
extern DWORD *RevID; |
extern DWORD STC_Base_Address, MITE_Base_Address; |
#define set(b,p) b|=(0x01 << p) //set p-th bit of byte b to 1 |
#define clr(b,p) b&=~(0x01 << p) //set p-th bit of byte b to 0 |
//scan PCI bus to find board and remap it on memory above 1MB |
BYTE find_NI_Device(void); |
BYTE reMap(void); |
//IO Windowed access board registers |
void DAQ_STC_Windowed_Mode_Write(WORD reg_addr, WORD value); |
WORD DAQ_STC_Windowed_Mode_Read(WORD reg_addr); |
//On board clock |
BYTE setIntClock(BYTE, BYTE, BYTE); |
//PFI programming |
void PFIprogramming(WORD); |
//Interrupt management |
void INT_personalize(BYTE); |
void INT_setup(BYTE, BYTE); |
//needful macros |
#define Immediate_Readb(addr) *((BYTE *)(Board_Address + (addr))) |
#define Immediate_Readw(addr) *((WORD *)(Board_Address + (addr))) |
#define Immediate_Writeb(addr, val) *((BYTE *)(Board_Address + (addr)))=(val) |
#define Immediate_Writew(addr, val) *((WORD *)(Board_Address + (addr)))=(val) |
void bitfield(BYTE dim, DWORD value); |
void TEST_bitfield(BYTE dim, DWORD value, char *str); |
//Software copy of STC general registers |
extern WORD joint_reset, interrupt_a_enable, interrupt_a_ack, |
interrupt_b_enable, interrupt_b_ack, clock_and_fout; |
__END_DECLS |
#endif |
/*End of File: Pci6025e.h*/ |
/shark/trunk/drivers/pci6025e/include/drivers/pci6025e/timer.h |
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0,0 → 1,71 |
/***************************************************************************** |
* Filename: Timer.h * |
* Author: Ziglioli Marco (Doctor Stein) * |
* Date: 23/03/2001 * |
* Last update: * |
* Description: Header file for routines used to configure and manage General * |
* Purpouse Timer Conter on PCI6025E board * |
*----------------------------------------------------------------------------* |
* Notes: I only need time measurament, other features like events * |
* count position sensing or signal generation are not * |
* implemented yet * |
*****************************************************************************/ |
/* This file is part of the S.Ha.R.K. Project - http://shark.sssup.it |
* |
* Copyright (C) 2001 Marco Ziglioli |
* |
* This program is free software; you can redistribute it and/or modify |
* it under the terms of the GNU General Public License as published by |
* the Free Software Foundation; either version 2 of the License, or |
* (at your option) any later version. |
* |
* This program is distributed in the hope that it will be useful, |
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
* GNU General Public License for more details. |
* |
* You should have received a copy of the GNU General Public License |
* along with this program; if not, write to the Free Software |
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
* |
*/ |
#ifndef _PCI6025_TIMER_H_ |
#define _PCI6025_TIMER_H_ |
#include <drivers/pci6025e/pci6025e.h> |
#include <drivers/pci6025e/regconst.h> |
#include "ll/sys/cdefs.h" |
__BEGIN_DECLS |
#define C0 0 |
#define C1 1 |
WORD g0_command, g0_mode, g0_input_select, g0_autoincrement, |
g1_command, g1_mode, g1_input_select, g1_autoincrement; |
void reset_counter_0(void); |
void reset_counter_1(void); |
void arm_counter_0(void); |
void arm_counter_1(void); |
void disarm_counter_0(void); |
void disarm_counter_1(void); |
void TIM_reset(BYTE); |
void TIM_arm(BYTE); |
void TIM_disarm(BYTE); |
DWORD TIM_readCounter(BYTE); |
DWORD TIM_readHWSaveReg(BYTE); |
void TIM_eventCounting(BYTE, BYTE, BYTE, BYTE, DWORD); |
void TIM_bufferedEventCounting(BYTE, BYTE, BYTE, BYTE, DWORD); |
void TIM_timeMeasurement(BYTE, BYTE, BYTE, BYTE, BYTE, DWORD); |
void TIM_bufferedTimeMeasurement(BYTE, BYTE, BYTE, BYTE, DWORD); |
__END_DECLS |
#endif |
/*--------------------------------------------------------------------------*/ |
/shark/trunk/drivers/pci6025e/include/drivers/pci6025e/dio_ppi.h |
---|
0,0 → 1,75 |
/***************************************************************************** |
* Filename: Dio.h * |
* Author: Ziglioli Marco * |
* Date: 16/03/2001 * |
* Last update: * |
* Description: Header file for routines used to configure and use the digital* |
* IO lines of PCI6025E NI board * |
*----------------------------------------------------------------------------* |
* Notes: At this time only the eight digital IO lines are programmed * |
* In the future also the 24 lines of 8255 will be programmed * |
*****************************************************************************/ |
/* This file is part of the S.Ha.R.K. Project - http://shark.sssup.it |
* |
* Copyright (C) 2001 Marco Ziglioli |
* |
* This program is free software; you can redistribute it and/or modify |
* it under the terms of the GNU General Public License as published by |
* the Free Software Foundation; either version 2 of the License, or |
* (at your option) any later version. |
* |
* This program is distributed in the hope that it will be useful, |
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
* GNU General Public License for more details. |
* |
* You should have received a copy of the GNU General Public License |
* along with this program; if not, write to the Free Software |
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
* |
*/ |
#ifndef _MY_DIO_H_ |
#define _MY_DIO_H_ |
#include <drivers/pci6025e/pci6025e.h> |
#include "ll/sys/cdefs.h" |
__BEGIN_DECLS |
#define ALL_IN 0x0000 //All 8 STC line in input |
#define ALL_OUT 0x00FF //All 8 STC line in output |
#define DIO_setup(b) config(b) //ALIAS |
#ifndef FALSE |
#define FALSE 0 |
#endif |
#ifndef TRUE |
#define TRUE 1 |
#endif |
void config(BYTE b); |
void DIO_init(void); |
void DIO_resetReg(void); |
void DIO_config(BYTE); |
BYTE DIO_read(void); |
BYTE DIO_write(BYTE b); |
WORD DIO_setConfig(char *); |
WORD DIO_getConfig(void); |
void PPI_init(void); |
void PPI_resetReg(void); |
void PPI_config(BYTE); |
BYTE PPI_read(BYTE); |
void PPI_write(BYTE, BYTE); |
WORD PPI_setConfig(BYTE, BYTE, BYTE, BYTE, BYTE, BYTE); |
WORD PPI_getConfig(BYTE); |
BYTE PPI_getAddress(BYTE); |
__END_DECLS |
#endif |
/*--------------------------------------------------------------------------*/ |
/shark/trunk/drivers/pci6025e/include/drivers/pci6025e/regconst.h |
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0,0 → 1,175 |
/***************************************************************************** |
* Filename: Regconst.h * |
* Author: Ziglioli Marco * |
* Date: 23/03/2001 * |
* Description: Symbolic constant names of registers used in STC and on board * |
*****************************************************************************/ |
/* This file is part of the S.Ha.R.K. Project - http://shark.sssup.it |
* |
* Copyright (C) 2001 Marco Ziglioli |
* |
* This program is free software; you can redistribute it and/or modify |
* it under the terms of the GNU General Public License as published by |
* the Free Software Foundation; either version 2 of the License, or |
* (at your option) any later version. |
* |
* This program is distributed in the hope that it will be useful, |
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
* GNU General Public License for more details. |
* |
* You should have received a copy of the GNU General Public License |
* along with this program; if not, write to the Free Software |
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
* |
*/ |
#ifndef _MY_REGCONST_H_ |
#define _MY_REGCONST_H_ |
//DAQ STC registers (see file REG-DES.txt for bitfield description) |
#define WIN_ADDR_REG (0x00) * 2 //Write-only |
#define WIN_DATA_WR_REG (0x01) * 2 //Write-only |
#define WIN_DATA_RD_REG (0x01) * 2 //Read-only |
#define INTERRUPT_A_ACK 0x02 //Write-only |
#define AI_STATUS_1 0x02 //Read-only |
#define INTERRUPT_B_ACK 0x03 //Write-only |
#define AO_STATUS_1 0x03 //Read-only |
#define AI_COMMAND_2 0x04 //Write-only |
#define G_STATUS 0x04 //Read-only |
#define AI_STATUS_2 0x05 //Read-only |
#define AO_COMMAND_2 0x05 //Write-only |
#define AO_STATUS_2 0x06 //Read-only |
#define G0_COMMAND 0x06 //Write-only |
#define DIO_PARALLEL_INPUT 0x07 //Read-only |
#define G1_COMMAND 0x07 //Write-only |
#define AI_COMMAND_1 0x08 //Write-only |
#define G0_HW_SAVE_HI 0x08 //Read-only |
#define AO_COMMAND_1 0x09 //Write-only |
#define G0_HW_SAVE_LO 0x09 //Read-only |
#define DIO_OUTPUT 0x0A //Write-only |
#define G1_HW_SAVE_HI 0x0A //Read-only |
#define DIO_CONTROL 0x0B //Write-only |
#define G1_HW_SAVE_LO 0x0B //Read-only |
#define AI_MODE_1 0x0C //Write-only |
#define G0_SAVE_HI 0x0C //Read-only |
#define AI_MODE_2 0x0D //Write-only |
#define G0_SAVE_LO 0x0D //Read-only |
#define AI_SI_LOAD_A_HI 0x0E //Write-only |
#define G1_SAVE_HI 0x0E //Read-only |
#define AI_SI_LOAD_A_LO 0x0F //Write-only |
#define G1_SAVE_LO 0x0F //Read-only |
#define AI_SI_LOAD_B_HI 0x10 //Write-only |
#define AO_UI_SAVE_HI 0x10 //Read-only |
#define AI_SI_LOAD_B_LO 0x11 //Write-only |
#define AO_UI_SAVE_LO 0x11 //Read-only |
#define AI_SC_LOAD_A_HI 0x12 //Write-only |
#define AO_BC_SAVE_HI 0x12 //Read-only |
#define AI_SC_LOAD_A_LO 0x13 //Write-only |
#define AO_BC_SAVE_LO 0x13 //Read-only |
#define AI_SC_LOAD_B_HI 0x14 //Write-only |
#define AO_UC_SAVE_HI 0x14 //Read-only |
#define AI_SC_LOAD_B_LO 0x15 //Write-only |
#define AO_UC_SAVE_LO 0x15 //Read-only |
#define AI_SI2_LOAD_A 0x17 //Write-only |
#define AO_UI2_SAVE 0x17 //Read-only |
#define AI_SI2_LOAD_B 0x19 //Write-only |
#define AI_SI2_SAVE 0x19 //Read-only |
#define G0_MODE 0x1A //Write-only |
#define AI_DIV_SAVE 0x1A //Read-only |
#define G1_MODE 0x1B //Write-only |
#define JOINT_STATUS_1 0x1B //Read-only |
#define DIO_SERIAL_INPUT 0x1C //Read-only |
#define G0_LOAD_A_HI 0x1C //Write-only |
#define G0_LOAD_A_LO 0x1D //Write-only |
#define JOINT_STATUS_2 0x1D //Read-only |
#define G0_LOAD_B_HI 0x1E //Write-only |
#define G0_LOAD_B_LO 0x1F //Write-only |
#define G1_LOAD_A_HI 0x20 //Write-only |
#define G1_LOAD_A_LO 0x21 //Write-only |
#define G1_LOAD_B_HI 0x22 //Write-only |
#define G1_LOAD_B_LO 0x23 //Write-only |
#define G1_INPUT_SELECT 0x25 //Write-only |
#define G0_INPUT_SELECT 0x24 //Write-only |
#define AO_MODE_1 0x26 //Write-only |
#define AO_MODE_2 0x27 //Write-only |
#define AO_UI_LOAD_A_HI 0x28 //Write-only |
#define AO_UI_LOAD_A_LO 0x29 //Write-only |
#define AO_UI_LOAD_B_HI 0x2A //Write-only |
#define AO_UI_LOAD_B_LO 0x2B //Write-only |
#define AO_BC_LOAD_A_HI 0x2C //Write-only |
#define AO_BC_LOAD_A_LO 0x2D //Write-only |
#define AO_BC_LOAD_B_HI 0x2E //Write-only |
#define AO_BC_LOAD_B_LO 0x2F //Write-only |
#define AO_UC_LOAD_A_HI 0x30 //Write-only |
#define AO_UC_LOAD_A_LO 0x31 //Write-only |
#define AO_UC_LOAD_B_HI 0x32 //Write-only |
#define AO_UC_LOAD_B_LO 0x33 //Write-only |
#define AO_UI2_LOAD_A 0x35 //Write-only |
#define AO_UI2_LOAD_B 0x37 //Write-only |
#define CLOCK_AND_FOUT 0x38 //Write-only |
#define IO_BIDIRECTION_PIN 0x39 //Write-only |
#define RTSI_TRIG_DIRECTION 0x3A //Write-only |
#define INTERRUPT_CONTROL 0x3B //Write-only |
#define AI_OUTPUT_CONTROL 0x3C //Write-only |
#define ANALOG_TRIGGER_ETC 0x3D //Write-only |
#define AI_START_STOP_SELECT 0x3E //Write-only |
#define AI_TRIGGER_SELECT 0x3F //Write-only |
#define AI_DIV_LOAD_A 0x40 //Write-only |
#define AI_SI_SAVE_HI 0x40 //Read-only |
#define AI_SI_SAVE_LO 0x41 //Read-only |
#define AI_SC_SAVE_HI 0x42 //Read-only |
#define AO_START_SELECT 0x42 //Write-only |
#define AI_SC_SAVE_LO 0x43 //Read-only |
#define AO_TRIGGER_SELECT 0x43 //Write-only |
#define G0_AUTOINCREMENT 0x44 //Write-only |
#define G1_AUTOINCREMENT 0x45 //Write-only |
#define AO_MODE_3 0x46 //Write-only |
#define GENERIC_CONTROL 0x47 //Write-only |
#define JOINT_RESET 0x48 //Write-only |
#define INTERRUPT_A_ENABLE 0x49 //Write-only |
#define SECOND_IRQ_A_ENABLE 0x4A //Write-only |
#define INTERRUPT_B_ENABLE 0x4B //Write-only |
#define SECOND_IRQ_B_ENABLE 0x4C //Write-only |
#define AI_PERSONAL 0x4D //Write-only |
#define AO_PERSONAL 0x4E //Write-only |
#define RTSI_TRIG_A_OUTPUT 0x4F //Write-only |
#define RTSI_TRIG_B_OUTPUT 0x50 //Write-only |
#define RTSI_BOARD 0x51 //Write-only |
#define WRITE_STROBE_0 0x52 //Write-only |
#define WRITE_STROBE_1 0x53 //Write-only |
#define WRITE_STROBE_2 0x54 //Write-only |
#define WRITE_STROBE_3 0x55 //Write-only |
#define AO_OUTPUT_CONTROL 0x56 //Write-only |
#define AI_MODE_3 0x57 //Write-only |
//Analog Input Registers Group |
#define ADC_CONFIG_HI 0x12 //Write-only |
#define ADC_CONFIG_LO 0x10 //Write-only |
#define ADC_DATA_READ 0x1C //Read-only |
//Analog Output Registers Group |
#define DAC_CONFIG 0x16 //Write-only |
#define DAC_FIFO 0x1E //Write-only |
#define DAC0_DATA 0x18 //Write-only |
#define DAC1_DATA 0x1A //Write-only |
/*PPI OKI82C55A MSM registers: |
Finally I found this walues writing a cycle which scanned board registers |
and check for some test lines value. I don't know why but these aren't |
unique right values. Also 19 1B 1D 1F and 59 5B 5D 5F and 99 9B 9D 9F work |
so if you have collision problems with other address try to change these |
values. |
*/ |
#define PPI_PORT_A 0xD9 //PORT_A of 8255 |
#define PPI_PORT_B 0xDB //PORT_B of 8255 |
#define PPI_PORT_C 0xDD //PORT_C of 8255 |
#define PPI_CFG_REG 0xDF //Configuration Register |
#endif |
/*End of file: regconst.h*/ |
/shark/trunk/drivers/pci6025e/include/drivers/pci6025e/dac.h |
---|
0,0 → 1,62 |
/***************************************************************************** |
* Filename: DAC.H * * |
* Author: Marco Ziglioli (Doctor Stein) * * |
* Date: 06/06/2001 * * |
* Description: Digital 2 analog conversion package header file * |
*----------------------------------------------------------------------------* |
* Notes: * |
*****************************************************************************/ |
/* This file is part of the S.Ha.R.K. Project - http://shark.sssup.it |
* |
* Copyright (C) 2001 Marco Ziglioli |
* |
* This program is free software; you can redistribute it and/or modify |
* it under the terms of the GNU General Public License as published by |
* the Free Software Foundation; either version 2 of the License, or |
* (at your option) any later version. |
* |
* This program is distributed in the hope that it will be useful, |
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
* GNU General Public License for more details. |
* |
* You should have received a copy of the GNU General Public License |
* along with this program; if not, write to the Free Software |
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
* |
*/ |
#ifndef _MY_DAC_H_ |
#define _MY_DAC_H_ |
#include <drivers/pci6025e/pci6025e.h> |
#include <drivers/pci6025e/regconst.h> |
#include "ll/sys/cdefs.h" |
__BEGIN_DECLS |
#define DAC0 0 |
#define DAC1 1 |
//Analog output releted functions |
void DAC_reset(void); |
void DAC_boardInit(BYTE, WORD); |
void DAC_trigger(WORD); |
void DAC_numSetup(DWORD, DWORD); |
void DAC_update(BYTE, BYTE); |
void DAC_channel(BYTE, BYTE); |
void DAC_LDACSourceUpdate(BYTE); |
void DAC_stopError(BYTE); |
void DAC_FIFOFlags(BYTE); |
void DAC_enableInterrupts(WORD); |
void DAC_arm(void); |
void DAC_startOperation(void); |
void DAC_Init(void); |
void DAC_output(BYTE, WORD); |
__END_DECLS |
#endif |
/*End of file: DAC.H*/ |
/shark/trunk/drivers/pci6025e/makefile |
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12,6 → 12,8 |
OBJS = pci6025e.o ./tim/timer.o ./dac/dac.o ./dio_ppi/dio_ppi.o |
OTHERINCL += -I$(BASE)/drivers/pci6025e/include |
include $(BASE)/config/lib.mk |
PCI6025EDIRS := tim dio_ppi dac |