44,6 → 44,14 |
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#include <drivers/pci6025e/pci6025e.h> |
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extern int pci20to26_find_class(unsigned int class_code, int index, BYTE *bus, BYTE *dev); |
extern int pci20to26_read_config_byte(unsigned int bus, unsigned int dev, int where, BYTE *val); |
extern int pci20to26_read_config_word(unsigned int bus, unsigned int dev, int where, WORD *val); |
extern int pci20to26_read_config_dword(unsigned int bus, unsigned int dev, int where, DWORD *val); |
extern int pci20to26_write_config_byte(unsigned int bus, unsigned int dev, int where, BYTE val); |
extern int pci20to26_write_config_word(unsigned int bus, unsigned int dev, int where, WORD val); |
extern int pci20to26_write_config_dword(unsigned int bus, unsigned int dev, int where, DWORD val); |
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//Software copy of importan register |
static WORD interrupt_control; |
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88,20 → 96,23 |
*****************************************************************************/ |
void DAQ_STC_Windowed_Mode_Write(WORD addr, WORD Value) |
{ |
kern_cli(); |
SYS_FLAGS f; |
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f = kern_fsave(); |
*((WORD *)(STC_Base_Address + WIN_ADDR_REG)) = addr; |
*((WORD *)(STC_Base_Address + WIN_DATA_WR_REG)) = Value; |
kern_sti(); |
kern_frestore(f); |
} |
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WORD DAQ_STC_Windowed_Mode_Read(WORD addr) |
{ |
WORD value = 0; |
SYS_FLAGS f; |
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kern_cli(); |
f = kern_fsave(); |
*((WORD *)(STC_Base_Address + WIN_ADDR_REG)) = addr; |
value = *((WORD *)(STC_Base_Address + WIN_DATA_RD_REG)); |
kern_sti(); |
kern_frestore(f); |
return (value); |
} |
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112,7 → 123,7 |
{ |
WORD devNumFunNum = 0; |
WORD busNum, i = 0; |
DWORD value, temp, Device_ID; |
DWORD value, temp = 0, Device_ID; |
BYTE hdr, Device_Count; |
int present; |
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125,12 → 136,12 |
for(devNumFunNum = 0; devNumFunNum <= 0xFF; devNumFunNum += 0x08){ |
present = 0; |
if((devNumFunNum & 0x07) == 0){ |
present = pcibios_read_config_byte((BYTE)busNum, |
present = pci20to26_read_config_byte((BYTE)busNum, |
(BYTE)devNumFunNum, 0x0E, &hdr); |
if(hdr & 0x80) |
present = 1; |
if(present){ |
if(pcibios_read_config_dword((BYTE)busNum, (BYTE)devNumFunNum, |
if(pci20to26_read_config_dword((BYTE)busNum, (BYTE)devNumFunNum, |
0x00, &value) && (value != 0xffffffff)){ |
if((value & 0xffffL) == NI_CODE){ |
Device_ID = value; |
140,9 → 151,9 |
NIDevice_info[i].DEVID = (WORD)temp; |
NIDevice_info[i].DevFunction = (BYTE)devNumFunNum; |
NIDevice_info[i].BusNumber = (BYTE)busNum; |
pcibios_read_config_dword((BYTE)busNum, (BYTE)devNumFunNum, 0x10, (DWORD *)BAR0structptr); |
pcibios_read_config_dword((BYTE)busNum, (BYTE)devNumFunNum, 0x3C, (DWORD *)IntLinestructptr); |
pcibios_read_config_dword((BYTE)busNum, (BYTE)devNumFunNum, 0x08, (DWORD *)RevID); |
pci20to26_read_config_dword((BYTE)busNum, (BYTE)devNumFunNum, 0x10, (DWORD *)BAR0structptr); |
pci20to26_read_config_dword((BYTE)busNum, (BYTE)devNumFunNum, 0x3C, (DWORD *)IntLinestructptr); |
pci20to26_read_config_dword((BYTE)busNum, (BYTE)devNumFunNum, 0x08, (DWORD *)RevID); |
NIDevice_info[i].InterruptLevel = (BYTE)NIDevice_info[i].IntLineRegValue; |
i++; |
BAR0structptr++; |
195,10 → 206,10 |
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//Setting up Base Address |
pcibios_read_config_dword((BYTE)NIDevice_info[0].BusNumber, |
pci20to26_read_config_dword((BYTE)NIDevice_info[0].BusNumber, |
(BYTE)NIDevice_info[0].DevFunction, 0x14, &STC_Base_Address); |
STC_Base_Address = (STC_Base_Address & 0xFFFFFF00) | 0x80; |
pcibios_read_config_dword((BYTE)NIDevice_info[0].BusNumber, |
pci20to26_read_config_dword((BYTE)NIDevice_info[0].BusNumber, |
(BYTE)NIDevice_info[0].DevFunction, 0x10, &MITE_Base_Address); |
//MITE_Base_Address &= 0xFFFFFF00; |
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