69,8 → 69,6 |
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unsigned int start_8253, end_8253, delta_8253; |
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cli(); |
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outp(0x61, (inp(0x61) & ~0x02) | 0x01); |
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outp(0x43,0xB0); /* binary, mode 0, LSB/MSB, Ch 2 */ |
124,8 → 122,6 |
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message("Calibrated Clk_per_msec = %10d\n",clk_per_msec); |
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sti(); |
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} |
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#define CMOS_INIT 0 |
142,8 → 138,6 |
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unsigned char set; |
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cli(); |
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CMOS_READ(0x0C,set); |
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barrier(); |
163,8 → 157,6 |
cmos_calibrate_status = CMOS_BEGIN; |
} |
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sti(); |
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} |
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//TSC Calibration using RTC |
173,8 → 165,6 |
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unsigned long long dtsc; |
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cli(); |
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irq_bind(8, calibrate_tsc_IRQ8, INT_FORCE); |
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CMOS_READ(0x0A,save_CMOS_regA); |
184,12 → 174,14 |
CMOS_WRITE(0x0B,0x42); // Enable Interrupt |
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irq_unmask(8); |
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sti(); |
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while (cmos_calibrate_status != CMOS_END) { |
barrier(); |
} |
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cli(); |
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dtsc = irq8_end - irq8_start; |
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197,15 → 189,11 |
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message("Calibrated CPU Clk/msec = %10d\n",clk_per_msec); |
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cli(); |
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irq_mask(8); |
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CMOS_WRITE(0x0A,save_CMOS_regA); |
CMOS_WRITE(0x0B,save_CMOS_regB); |
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sti(); |
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} |
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int apic_get_maxlvt(void) |
361,8 → 349,6 |
unsigned long long tsc_start = 0, tsc_end = 0, dtsc; |
unsigned int tmp_value; |
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cli(); |
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tmp_value = SET_APIC_TIMER_BASE(APIC_TIMER_BASE_DIV) | LOCAL_TIMER_VECTOR; |
apic_write_around(APIC_LVTT, tmp_value); |
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391,8 → 377,6 |
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disable_APIC_timer(); |
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sti(); |
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dtsc = tsc_end - tsc_start; |
dapic = apic_start - apic_end; |
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445,7 → 429,7 |
#ifdef __APIC__ |
unsigned int msr_low_orig, tmp; |
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cli(); |
cli(); |
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disable_APIC_timer(); |
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