85,6 → 85,13 |
: "D" (ptr_init_tsc) , "b" (clk_opt_1), "c" (clk_opt_2) |
: "edx" ); |
|
if (init_time.tv_sec != 0 || init_time.tv_nsec != 0) { |
__asm__("divl %%ecx\n\t" |
"addl %%ebx,%%eax\n\t" |
:"=a" (tspec->tv_sec), "=d" (tspec->tv_nsec) |
:"a" (init_time.tv_nsec+tspec->tv_nsec), "b" (tspec->tv_sec+init_time.tv_sec), "c" (1000000000), "d" (0)); |
}; |
|
} |
|
//Low level time read function: Optimized for CPU < 2 GHz |
111,6 → 118,13 |
: "D" (ptr_init_tsc) , "b" (clk_opt_1), "c" (clk_opt_3) |
: "edx" ); |
|
if (init_time.tv_sec != 0 || init_time.tv_nsec != 0) { |
__asm__("divl %%ecx\n\t" |
"addl %%ebx,%%eax\n\t" |
:"=a" (tspec->tv_sec), "=d" (tspec->tv_nsec) |
:"a" (init_time.tv_nsec+tspec->tv_nsec), "b" (tspec->tv_sec+init_time.tv_sec), "c" (1000000000), "d" (0)); |
}; |
|
} |
|
//Low level time read function: Optimized for CPU < 4 GHz |
137,6 → 151,13 |
: "D" (ptr_init_tsc) , "b" (clk_opt_1), "c" (clk_opt_4) |
: "edx" ); |
|
if (init_time.tv_sec != 0 || init_time.tv_nsec != 0) { |
__asm__("divl %%ecx\n\t" |
"addl %%ebx,%%eax\n\t" |
:"=a" (tspec->tv_sec), "=d" (tspec->tv_nsec) |
:"a" (init_time.tv_nsec+tspec->tv_nsec), "b" (tspec->tv_sec+init_time.tv_sec), "c" (1000000000), "d" (0)); |
}; |
|
} |
|
//Low level time read function |
170,7 → 191,7 |
__asm__("divl %%ecx\n\t" |
"addl %%ebx,%%eax\n\t" |
:"=a" (tspec->tv_sec), "=d" (tspec->tv_nsec) |
:"a" (init_time.tv_nsec+tspec->tv_nsec), "b" (tspec->tv_sec+init_time.tv_sec), "c" (0x3B9ACA00), "d" (0)); |
:"a" (init_time.tv_nsec+tspec->tv_nsec), "b" (tspec->tv_sec+init_time.tv_sec), "c" (1000000000), "d" (0)); |
}; |
|
} |