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Regard whitespace Rev 94 → Rev 102

/shark/tags/rel_0_5/oslib/xlib/vm86-exc.s
File deleted
/shark/tags/rel_0_5/oslib/xlib/x1.c
72,7 → 72,11
typedef char *charp;
charp _argv[100];
 
extern void main(int argc, char *argv[]);
#ifndef MAIN
#define MAIN main
#endif
 
extern void MAIN(int argc,char *argv[]);
extern void bios_save(void);
extern void bios_restore(void);
 
91,63 → 95,32
return (mbi);
}
 
#ifndef __NOH4__
 
void __kernel_init__(struct multiboot_info *m);
 
void _startup(void)
{
struct multiboot_info *mbi = mbi_address();
 
bios_save();
 
/* Call init procedure using standard C convention */
/* Remember you cannot call any console I/O function */
/* if you do not call bios_save() */
 
#ifdef __DUMP_MEM__
message("X/MEM : %u\n", mbi->mem_upper);
message("DOS/MEM : %u\n", mbi->mem_lower);
message("x_bios Size : %u\n", sizeof(X_BIOSCALL));
message("mbi Size : %u\n", sizeof(struct multiboot_info));
message("Cmdline : %s\n", mbi->cmdline);
/* message("Argc : %u",_argc);
message("Argv[0] : %s / %s\n",_argv[0]);
message("Argv[1] : %s\n",_argv[1]);
message("Argv[2] : %s\n",_argv[2]);
message("Argv[3] : %s\n",_argv[3]); */
#endif
 
__kernel_init__(mbi);
 
bios_restore();
}
 
#else
void _startup(void)
{
register int i = 0;
char temp[1000];
struct multiboot_info *mbi = mbi_address();
char *cmdline = (char *) (mbi->cmdline);
 
if (!(mbi->flags & MB_INFO_MEMORY)) {
cputs
("X/Runtime library error!!! Unable to find memory information!\n");
cputs("X/Runtime library error!!! Unable to find memory information!\n");
l1_exit(-1);
}
 
if (mbi->flags & MB_INFO_CMDLINE) {
/* Build parameter list, up to 100 parms... */
while (cmdline[i] != 0) {
_argv[_argc] = &(cmdline[i]);
while (cmdline[i] != ' ' && cmdline[i] != 0)
while (cmdline[i] != 0 && i < 1000) {
temp[i] = cmdline[i];
_argv[_argc] = &(temp[i]);
while (cmdline[i] != ' ' && cmdline[i] != 0 && i < 1000) {
temp[i] = cmdline[i];
i++;
}
if (cmdline[i] == ' ') {
cmdline[i] = 0;
i++;
_argc++;
temp[i] = 0; i++; _argc++;
}
}
temp[i] = 0;
_argc++;
}
 
156,6 → 129,7
/* Remember you cannot call any console I/O function */
/* if you do not call bios_save() */
 
 
#ifdef __DUMP_MEM__
message("X/MEM : %u\n", mbi->mem_upper);
message("DOS/MEM : %u\n", mbi->mem_lower);
162,14 → 136,12
message("x_bios Size : %u\n", sizeof(X_BIOSCALL));
message("mbi Size : %u\n", sizeof(struct multiboot_info));
message("Cmdline : %s\n", mbi->cmdline);
message("Argc : %u", _argc);
message("Argv[0] : %s / %s\n", _argv[0]);
message("Argc : %u\n",_argc);
message("Argv[0] : %s\n",_argv[0]);
message("Argv[1] : %s\n", _argv[1]);
message("Argv[2] : %s\n", _argv[2]);
message("Argv[3] : %s\n", _argv[3]);
#endif
main(_argc, _argv);
MAIN(_argc,_argv);
bios_restore();
}
 
#endif
/shark/tags/rel_0_5/oslib/xlib/xinfo.c
36,8 → 36,7
 
X_CALLBIOS *x_bios_address(void)
{
X_CALLBIOS *a =
(X_CALLBIOS *) GDT_read(X_CALLBIOS_SEL, NULL, NULL, NULL);
X_CALLBIOS *a = (X_CALLBIOS *)GDT_read(X_CALLBIOS_SEL,NULL,NULL,NULL);
return (a);
}
 
46,30 → 45,32
WORD X_version(void)
{
X_CALLBIOS *x_bios = x_bios_address();
return (x_bios->ver);
return(x_bios->_ver);
}
 
void X_meminfo(LIN_ADDR * b1, DWORD * s1, LIN_ADDR * b2, DWORD * s2)
{
struct multiboot_info *mbi = mbi_address();
if (mbi->flags & MB_INFO_USEGDT) {
if (b1 != NULL)
*b1 = (LIN_ADDR) mbi->mem_upbase;
if (s1 != NULL)
*s1 = mbi->mem_upper * 1024;
if (b2 != NULL)
*b2 = (LIN_ADDR) mbi->mem_lowbase;
if (s2 != NULL)
*s2 = mbi->mem_lower * 1024;
int x = 0;
 
if (mbi->flags & MB_INFO_BOOT_LOADER_NAME) {
char *name;
 
name = (char *) mbi->boot_loader_name;
if (*name == 'X') {
x = 1;
}
}
if (x) {
if (b1 != NULL) *b1 = (LIN_ADDR)mbi->mem_upbase;
if (s1 != NULL) *s1 = mbi->mem_upper * 1024;
if (b2 != NULL) *b2 = (LIN_ADDR)mbi->mem_lowbase;
if (s2 != NULL) *s2 = mbi->mem_lower * 1024;
} else {
if (b1 != NULL)
*b1 = (LIN_ADDR) 0x100000;
if (s1 != NULL)
*s1 = mbi->mem_upper * 1024;
if (b2 != NULL)
*b2 = (LIN_ADDR) 0x4000;
if (s2 != NULL)
*s2 = mbi->mem_lower * 1024;
if (b1 != NULL) *b1 = (LIN_ADDR)0x100000;
if (s1 != NULL) *s1 = mbi->mem_upper * 1024;
if (b2 != NULL) *b2 = (LIN_ADDR)0x4000;
if (s2 != NULL) *s2 = mbi->mem_lower * 1024;
}
/*
#ifdef __OLD_MB__
95,8 → 96,7
{
extern DWORD _stktop;
if ((DWORD) (addr) < _stktop) {
cprintf("CRISIS! Addr : %lx(%lx) Caller was %s\n", (DWORD) (addr),
_stktop, caller);
cprintf("CRISIS! Addr : %lx(%lx) Caller was %s\n",(DWORD)(addr),_stktop,caller);
}
}
#endif
/shark/tags/rel_0_5/oslib/xlib/xbios.c
38,14 → 38,14
X_CALLBIOS *xbc = x_bios_address();
 
/* Send interrupt request & register through the X_Info structure */
xbc->irqno = service;
memcpy(&(xbc->ir), in, sizeof(X_REGS16));
memcpy(&(xbc->sr), s, sizeof(X_SREGS16));
xbc->_irqno = service;
memcpy(&(xbc->_ir),in,sizeof(X_REGS16));
memcpy(&(xbc->_sr),s,sizeof(X_SREGS16));
 
/* Back to RM to execute the BIOS routine */
_x_callBIOS();
 
/* Get the return register values */
memcpy(out, &(xbc->or), sizeof(X_REGS16));
memcpy(s, &(xbc->sr), sizeof(X_SREGS16));
memcpy(out,&(xbc->_or),sizeof(X_REGS16));
memcpy(s,&(xbc->_sr),sizeof(X_SREGS16));
}
/shark/tags/rel_0_5/oslib/xlib/idtinit.c
0,0 → 1,526
#include <ll/i386/hw-data.h>
#include <ll/i386/hw-func.h>
 
/* ll hardware interrupt hooks */
extern void h0(void);
extern void h1(void);
extern void h2(void);
extern void h3(void);
extern void h4(void);
extern void h5(void);
extern void h6(void);
extern void exc7(void);
extern void h8(void);
extern void h9(void);
extern void h10(void);
extern void h11(void);
extern void h12(void);
extern void h13(void);
extern void h14(void);
extern void h15(void);
extern void h16(void);
extern void h17(void);
extern void h18(void);
extern void h19(void);
extern void h20(void);
extern void h21(void);
extern void h22(void);
extern void h23(void);
extern void h24(void);
extern void h25(void);
extern void h26(void);
extern void h27(void);
extern void h28(void);
extern void h29(void);
extern void h30(void);
extern void h31(void);
extern void h32(void);
extern void h33(void);
extern void h34(void);
extern void h35(void);
extern void h36(void);
extern void h37(void);
extern void h38(void);
extern void h39(void);
extern void h40(void);
extern void h41(void);
extern void h42(void);
extern void h43(void);
extern void h44(void);
extern void h45(void);
extern void h46(void);
extern void h47(void);
extern void h48(void);
extern void h49(void);
extern void h50(void);
extern void h51(void);
extern void h52(void);
extern void h53(void);
extern void h54(void);
extern void h55(void);
extern void h56(void);
extern void h57(void);
extern void h58(void);
extern void h59(void);
extern void h60(void);
extern void h61(void);
extern void h62(void);
extern void h63(void);
extern void h64(void);
extern void h65(void);
extern void h66(void);
extern void h67(void);
extern void h68(void);
extern void h69(void);
extern void h70(void);
extern void h71(void);
extern void h72(void);
extern void h73(void);
extern void h74(void);
extern void h75(void);
extern void h76(void);
extern void h77(void);
extern void h78(void);
extern void h79(void);
extern void h80(void);
extern void h81(void);
extern void h82(void);
extern void h83(void);
extern void h84(void);
extern void h85(void);
extern void h86(void);
extern void h87(void);
extern void h88(void);
extern void h89(void);
extern void h90(void);
extern void h91(void);
extern void h92(void);
extern void h93(void);
extern void h94(void);
extern void h95(void);
extern void h96(void);
extern void h97(void);
extern void h98(void);
extern void h99(void);
extern void h100(void);
extern void h101(void);
extern void h102(void);
extern void h103(void);
extern void h104(void);
extern void h105(void);
extern void h106(void);
extern void h107(void);
extern void h108(void);
extern void h109(void);
extern void h110(void);
extern void h111(void);
extern void h112(void);
extern void h113(void);
extern void h114(void);
extern void h115(void);
extern void h116(void);
extern void h117(void);
extern void h118(void);
extern void h119(void);
extern void h120(void);
extern void h121(void);
extern void h122(void);
extern void h123(void);
extern void h124(void);
extern void h125(void);
extern void h126(void);
extern void h127(void);
extern void h128(void);
extern void h129(void);
extern void h130(void);
extern void h131(void);
extern void h132(void);
extern void h133(void);
extern void h134(void);
extern void h135(void);
extern void h136(void);
extern void h137(void);
extern void h138(void);
extern void h139(void);
extern void h140(void);
extern void h141(void);
extern void h142(void);
extern void h143(void);
extern void h144(void);
extern void h145(void);
extern void h146(void);
extern void h147(void);
extern void h148(void);
extern void h149(void);
extern void h150(void);
extern void h151(void);
extern void h152(void);
extern void h153(void);
extern void h154(void);
extern void h155(void);
extern void h156(void);
extern void h157(void);
extern void h158(void);
extern void h159(void);
extern void h160(void);
extern void h161(void);
extern void h162(void);
extern void h163(void);
extern void h164(void);
extern void h165(void);
extern void h166(void);
extern void h167(void);
extern void h168(void);
extern void h169(void);
extern void h170(void);
extern void h171(void);
extern void h172(void);
extern void h173(void);
extern void h174(void);
extern void h175(void);
extern void h176(void);
extern void h177(void);
extern void h178(void);
extern void h179(void);
extern void h180(void);
extern void h181(void);
extern void h182(void);
extern void h183(void);
extern void h184(void);
extern void h185(void);
extern void h186(void);
extern void h187(void);
extern void h188(void);
extern void h189(void);
extern void h190(void);
extern void h191(void);
extern void h192(void);
extern void h193(void);
extern void h194(void);
extern void h195(void);
extern void h196(void);
extern void h197(void);
extern void h198(void);
extern void h199(void);
extern void h200(void);
extern void h201(void);
extern void h202(void);
extern void h203(void);
extern void h204(void);
extern void h205(void);
extern void h206(void);
extern void h207(void);
extern void h208(void);
extern void h209(void);
extern void h210(void);
extern void h211(void);
extern void h212(void);
extern void h213(void);
extern void h214(void);
extern void h215(void);
extern void h216(void);
extern void h217(void);
extern void h218(void);
extern void h219(void);
extern void h220(void);
extern void h221(void);
extern void h222(void);
extern void h223(void);
extern void h224(void);
extern void h225(void);
extern void h226(void);
extern void h227(void);
extern void h228(void);
extern void h229(void);
extern void h230(void);
extern void h231(void);
extern void h232(void);
extern void h233(void);
extern void h234(void);
extern void h235(void);
extern void h236(void);
extern void h237(void);
extern void h238(void);
extern void h239(void);
extern void h240(void);
extern void h241(void);
extern void h242(void);
extern void h243(void);
extern void h244(void);
extern void h245(void);
extern void h246(void);
extern void h247(void);
extern void h248(void);
extern void h249(void);
extern void h250(void);
extern void h251(void);
extern void h252(void);
extern void h253(void);
extern void h254(void);
extern void h255(void);
 
void IDT_init(void)
{
/* Insert the Exceptions handler into IDT */
IDT_place(0x00, h0);
IDT_place(0x01, h1);
IDT_place(0x02, h2);
IDT_place(0x03, h3);
IDT_place(0x04, h4);
IDT_place(0x05, h5);
IDT_place(0x06, h6);
IDT_place(0x07, exc7);
IDT_place(0x08, h8);
IDT_place(0x09, h9);
IDT_place(0x0A, h10);
IDT_place(0x0B, h11);
IDT_place(0x0C, h12);
IDT_place(0x0D, h13);
IDT_place(0x0E, h14);
IDT_place(0x0F, h15);
IDT_place(0x10, h16);
IDT_place(0x11, h17);
IDT_place(0x12, h18);
IDT_place(0x13, h19);
IDT_place(0x14, h20);
IDT_place(0x15, h21);
IDT_place(0x16, h22);
IDT_place(0x17, h23);
IDT_place(0x18, h24);
IDT_place(0x19, h25);
IDT_place(0x1A, h26);
IDT_place(0x1B, h27);
IDT_place(0x1C, h28);
IDT_place(0x1D, h29);
IDT_place(0x1E, h30);
IDT_place(0x1F, h31);
IDT_place(0x20, h32);
IDT_place(0x21, h33);
IDT_place(0x22, h34);
IDT_place(0x23, h35);
IDT_place(0x24, h36);
IDT_place(0x25, h37);
IDT_place(0x26, h38);
IDT_place(0x27, h39);
IDT_place(0x28, h40);
IDT_place(0x29, h41);
IDT_place(0x2A, h42);
IDT_place(0x2B, h43);
IDT_place(0x2C, h44);
IDT_place(0x2D, h45);
IDT_place(0x2E, h46);
IDT_place(0x2F, h47);
IDT_place(0x30, h48);
IDT_place(0x31, h49);
IDT_place(0x32, h50);
IDT_place(0x33, h51);
IDT_place(0x34, h52);
IDT_place(0x35, h53);
IDT_place(0x36, h54);
IDT_place(0x37, h55);
IDT_place(0x38, h56);
IDT_place(0x39, h57);
IDT_place(0x3A, h58);
IDT_place(0x3B, h59);
IDT_place(0x3C, h60);
IDT_place(0x3D, h61);
IDT_place(0x3E, h62);
IDT_place(0x3F, h63);
IDT_place(0x40, h64);
IDT_place(0x41, h65);
IDT_place(0x42, h66);
IDT_place(0x43, h67);
IDT_place(0x44, h68);
IDT_place(0x45, h69);
IDT_place(0x46, h70);
IDT_place(0x47, h71);
 
IDT_place(0x48, h72);
IDT_place(0x49, h73);
IDT_place(0x4A, h74);
IDT_place(0x4B, h75);
IDT_place(0x4C, h76);
IDT_place(0x4D, h77);
IDT_place(0x4E, h78);
IDT_place(0x4F, h79);
IDT_place(0x50, h80);
IDT_place(0x51, h81);
IDT_place(0x52, h82);
IDT_place(0x53, h83);
IDT_place(0x54, h84);
IDT_place(0x55, h85);
IDT_place(0x56, h86);
IDT_place(0x57, h87);
IDT_place(0x58, h88);
IDT_place(0x59, h89);
IDT_place(0x5A, h90);
IDT_place(0x5B, h91);
IDT_place(0x5C, h92);
IDT_place(0x5D, h93);
IDT_place(0x5E, h94);
IDT_place(0x5F, h95);
IDT_place(0x60, h96);
IDT_place(0x61, h97);
IDT_place(0x62, h98);
IDT_place(0x63, h99);
IDT_place(0x64, h100);
IDT_place(0x65, h101);
IDT_place(0x66, h102);
IDT_place(0x67, h103);
IDT_place(0x68, h104);
IDT_place(0x69, h105);
IDT_place(0x6A, h106);
IDT_place(0x6B, h107);
IDT_place(0x6C, h108);
IDT_place(0x6D, h109);
IDT_place(0x6E, h110);
IDT_place(0x6F, h111);
 
IDT_place(0x70, h112);
IDT_place(0x71, h113);
IDT_place(0x72, h114);
IDT_place(0x73, h115);
IDT_place(0x74, h116);
IDT_place(0x75, h117);
IDT_place(0x76, h118);
IDT_place(0x77, h119);
IDT_place(0x78, h120);
IDT_place(0x79, h121);
IDT_place(0x7A, h122);
IDT_place(0x7B, h123);
IDT_place(0x7C, h124);
IDT_place(0x7D, h125);
IDT_place(0x7E, h127);
IDT_place(0x7F, h127);
IDT_place(0x80, h128);
IDT_place(0x81, h129);
IDT_place(0x82, h130);
IDT_place(0x83, h131);
IDT_place(0x84, h132);
IDT_place(0x85, h133);
IDT_place(0x86, h134);
IDT_place(0x87, h135);
IDT_place(0x88, h136);
IDT_place(0x89, h137);
IDT_place(0x8A, h138);
IDT_place(0x8B, h139);
IDT_place(0x8C, h140);
IDT_place(0x8D, h141);
IDT_place(0x8E, h142);
IDT_place(0x8F, h143);
IDT_place(0x90, h144);
IDT_place(0x91, h145);
IDT_place(0x92, h146);
IDT_place(0x93, h147);
IDT_place(0x94, h148);
IDT_place(0x95, h149);
IDT_place(0x96, h150);
IDT_place(0x97, h151);
IDT_place(0x98, h152);
IDT_place(0x99, h153);
IDT_place(0x9A, h154);
IDT_place(0x9B, h155);
IDT_place(0x9C, h156);
IDT_place(0x9D, h157);
IDT_place(0x9E, h158);
IDT_place(0x9F, h159);
IDT_place(0xA0, h160);
IDT_place(0xA1, h161);
IDT_place(0xA2, h162);
IDT_place(0xA3, h163);
IDT_place(0xA4, h164);
IDT_place(0xA5, h165);
IDT_place(0xA6, h166);
IDT_place(0xA7, h167);
IDT_place(0xA8, h168);
IDT_place(0xA9, h169);
IDT_place(0xAA, h170);
IDT_place(0xAB, h171);
IDT_place(0xAC, h172);
IDT_place(0xAD, h173);
IDT_place(0xAE, h174);
IDT_place(0xAF, h175);
IDT_place(0xB0, h176);
IDT_place(0xB1, h177);
IDT_place(0xB2, h178);
IDT_place(0xB3, h179);
IDT_place(0xB4, h180);
IDT_place(0xB5, h181);
IDT_place(0xB6, h182);
IDT_place(0xB7, h183);
IDT_place(0xB8, h184);
IDT_place(0xB9, h185);
IDT_place(0xBA, h186);
IDT_place(0xBB, h187);
IDT_place(0xBC, h188);
IDT_place(0xBD, h189);
IDT_place(0xBE, h190);
IDT_place(0xBF, h191);
IDT_place(0xC0, h192);
IDT_place(0xC1, h193);
IDT_place(0xC2, h194);
IDT_place(0xC3, h195);
IDT_place(0xC4, h196);
IDT_place(0xC5, h197);
IDT_place(0xC6, h198);
IDT_place(0xC7, h199);
IDT_place(0xC8, h200);
IDT_place(0xC9, h201);
IDT_place(0xCA, h202);
IDT_place(0xCB, h203);
IDT_place(0xCC, h204);
IDT_place(0xCD, h205);
IDT_place(0xCE, h206);
IDT_place(0xCF, h207);
IDT_place(0xD0, h208);
IDT_place(0xD1, h209);
IDT_place(0xD2, h210);
IDT_place(0xD3, h211);
IDT_place(0xD4, h212);
IDT_place(0xD5, h213);
IDT_place(0xD6, h214);
IDT_place(0xD7, h215);
IDT_place(0xD8, h216);
IDT_place(0xD9, h217);
IDT_place(0xDA, h218);
IDT_place(0xDB, h219);
IDT_place(0xDC, h220);
IDT_place(0xDD, h221);
IDT_place(0xDE, h222);
IDT_place(0xDF, h223);
IDT_place(0xE0, h224);
IDT_place(0xE1, h225);
IDT_place(0xE2, h226);
IDT_place(0xE3, h227);
IDT_place(0xE4, h228);
IDT_place(0xE5, h229);
IDT_place(0xE6, h230);
IDT_place(0xE7, h231);
IDT_place(0xE8, h232);
IDT_place(0xE9, h233);
IDT_place(0xEA, h234);
IDT_place(0xEB, h235);
IDT_place(0xEC, h236);
IDT_place(0xED, h237);
IDT_place(0xEE, h238);
IDT_place(0xEF, h239);
IDT_place(0xF0, h240);
IDT_place(0xF1, h241);
IDT_place(0xF2, h242);
IDT_place(0xF3, h243);
IDT_place(0xF4, h244);
IDT_place(0xF5, h245);
IDT_place(0xF6, h246);
IDT_place(0xF7, h247);
IDT_place(0xF8, h248);
IDT_place(0xF9, h249);
IDT_place(0xFA, h250);
IDT_place(0xFB, h251);
IDT_place(0xFC, h252);
IDT_place(0xFD, h253);
IDT_place(0xFE, h254);
IDT_place(0xFF, h255);
}
/shark/tags/rel_0_5/oslib/xlib/exc.s
33,10 → 33,8
ASMFILE(Exc)
 
.globl SYMBOL_NAME(ll_irq_table)
.globl SYMBOL_NAME(ll_exc_table)
SYMBOL_NAME_LABEL(ll_irq_table) .space 64, 0
SYMBOL_NAME_LABEL(ll_exc_table) .space 64, 65
SYMBOL_NAME_LABEL(ll_irq_table) .space 1024, 0
 
.text
 
48,6 → 46,7
 
/* These are the hardware handlers; they all jump to ll_handler setting */
/* the interrupt number into EAX & save the registers on stack */
INT(0)
INT(1)
INT(2)
INT(3)
54,7 → 53,6
INT(4)
INT(5)
INT(6)
INT(7)
INT(8)
INT(9)
INT(10)
63,60 → 61,254
INT(13)
INT(14)
INT(15)
INT(16)
INT(17)
INT(18)
INT(19)
INT(20)
INT(21)
INT(22)
INT(23)
INT(24)
INT(25)
INT(26)
INT(27)
INT(28)
INT(29)
INT(30)
INT(31)
 
#if 0
/* MPF... If we have an external FPU, it will generate
* INT 13 instead of EXC 16...
* We must remap it to EXC 16...
*/
#if 1
SYMBOL_NAME_LABEL(h13_bis)
/* Send EOI for 8086 coprocessor trick */
/* Send 0H on Coprocessor port 0F0H */
pushl %eax
xorb %al, %al
outb %al, $0x0F0
movb $0x020, %al
outb %al, $0x0A0
outb %al, $0x020
popl %eax
movl $16, %eax
jmp ll_handler2
#else
SYMBOL_NAME_LABEL(h13_bis) pushal
/* Send EOI for 8086 coprocessor trick */
/* Send 0H on Coprocessor port 0F0H */
INT(32)
INT(33)
INT(34)
INT(35)
INT(36)
INT(37)
INT(38)
INT(39)
INT(40)
INT(41)
INT(42)
INT(43)
INT(44)
INT(45)
INT(46)
INT(47)
INT(48)
INT(49)
INT(50)
INT(51)
INT(52)
INT(53)
INT(54)
INT(55)
INT(56)
INT(57)
INT(58)
INT(59)
INT(60)
INT(61)
INT(62)
INT(63)
xorb %al,%al
outb %al,$0x0F0
movb $0x020,%al
outb %al,$0x0A0
outb %al,$0x020
pushl %ds
pushl %ss
pushl %es
pushl %fs
pushl %gs
movw $(X_FLATDATA_SEL),%ax
movw %ax,%es
movw %ax,%ds
movl $(MATH_EXC),%eax
pushl %eax
/* LL_ABORT OR EXC_HOOK?? */
/*THIS SURELY WRONG!!!! FIX IT!!!! Gerardo, help me!!! */
hlt
/* call SYMBOL_NAME(ll_abort) */
addl $4,%esp
popl %gs
popl %fs
popl %es
popl %ss
popl %ds
popal
ret
#endif
#endif
/* Master PIC... (int 0x40, see ll/i386/pic.h)*/
INT_1(64)
INT_1(65)
INT_1(66)
INT_1(67)
INT_1(68)
INT_1(69)
INT_1(70)
INT_1(71)
 
INT(72)
INT(73)
INT(74)
INT(75)
INT(76)
INT(77)
INT(78)
INT(79)
INT(80)
INT(81)
INT(82)
INT(83)
INT(84)
INT(85)
INT(86)
INT(87)
INT(88)
INT(89)
INT(90)
INT(91)
INT(92)
INT(93)
INT(94)
INT(95)
INT(96)
INT(97)
INT(98)
INT(99)
INT(100)
INT(101)
INT(102)
INT(103)
INT(104)
INT(105)
INT(106)
INT(107)
INT(108)
INT(109)
INT(110)
INT(111)
 
/* Slave PIC... (int 0x70, see ll/i386/pic.h)*/
INT_2(112)
INT_2(113)
INT_2(114)
INT_2(115)
INT_2(116)
INT_2(117)
INT_2(118)
INT_2(119)
 
INT(120)
INT(121)
INT(122)
INT(123)
INT(124)
INT(125)
INT(126)
INT(127)
INT(128)
INT(129)
INT(130)
INT(131)
INT(132)
INT(133)
INT(134)
INT(135)
INT(136)
INT(137)
INT(138)
INT(139)
INT(140)
INT(141)
INT(142)
INT(143)
INT(144)
INT(145)
INT(146)
INT(147)
INT(148)
INT(149)
INT(150)
INT(151)
INT(152)
INT(153)
INT(154)
INT(155)
INT(156)
INT(157)
INT(158)
INT(159)
INT(160)
INT(161)
INT(162)
INT(163)
INT(164)
INT(165)
INT(166)
INT(167)
INT(168)
INT(169)
INT(170)
INT(171)
INT(172)
INT(173)
INT(174)
INT(175)
INT(176)
INT(177)
INT(178)
INT(179)
INT(180)
INT(181)
INT(182)
INT(183)
INT(184)
INT(185)
INT(186)
INT(187)
INT(188)
INT(189)
INT(190)
INT(191)
INT(192)
INT(193)
INT(194)
INT(195)
INT(196)
INT(197)
INT(198)
INT(199)
INT(200)
INT(201)
INT(202)
INT(203)
INT(204)
INT(205)
INT(206)
INT(207)
INT(208)
INT(209)
INT(210)
INT(211)
INT(212)
INT(213)
INT(214)
INT(215)
INT(216)
INT(217)
INT(218)
INT(219)
INT(220)
INT(221)
INT(222)
INT(223)
INT(224)
INT(225)
INT(226)
INT(227)
INT(228)
INT(229)
INT(230)
INT(231)
INT(232)
INT(233)
INT(234)
INT(235)
INT(236)
INT(237)
INT(238)
INT(239)
INT(240)
INT(241)
INT(242)
INT(243)
INT(244)
INT(245)
INT(246)
INT(247)
INT(248)
INT(249)
INT(250)
INT(251)
INT(252)
INT(253)
INT(254)
INT(255)
 
/* The ll_handler process the request using the kernel function act_int() */
/* Then sends EOI & schedules any eventual new task! */
 
136,6 → 328,8
movw $(X_FLATDATA_SEL),%ax
movw %ax,%es
mov %ax,%ds
movw %ax, %fs
movw %ax, %gs
/* Now save the actual context on stack */
/* to pass it to _act_int (C caling convention) */
148,7 → 342,6
xorl %ebx, %ebx
movw %ss, %bx
/* We must switch to a ``safe stack'' */
#if 0
/*
* OK, this is the idea: in %esp we have the address of the
* stack pointer in the APPLICATION address space...
171,11 → 364,10
addl %ebx, %esp
/* Save EBX for returning to our stack... */
movw %ss, %dx
movw %ds, %bx
movw %bx, %ss
movw %ds, %cx
movw %cx, %ss
pushl %ebx
pushl %edx
#endif
pushl %eax
 
movl SYMBOL_NAME(ll_irq_table)(, %eax, 4), %ebx
182,20 → 374,10
call *%ebx
popl %ebx /* Store in EBX the Int number */
#if 0
popl %eax
popl %ecx /* We must subtract it from ESP...*/
subl %ecx, %esp
movw %ax, %ss
#endif
/* Send EOI to master & slave (if necessary) PIC */
movb $0x20,%al
cmpl $0x08,%ebx
jb eoi_master
eoi_slave: movl $0xA0,%edx
outb %al,%dx
eoi_master: movl $0x20,%edx
outb %al,%dx
/* Resume the return value of _act_int */
/* & do the context switch if necessary! */
214,40 → 396,88
popal
iret
ll_handler_master_pic:
/* We do not know what is the DS value */
/* Then we save it & set it correctly */
 
EXC(0)
EXC(1)
EXC(2)
EXC(3)
EXC(4)
EXC(5)
EXC(6)
EXC(8)
EXC(9)
EXC(10)
EXC(11)
EXC(12)
EXC(13)
EXC(14)
EXC(15)
EXC(16)
 
/* OK, this is Exception 7, and it is generated when an ESC or WAIT
* intruction is reached, and the MP and TS bits are set... Basically,
* it means that the FPU context must be switched
*/
SYMBOL_NAME_LABEL(exc7) pushal
pushl %ds
pushl %ss
pushl %es
pushl %fs
pushl %gs
/* But we first transfer to the _act_int */
/* the interrupt number which is required */
/* as second argument */
pushl %eax
movw $(X_FLATDATA_SEL),%ax
movw %ax,%es
movw %ax,%ds
mov %ax,%ds
movw %ax, %fs
movw %ax, %gs
/* Now save the actual context on stack */
/* to pass it to _act_int (C caling convention) */
/* CLD is necessary when calling a C function */
cld
call SYMBOL_NAME(ll_FPU_hook)
popl %gs
/* The following could be optimized a little... */
popl %eax
xorl %ebx, %ebx
movw %ss, %bx
/* We must switch to a ``safe stack'' */
/*
* OK, this is the idea: in %esp we have the address of the
* stack pointer in the APPLICATION address space...
* We assume that address spaces are implemented through segments...
* What we have to do is to add the segment base to %esp:
* - Load the GDT base in a register
* - Add DS * 8 to that value
* - Read the corresponding GDT entry (the segment descriptor)
* - Compute the base...
* It is (*p & 0xFC) | (*(p +1) & 0x0F) << 16) | *(p + 2)
*/
movl SYMBOL_NAME(GDT_base), %edi
addl %ebx, %edi
xorl %ebx, %ebx
movb 7(%edi), %bh
movb 4(%edi), %bl
shl $16, %ebx
movw 2(%edi), %bx
/* Is it correct? I think so... Test it!!! */
addl %ebx, %esp
/* Save EBX for returning to our stack... */
movw %ss, %dx
movw %ds, %cx
movw %cx, %ss
pushl %ebx
pushl %edx
pushl %eax
 
movl SYMBOL_NAME(ll_irq_table)(, %eax, 4), %ebx
call *%ebx
popl %ebx /* Store in EBX the Int number */
popl %eax
popl %ecx /* We must subtract it from ESP...*/
subl %ecx, %esp
movw %ax, %ss
/* Send EOI to master PIC */
movb $0x20,%al
movl $0x20,%edx
outb %al,%dx
 
/* Resume the return value of _act_int */
/* & do the context switch if necessary! */
#ifdef __VIRCSW__
movw SYMBOL_NAME(currCtx), %ax
cmpw JmpSel,%ax
je NoPreempt4
movw %ax,JmpSel
ljmp JmpZone
#endif
NoPreempt4: popl %gs
popl %fs
popl %es
popl %ss
255,21 → 485,47
popal
iret
ll_handler2:
ll_handler_slave_pic:
/* We do not know what is the DS value */
/* Then we save it & set it correctly */
pushl %ds
pushl %ss
pushl %es
pushl %fs
pushl %gs
/* But we first transfer to the _act_int */
/* the interrupt number which is required */
/* as second argument */
pushl %eax
movw $(X_FLATDATA_SEL),%ax
movw %ax,%ds
movw %ax,%es
mov %ax,%ds
movw %ax, %fs
movw %ax, %gs
 
/* Now save the actual context on stack */
/* to pass it to _act_int (C caling convention) */
/* CLD is necessary when calling a C function */
 
/* Again, the following could be optimized... */
/*
If the Exception raised in a different address space, we have to
access the task stack from the kernel address space (the linear one...)
*/
cld
/* The following could be optimized a little... */
popl %eax
xorl %ebx, %ebx
movw %ss, %bx
/* We must switch to a ``safe stack'' */
/*
* OK, this is the idea: in %esp we have the address of the
* stack pointer in the APPLICATION address space...
* We assume that address spaces are implemented through segments...
* What we have to do is to add the segment base to %esp:
* - Load the GDT base in a register
* - Add DS * 8 to that value
* - Read the corresponding GDT entry (the segment descriptor)
* - Compute the base...
* It is (*p & 0xFC) | (*(p +1) & 0x0F) << 16) | *(p + 2)
*/
movl SYMBOL_NAME(GDT_base), %edi
addl %ebx, %edi
xorl %ebx, %ebx
281,17 → 537,68
addl %ebx, %esp
/* Save EBX for returning to our stack... */
movw %ss, %dx
movw %ds, %bx
movw %bx, %ss
movw %ds, %cx
movw %cx, %ss
pushl %ebx
pushl %edx
pushl %eax
call *SYMBOL_NAME(ll_exc_table)(, %eax, 4)
addl $4,%esp
 
/* Restore the stack pointer!!! */
movl SYMBOL_NAME(ll_irq_table)(, %eax, 4), %ebx
call *%ebx
popl %ebx /* Store in EBX the Int number */
popl %eax
popl %ebx
popl %ecx /* We must subtract it from ESP...*/
subl %ecx, %esp
movw %ax, %ss
subl %ebx, %esp
/* Send EOI to master & slave PIC */
movb $0x20,%al
movl $0xA0,%edx
outb %al,%dx
movl $0x20,%edx
outb %al,%dx
 
/* Resume the return value of _act_int */
/* & do the context switch if necessary! */
#ifdef __VIRCSW__
movw SYMBOL_NAME(currCtx), %ax
cmpw JmpSel,%ax
je NoPreempt5
movw %ax,JmpSel
ljmp JmpZone
#endif
NoPreempt5: popl %gs
popl %fs
popl %es
popl %ss
popl %ds
popal
iret
 
 
 
 
/* OK, this is Exception 7, and it is generated when an ESC or WAIT
* intruction is reached, and the MP and TS bits are set... Basically,
* it means that the FPU context must be switched
*/
SYMBOL_NAME_LABEL(exc7) pushal
pushl %ds
pushl %ss
pushl %es
pushl %fs
pushl %gs
movw $(X_FLATDATA_SEL),%ax
movw %ax,%es
movw %ax,%ds
cld
call SYMBOL_NAME(ll_FPU_hook)
popl %gs
popl %fs
popl %es
popl %ss
popl %ds
popal
iret
/shark/tags/rel_0_5/oslib/xlib/vm86.c
27,10 → 27,12
* native VBE compliant Video card, without writing an explicit driver
*/
 
#include <ll/i386/hw-data.h>
#include <ll/i386/hw-instr.h>
#include <ll/i386/hw-func.h>
#include <ll/i386/mem.h>
#include <ll/i386/x-bios.h>
#include <ll/i386/hw-func.h>
#include <ll/i386/hw-instr.h>
#include <ll/i386/x-dosmem.h>
#include <ll/i386/cons.h>
#include <ll/i386/error.h>
 
44,6 → 46,8
 
#define VM86_STACK_SIZE 1024
 
extern DWORD ll_irq_table[256];
 
/* TSS optional section */
static BYTE vm86_stack0[VM86_STACK_SIZE];
 
55,9 → 59,8
static LIN_ADDR vm86_iretAddress;
 
 
DWORD *GLOBesp;
struct registers *global_regs;
 
 
#ifdef __DUMB_CODE__
static LIN_ADDR vm86_code;
static BYTE prova86[] = {
76,8 → 79,7
#endif
0xcf, /* iret */
0xf4, /* hlt */
0
};
0};
#endif
 
#ifdef __LL_DEBUG__
89,17 → 91,21
0xb0, '%', /* mov ax,'%' */
0x88, 0x05, /* mov ds:[di],al */
0x1f, /* pop ds */
0xcd, 0x48
}; /* int 0x48 */
0xcd, 0x48}; /* int 0x48 */
#else
static BYTE vm86_retAddr[] = { 0xcd, 0x48 }; /* int 48h */
#endif
 
TSS *vm86_get_tss(void)
{
return &(vm86_TSS.t);
}
 
/* This is the return point from V86 mode, called through int 0x48
* (see vm86-exc.s). We double check that this function is called in
* the V86 TSS. Otherwise, Panic!!!
*/
void vm86_return(DWORD * tos)
void vm86_return(DWORD n, struct registers r)
{
CONTEXT c = get_TR();
#ifdef __LL_DEBUG__
109,7 → 115,7
/* message("Gotta code=%d [0 called from GPF/1 int 0x48]\n",code);*/
#endif
if (c == X_VM86_TSS) {
GLOBesp = tos;
global_regs = &r;
#ifdef __LL_DEBUG__
message("TSS CS=%x IP=%lx\n", vm86_TSS.t.cs, vm86_TSS.t.eip);
message("Switching to %x\n", vm86_TSS.t.back_link);
116,9 → 122,8
a = (DWORD) (vm86_iretAddress);
cs = (a & 0xFF000) >> 4;
eip = (a & 0xFFF);
message("Real-Mode Address is CS=%lx IP=%lx\nLinear=%lx\n", cs,
eip, a);
esp = (void *) (tos);
message("Real-Mode Address is CS=%lx IP=%lx\nLinear=%lx\n",cs,eip,a);
esp = /* (void *)(tos)*/ 0x69;
message("Stack frame: %p %lx %lx\n",
esp, vm86_TSS.t.esp0, vm86_TSS.t.esp);
message("%lx ", lmempeekd(esp)); /* bp */
143,6 → 148,7
#endif
ll_context_load(vm86_TSS.t.back_link);
}
message("Here?\n");
halt();
}
 
171,7 → 177,7
int register i;
 
/* Init the DOS memory allocator */
// DOS_mem_init();
DOS_mem_init();
 
/* First of all, we need to setup a GDT entries to
* allow vm86 task execution. We just need a free 386 TSS, which
180,8 → 186,12
*/
GDT_place(X_VM86_TSS, (DWORD) (&vm86_TSS),
sizeof(vm86_TSS), FREE_TSS386, GRAN_16);
IDT_place(0x48, vm86_exc);
 
/* HACKME!!! */
// IDT_place(0x48,vm86_exc);
l1_int_bind(0x48, vm86_return);
// ll_irq_table[0x48] = (DWORD)vm86_return;
 
/* Prepare a real-mode stack, obtaining it from the
* DOS memory allocator!
* 8K should be OK! Stack top is vm86_stack + SIZE!
196,7 → 206,7
vm86_iretAddress = DOS_alloc(sizeof(vm86_retAddr));
memcpy(vm86_iretAddress, vm86_retAddr, sizeof(vm86_retAddr));
#ifdef __LL_DEBUG__
message("PM reentry linear address=%p\n", vm86_iretAddress);
message("PM reentry linear address=0x%lx\n", (DWORD)vm86_iretAddress);
#endif
#ifdef __DUMB_CODE__
vm86_code = DOS_alloc(2048);
222,13 → 232,11
*/
vm86_TSS.t.io_base = (DWORD) (&(vm86_TSS.io_map)) -
(DWORD) (&(vm86_TSS));
for (i = 0; i < 2047; i++)
vm86_TSS.io_map[i] = 0;
for (i = 0; i < 2047; i++) vm86_TSS.io_map[i] = 0;
vm86_TSS.io_map[2047] = 0xFF000000;
}
 
int vm86_callBIOS(int service, X_REGS16 * in, X_REGS16 * out,
X_SREGS16 * s)
int vm86_callBIOS(int service,X_REGS16 *in,X_REGS16 *out,X_SREGS16 *s)
{
DWORD vm86_tmpAddr;
DWORD vm86_flags, vm86_cs, vm86_ip;
235,8 → 243,7
LIN_ADDR vm86_stackPtr;
DWORD *IRQTable_entry;
 
if (service < 0x10 || in == NULL)
return -1;
if (service < 0x10 || in == NULL) return -1;
/* Setup the stack frame */
vm86_tmpAddr = (DWORD) (vm86_stack);
vm86_TSS.t.ss = (vm86_tmpAddr & 0xFF000) >> 4;
253,8 → 260,7
lmempokew(vm86_stackPtr - 2, vm86_flags);
#ifdef __LL_DEBUG__
message("Stack: %lx SS: %lx SP: %lx\n",
vm86_tmpAddr + VM86_STACK_SIZE, (DWORD) vm86_TSS.t.ss,
vm86_TSS.t.esp);
vm86_tmpAddr + VM86_STACK_SIZE,(DWORD)vm86_TSS.t.ss,vm86_TSS.t.esp);
#endif
/* Wanted VM86 mode + IOPL = 3! */
vm86_TSS.t.eflags = CPU_FLAG_VM | CPU_FLAG_IOPL;
302,7 → 308,7
vm86_TSS.t.cs = ((IRQTable_entry[service]) & 0xFFFF0000) >> 16;
vm86_TSS.t.eip = ((IRQTable_entry[service]) & 0x0000FFFF);
#ifdef __LL_DEBUG__
message("CS:%hx IP:%lx\n", vm86_TSS.t.cs, vm86_TSS.t.eip);
message("CS:%x IP:%lx\n", vm86_TSS.t.cs, vm86_TSS.t.eip);
#endif
/* Let's use the ll standard call... */
vm86_TSS.t.back_link = ll_context_save();
310,13 → 316,10
#ifdef __LL_DEBUG__
message("I am back...\n");
message("TSS CS=%hx IP=%lx\n", vm86_TSS.t.cs, vm86_TSS.t.eip);
{
char *xp = (char *) (vm86_iretAddress + 0xe);
{ char *xp = (char *)(vm86_iretAddress + 0xe);
message("PM reentry linear address=%p\n", vm86_iretAddress);
message("Executing code: %x ", (unsigned char) (*xp));
xp++;
message("%x\n", (unsigned char) (*xp));
}
message("Executing code: %x ",(unsigned char)(*xp)); xp++;
message("%x\n",(unsigned char)(*xp));}
#endif
/* Send back in the X_*REGS structure the value obtained with
* the real-mode interrupt call
332,22 → 335,22
out->x.cflag = (WORD)vm86_TSS.t.eflags;
*/
#ifdef __LL_DEBUG__
#error Fix the following: use global_regs->xxx ???
message("%x\n", (WORD) * (GLOBesp));
message("%x\n", (WORD) * (GLOBesp + 1));
/*EDI*/ message("%x\n", (WORD) * (GLOBesp + 2));
/*ESI*/ message("%x\n", (WORD) * (GLOBesp + 3));
/*EBP*/ message("%x\n", (WORD) * (GLOBesp + 4));
/*ESP*/ message("%x\n", (WORD) * (GLOBesp + 5));
/*EBX*/ message("%x\n", (WORD) * (GLOBesp + 6));
/*EDX*/
message("%x\n", (WORD)*(GLOBesp+1)); /*EDI*/
message("%x\n", (WORD)*(GLOBesp+2)); /*ESI*/
message("%x\n", (WORD)*(GLOBesp+3)); /*EBP*/
message("%x\n", (WORD)*(GLOBesp+4)); /*ESP*/
message("%x\n", (WORD)*(GLOBesp+5)); /*EBX*/
message("%x\n", (WORD)*(GLOBesp+6)); /*EDX*/
#endif
out->x.ax = (WORD) * (GLOBesp + 8);
out->x.bx = (WORD) * (GLOBesp + 5);
out->x.cx = (WORD) * (GLOBesp + 7);
out->x.dx = (WORD) * (GLOBesp + 6);
out->x.si = (WORD) * (GLOBesp + 2);
out->x.di = (WORD) * (GLOBesp + 1);
out->x.cflag = (WORD) * (GLOBesp);
out->x.ax = global_regs->eax;
out->x.bx = global_regs->ebx;
out->x.cx = global_regs->ecx;
out->x.dx = global_regs->edx;
out->x.si = global_regs->esi;
out->x.di = global_regs->edi;
out->x.cflag = global_regs->flags;
}
if (s != NULL) {
s->es = vm86_TSS.t.es;
/shark/tags/rel_0_5/oslib/xlib/x0.s
153,23 → 153,27
*/
/* Test if GDT is usable */
movl %gs:0(%ebx),%ecx
andl $0x080,%ecx
jnz GDT_is_OK
/*
* Fix the X_RM_BACK_GATE with the address of halt()
*/
 
/* Now I test if the check mechanism is OK... */
andl $0x0200,%ecx /* MB_INFO_BOOT_LOADER_NAME */
movl $0xB8000,%edi
addl $150,%edi
movb $'1',%gs:0(%edi)
incl %edi
movb $6,%gs:0(%edi)
jz GDT_is_not_OK
incl %edi
movb $'2',%gs:0(%edi)
incl %edi
movb $6,%gs:0(%edi)
 
movl %gs:64(%ebx), %ebp /* Name Address... */
cmpb $'X', %gs:0(%ebp)
je GDT_is_OK
GDT_is_not_OK:
/*
* Fix the X_RM_BACK_GATE with the address of halt()
*/
 
/* Now I test if the check mechanism is OK... */
movl $SYMBOL_NAME(halt),%eax
movw %ax,%gs:rmBckGateFix1
shrl $16,%eax
/shark/tags/rel_0_5/oslib/xlib/ctx.s
25,8 → 25,6
#include <ll/i386/linkage.h>
#include <ll/i386/defs.h>
 
#include <ll/sys/ll/exc.h>
 
.data
 
ASMFILE(Context)
/shark/tags/rel_0_5/oslib/xlib/xdosf.c
47,7 → 47,6
/* The Last DOS Error occurred! */
static unsigned _DOS_error = 0;
 
#ifdef __NOH4__
 
int DOS_init(void)
{
58,8 → 57,6
return 1;
}
 
#endif
 
unsigned DOS_error(void)
{
unsigned v = _DOS_error;
80,12 → 77,9
 
for (i = 0; busy[i] && i < DOS_MAXDESCR; i++);
/* Return NULL if no descriptor is available... */
if (i == DOS_MAXDESCR)
return (NULL);
if (i == DOS_MAXDESCR) return(NULL);
/* Otherwise, lock the descriptor & remember the index */
f = &DOS_descr[i];
busy[i] = 1;
f->index = i;
f = &DOS_descr[i]; busy[i] = 1; f->index = i;
/* Allocate a DOS buffer for the file name */
f->n1 = DOS_alloc(80);
strcpy(f->n2, name);
97,7 → 91,8
f->mode = DOS_READ;
ir.h.ah = 0x3D;
ir.h.al = f->mode;
} else if (mode[0] == 'w') {
}
else if (mode[0] == 'w') {
/* DOS Call: Intr 0x21
AH = 0x3C - Create a file
AL = File attribute [0x20 = Standard,r/w,archive]
138,8 → 133,7
X_REGS16 ir, or;
X_SREGS16 sr;
 
if (f == NULL || busy[f->index] == 0)
return;
if (f == NULL || busy[f->index] == 0) return;
/* DOS Call: Intr 0x21
AH = 0x3E - Close a file
BX = File handle
162,10 → 156,8
 
while (done == 0) {
/* Fragment the read operation ... */
if (count > DOS_BUFSIZE)
chunk = DOS_BUFSIZE;
else
chunk = count;
if (count > DOS_BUFSIZE) chunk = DOS_BUFSIZE;
else chunk = count;
/* DOS Call: Intr 0x21
AH = 0x3F - Read data using a file handle
BX = File handle
190,8 → 182,7
Finish if we have read all the data or
if we have read less data than how expected
*/
if (now == size * num || or.x.ax != chunk)
done = 1;
if (now == size*num || or.x.ax != chunk) done = 1;
} else {
done = -1;
_DOS_error = or.x.ax;
210,10 → 201,8
 
while (done == 0) {
/* Fragment the write operation ... */
if (count > DOS_BUFSIZE)
chunk = DOS_BUFSIZE;
else
chunk = count;
if (count > DOS_BUFSIZE) chunk = DOS_BUFSIZE;
else chunk = count;
/* Copy data from application buffer */
memcpy(f->buf, buf, chunk);
/* DOS Call: Intr 0x21
234,8 → 223,7
count -= or.x.ax;
buf += or.x.ax;
now += or.x.ax;
if (now == size * num || or.x.ax != chunk)
done = 1;
if (now == size*num || or.x.ax != chunk) done = 1;
} else {
done = -1;
_DOS_error = or.x.ax;
243,3 → 231,4
}
return (now);
}
 
/shark/tags/rel_0_5/oslib/xlib/fpu.c
1,4 → 1,3
 
/* Project: OSLib
* Description: The OS Construction Kit
* Date: 1.6.2000
27,6 → 26,7
 
#include <ll/i386/hw-data.h>
#include <ll/i386/hw-instr.h>
#include <ll/i386/hw-func.h>
#include <ll/i386/mem.h>
 
#include <ll/i386/tss-ctx.h>
33,7 → 33,7
 
FILE(FPU);
 
extern TSS TSS_table[];
extern TSS main_tss;
 
BYTE LL_FPU_savearea[FPU_CONTEXT_SIZE]; /* Global FPU scratch SaveArea */
#ifdef __FPU_DEBUG__
41,7 → 41,7
#endif
 
/* FPU context management */
static CONTEXT LL_has_FPU = TSSMain;
static TSS *LL_has_FPU = &main_tss;
 
/* As the 8086 does not have an hardware mechanism to support task */
/* switch, also the FPU context switch is implemented via software. */
51,12 → 51,17
 
void ll_FPU_hook(void)
{
CONTEXT current;
TSS *base;
 
current = get_TR();
base = (TSS *)GDT_read(current, NULL, NULL, NULL);
 
clts();
#ifdef __FPU_DEBUG__
ndp_called++;
#endif
if (LL_has_FPU == TSSsel2index(get_TR()))
return;
if (LL_has_FPU == base) return;
#ifdef __FPU_DEBUG__
ndp_switched++;
#endif
63,17 → 68,15
 
#if 0
LL_FPU_save();
memcpy(TSS_table[LL_has_FPU].ctx_FPU, LL_FPU_savearea,
FPU_CONTEXT_SIZE);
memcpy(TSS_table[LL_has_FPU].ctx_FPU,LL_FPU_savearea,FPU_CONTEXT_SIZE);
#else
save_fpu(&(TSS_table[LL_has_FPU]));
save_fpu(LL_has_FPU);
#endif
 
LL_has_FPU = TSSsel2index(get_TR());
LL_has_FPU = base;
 
#if 1
memcpy(LL_FPU_savearea, TSS_table[LL_has_FPU].ctx_FPU,
FPU_CONTEXT_SIZE);
memcpy(LL_FPU_savearea, base->ctx_FPU, FPU_CONTEXT_SIZE);
LL_FPU_restore();
#else
restore_fpu(&(TSS_table[LL_has_FPU]));
81,7 → 84,7
return;
}
 
CONTEXT LL_FPU_get_task(void)
TSS *LL_FPU_get_task(void)
{
return (LL_has_FPU);
}
/shark/tags/rel_0_5/oslib/xlib/ccpu.c
27,8 → 27,7
 
FILE(Cpu - C);
 
INLINE_OP void cpuid(DWORD a, DWORD * outa, DWORD * outb, DWORD * outc,
DWORD * outd)
INLINE_OP void cpuid(DWORD a, DWORD *outa, DWORD *outb, DWORD *outc, DWORD *outd)
{
#ifdef __OLD_GNU__
__asm__ __volatile__(".byte 0x0F,0xA2"
36,7 → 35,10
__asm__ __volatile__("cpuid"
#endif
:"=a"(*outa),
"=b"(*outb), "=c"(*outc), "=d"(*outd):"a"(a));
"=b" (*outb),
"=c" (*outc),
"=d" (*outd)
: "a" (a));
}
 
void X86_get_CPU(struct ll_cpuInfo *p)
53,11 → 55,13
p->X86_cpuIdFlag = 1;
p->X86_cpu = 5;
cpuid(0, &tmp, &(p->X86_vendor_1),
&(p->X86_vendor_3), &(p->X86_vendor_2));
&(p->X86_vendor_3),
&(p->X86_vendor_2));
if (tmp >= 1) {
cpuid(1, &(p->X86_signature),
&(p->X86_IntelFeature_1),
&(p->X86_IntelFeature_2), &(p->X86_StandardFeature));
&(p->X86_IntelFeature_2),
&(p->X86_StandardFeature));
}
} else {
p->X86_cpu = 4;
/shark/tags/rel_0_5/oslib/xlib/xdosm.c
53,14 → 53,13
{
register int i;
for (i = 0; i < MAX_PARTITION; i++) {
if (mem_table[i].used)
message("(%d) Addr : %p Size : %lu/%lx\n",
if (mem_table[i].used) message("(%d) Addr : %p Size : %lu/%lx\n",
i, mem_table[i].addr,
mem_table[i].size, mem_table[i].size);
}
}
 
void DOS_mem_init(void)
__attribute__ ((weak)) void DOS_mem_init(void)
{
register int i;
 
67,14 → 66,13
if (inited == 0) {
mem_table[0].used = TRUE;
X_meminfo(NULL, NULL, &(mem_table[0].addr), &(mem_table[0].size));
for (i = 1; i < MAX_PARTITION; i++)
mem_table[i].used = FALSE;
for (i = 1; i < MAX_PARTITION; i++) mem_table[i].used = FALSE;
} else {
inited = 1;
}
}
 
LIN_ADDR DOS_alloc(DWORD s)
__attribute__ ((weak)) LIN_ADDR DOS_alloc(DWORD s)
{
LIN_ADDR p = 0;
int i = 0;
82,20 → 80,19
while (i < MAX_PARTITION && p == NULL) {
if (mem_table[i].used && (mem_table[i].size >= s))
p = mem_table[i].addr;
else
i++;
else i++;
}
if (p != 0) {
if (mem_table[i].size > s) {
mem_table[i].size -= s;
mem_table[i].addr += s;
} else
mem_table[i].used = FALSE;
}
else mem_table[i].used = FALSE;
}
return (p);
}
 
int DOS_free(LIN_ADDR p, DWORD s)
__attribute__ ((weak)) int DOS_free(LIN_ADDR p,DWORD s)
{
register int i = 1;
unsigned i1 = 0, i2 = 0;
102,10 → 99,8
 
while (i < MAX_PARTITION && ((i1 == 0) || (i2 == 0))) {
if (mem_table[i].used) {
if (mem_table[i].addr + mem_table[i].size == p)
i1 = i;
if (mem_table[i].addr == p + s)
i2 = i;
if (mem_table[i].addr + mem_table[i].size == p) i1 = i;
if (mem_table[i].addr == p + s) i2 = i;
}
i++;
}
112,17 → 107,16
if (i1 != 0 && i2 != 0) {
mem_table[i1].size += mem_table[i2].size + s;
mem_table[i2].used = FALSE;
} else if (i1 == 0 && i2 != 0) {
}
else if (i1 == 0 && i2 != 0) {
mem_table[i2].addr = p;
mem_table[i2].size += s;
} else if (i1 != 0 && i2 == 0)
mem_table[i1].size += s;
}
else if (i1 != 0 && i2 == 0) mem_table[i1].size += s;
else {
i = 0;
while (i < MAX_PARTITION && (mem_table[i].used == TRUE))
i++;
if (i == MAX_PARTITION)
return (FALSE);
while (i < MAX_PARTITION && (mem_table[i].used == TRUE)) i++;
if (i == MAX_PARTITION) return(FALSE);
mem_table[i].addr = p;
mem_table[i].size = s;
mem_table[i].used = TRUE;
/shark/tags/rel_0_5/oslib/xlib/irq.c
22,6 → 22,7
/* PIC management code & data */
 
#include <ll/i386/hw-instr.h>
#include <ll/i386/pic.h>
 
FILE(IRQ);
 
41,8 → 42,6
#define OCW2_S 0x0A0
#define OCW3_S 0x0A0
 
#define PIC1_BASE 0x040 /* Interrupt base for each PIC in HARTIK 3.0 */
#define PIC2_BASE 0x070
#define EOI 0x020 /* End Of Interrupt code for PIC! */
 
#define bit_on(v,b) ((v) |= (1 << (b)))
49,8 → 48,8
#define bit_off(v,b) ((v) &= ~(1 << (b)))
 
/* PIC interrupt mask */
BYTE ll_PIC_master_mask = 0xFE;
BYTE ll_PIC_slave_mask = 0xFE;
BYTE ll_PIC_master_mask = 0xFF;
BYTE ll_PIC_slave_mask = 0xFF;
 
 
void PIC_init(void)
85,9 → 84,6
 
void irq_mask(WORD irqno)
{
/* Cannot mask timer interrupt! */
if (irqno == 0)
return;
/* Interrupt is on master PIC */
if (irqno < 8) {
bit_on(ll_PIC_master_mask, irqno);
107,9 → 103,6
 
void irq_unmask(WORD irqno)
{
/* It is a nonsense to unmask the timer interrupt */
if (irqno == 0)
return;
/* Interrupt is on master PIC */
if (irqno < 8) {
bit_off(ll_PIC_master_mask, irqno);
/shark/tags/rel_0_5/oslib/xlib/xinit.c
33,82 → 33,39
 
FILE(X - Init);
 
extern DWORD ll_irq_table[16];
extern DWORD ll_exc_table[16];
extern DWORD ll_irq_table[256];
 
#ifdef __VIRCSW__
int activeInt = 0;
#endif
 
/* Architecture definition */
LL_ARCH ll_arch;
 
/* These are declared in llCx32b.C */
TSS TSS_table[TSSMax];
WORD TSS_control[TSSMax];
BYTE ll_FPU_stdctx[FPU_CONTEXT_SIZE];
 
/* The following stuff is in llCxA.Asm/S */
 
/* Assembly external routines! */
/* Setup the TR register of the 80386, to initialize context switch */
 
extern void init_TR(WORD v);
TSS main_tss;
 
/* ll hardware interrupt hooks */
extern void h1(void);
extern void h2(void);
extern void h3(void);
extern void h4(void);
extern void h5(void);
extern void h6(void);
extern void h7(void);
extern void h8(void);
extern void h9(void);
extern void h10(void);
extern void h11(void);
extern void h12(void);
extern void h13(void);
extern void h13_bis(void);
extern void h14(void);
extern void h15(void);
/* Architecture definition */
LL_ARCH ll_arch;
 
/* ll hardware exception hooks */
/* In llCtx1.Asm/s */
extern void exc0(void);
extern void exc1(void);
extern void exc2(void);
extern void exc3(void);
extern void exc4(void);
extern void exc5(void);
extern void exc6(void);
extern void exc7(void);
extern void exc8(void);
extern void exc9(void);
extern void exc10(void);
extern void exc11(void);
extern void exc12(void);
extern void exc13(void);
extern void exc14(void);
extern void exc15(void);
extern void exc16(void);
/* The following stuff is in llCxA.Asm/S */
 
static void dummyfun(int i)
{
cputs("Unhandled Exc or Int occured!!!\n");
/*
#if 0
if (i < 32) {
cputs("Unhandled Exc occured!!!\n");
} else {
cputs("Unhandled Int occured!!!\n");
}
#else
message("Unhandled Exc or Int %d occured!!!\n", i);
*/
#endif
halt();
}
 
void l1_exc_bind(int i, void (*f) (int n))
void l1_int_bind(int i, void *f)
{
ll_exc_table[i] = (DWORD) f;
}
 
void l1_irq_bind(int i, void (*f) (int n))
{
ll_irq_table[i] = (DWORD) f;
}
 
116,19 → 73,12
{
register int i;
struct ll_cpuInfo cpuInfo;
extern BYTE X86_fpu;
LIN_ADDR b;
extern BYTE X86_fpu;
 
TSS dummy_tss; /* Very dirty, but we need it, in order to
get an initial value for the FPU
context...
*/
 
 
/* First of all, init the exc and irq tables... */
for (i = 0; i < 16; i++) {
for(i = 0; i < 256; i++) {
ll_irq_table[i] = (DWORD) dummyfun;
ll_exc_table[i] = (DWORD) dummyfun;
}
 
X86_get_CPU(&cpuInfo);
151,78 → 101,8
message("Features #3: 0x%lx\n", cpuInfo.X86_StandardFeature);
#endif /* __LL_DEBUG__ */
 
/* Insert the Exceptions handler into IDT */
IDT_place(0x00, exc0);
IDT_place(0x01, exc1);
IDT_place(0x02, exc2);
IDT_place(0x03, exc3);
IDT_place(0x04, exc4);
IDT_place(0x05, exc5);
IDT_place(0x06, exc6);
IDT_place(0x07, exc7);
IDT_place(0x08, exc8);
IDT_place(0x09, exc9);
IDT_place(0x0A, exc10);
IDT_place(0x0B, exc11);
IDT_place(0x0C, exc12);
IDT_place(0x0D, exc13);
IDT_place(0x0E, exc14);
IDT_place(0x0F, exc15);
IDT_place(0x10, exc16);
/* Insert HW timer handler into IDT */
/* Now it is done in event.c
IDT_place(0x40,ll_timer);
*/
IDT_place(0x41, h1);
IDT_place(0x42, h2);
IDT_place(0x43, h3);
IDT_place(0x44, h4);
IDT_place(0x45, h5);
IDT_place(0x46, h6);
IDT_place(0x47, h7);
IDT_place(0x70, h8);
IDT_place(0x71, h9);
IDT_place(0x72, h10);
IDT_place(0x73, h11);
IDT_place(0x74, h12);
IDT_init();
 
#if 0
/* If FPU is on-chip IRQ #13 is free to use */
/* Else IRQ #13 vectors the coprocessor errors */
if (check_fpu())
ll_arch.x86.capabilities |= LL_X86_INTERNAL_FPU;
 
#ifdef __LL_DEBUG__
message("Check FPU : %s\n",
ll_arch.x86.
capabilities & LL_X86_INTERNAL_FPU ? "Internal" : "External");
#endif
 
if (ll_arch.x86.capabilities & LL_X86_INTERNAL_FPU) {
/* Install the generic handler */
IDT_place(0x75, h13);
} else {
/* Install the external FPU error handler */
IDT_place(0x75, h13_bis);
irq_unmask(13);
}
#else
IDT_place(0x75, h13);
#endif
IDT_place(0x76, h14);
IDT_place(0x77, h15);
 
/* Init TSS table & put the corrispondent selectors into GDT */
TSS_control[TSSMain] |= TSS_USED;
for (i = 0; i < TSSMax; i++) {
/* b = appl2linear(&TSS_table[i]); */
b = (LIN_ADDR) (&TSS_table[i]);
GDT_place(TSSindex2sel(i), (DWORD) b, sizeof(TSS), FREE_TSS386,
GRAN_16);
}
/* Set the TR initial value */
init_TR(TSSindex2sel(TSSMain));
 
/* Init coprocessor & assign it to main() */
/* OK... Now I know the sense of all this... :
We need a initial value for the FPU context (to be used for creating
230,18 → 110,16
... And we get it in this strange way!!!!
*/
reset_fpu();
#if 0
ll_FPU_save();
memcpy(ll_FPU_stdctx, ll_FPU_savearea, FPU_CONTEXT_SIZE);
#else
save_fpu(&dummy_tss); /* OK??? */
memcpy(ll_FPU_stdctx, dummy_tss.ctx_FPU, FPU_CONTEXT_SIZE);
#endif
init_fpu();
 
/* Init PIC controllers & unmask timer */
PIC_init();
 
/* Set the TR initial value */
b = (LIN_ADDR)(&main_tss);
GDT_place(MAIN_SEL, (DWORD)b, sizeof(TSS), FREE_TSS386, GRAN_16);
init_TR(MAIN_SEL);
return mbi_address();
}
 
/shark/tags/rel_0_5/oslib/xlib/makefile
2,11 → 2,11
# Makefile for GNU MAKE & GCC 2.8.0
 
ifndef BASE
BASE = ../..
BASEDOS = ..\..
BASE = ..
BASEDOS = ..
endif
 
include $(BASE)/config/config.mk
include $(BASE)/config.mk
 
C_OPT += -D__VIRCSW__
ASM_OPT += -D__VIRCSW__
19,16 → 19,17
xsystab.o \
xconv.o \
xdosf.o \
xdosm.o \
ccpu.o \
fpu.o \
irq.o \
ctxsw.o \
xinit.o \
idtinit.o \
vm86.o \
xbios.o
#xdosm.o
 
GNU_S_OBJS = xsys0.o cpu2.o exc.o ctx.o vm86-exc.o mem.o
GNU_S_OBJS = xsys0.o cpu2.o exc.o ctx.o mem.o
#GNU_C_OBJS = gnucomp.o
 
OBJS = $(GNU_S_OBJS) $(GNU_C_OBJS) $(COMMON_OBJS)
57,11 → 58,11
 
allclean :
echo # XTN Library dependencies > deps
$(RM) $(BASE)\lib\libhx.a
$(RM) $(BASE)\lib\x0.o
$(RM) $(LIB_PATH)libhx.a
$(RM) $(LIB_PATH)x0.o
 
deps: $(COMMON_OBJS:.o=.c) $(patsubst %.o,gnu/%.c,$(GNU_C_OBJS))
$(CC) $(C_OPT) $(VMINCL) -M $(COMMON_OBJS:.o=.c) $(patsubst %.o,gnu/%.c,$(GNU_C_OBJS)) > deps
$(CC) $(C_OPT) -M $(COMMON_OBJS:.o=.c) $(patsubst %.o,gnu/%.c,$(GNU_C_OBJS)) > deps
 
#
# The library!!
/shark/tags/rel_0_5/oslib/xlib/xsystab.c
23,7 → 23,6
 
#include <ll/i386/cons.h>
#include <ll/i386/mem.h>
#include <ll/math.h>
 
FILE(X - SysTab);
 
87,9 → 86,7
*lim <<= 16;
*lim |= x.d.lim_lo;
}
if (acc != NULL)
*acc = x.d.access;
if (gran != NULL)
*gran = x.d.gran & 0xF0;
if (acc != NULL) *acc = x.d.access;
if (gran != NULL) *gran = x.d.gran & 0xF0;
return (base);
}