| 1,104 → 1,31 |
|---|
| #ifndef __ASM_APIC_H |
| #define __ASM_APIC_H |
| #ifndef __ASM_MACH_APIC_H |
| #define __ASM_MACH_APIC_H |
| |
| #include <linux/config.h> |
| #include <linux/pm.h> |
| #include <asm/fixmap.h> |
| #include <asm/apicdef.h> |
| #include <asm/system.h> |
| #include <asm/genapic.h> |
| |
| #define APIC_DEBUG 0 |
| #define esr_disable (genapic->esr_disable) |
| #define NO_BALANCE_IRQ (genapic->no_balance_irq) |
| #define NO_IOAPIC_CHECK (genapic->no_ioapic_check) |
| #define APIC_BROADCAST_ID (genapic->apic_broadcast_id) |
| #define INT_DELIVERY_MODE (genapic->int_delivery_mode) |
| #define INT_DEST_MODE (genapic->int_dest_mode) |
| #define TARGET_CPUS (genapic->target_cpus()) |
| #define apic_id_registered (genapic->apic_id_registered) |
| #define apic_id_registered (genapic->apic_id_registered) |
| #define init_apic_ldr (genapic->init_apic_ldr) |
| #define ioapic_phys_id_map (genapic->ioapic_phys_id_map) |
| #define clustered_apic_check (genapic->clustered_apic_check) |
| #define multi_timer_check (genapic->multi_timer_check) |
| #define apicid_to_node (genapic->apicid_to_node) |
| #define cpu_to_logical_apicid (genapic->cpu_to_logical_apicid) |
| #define cpu_present_to_apicid (genapic->cpu_present_to_apicid) |
| #define apicid_to_cpu_present (genapic->apicid_to_cpu_present) |
| #define mpc_apic_id (genapic->mpc_apic_id) |
| #define setup_portio_remap (genapic->setup_portio_remap) |
| #define check_apicid_present (genapic->check_apicid_present) |
| #define check_phys_apicid_present (genapic->check_phys_apicid_present) |
| #define check_apicid_used (genapic->check_apicid_used) |
| #define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid) |
| #define enable_apic_mode (genapic->enable_apic_mode) |
| |
| #if APIC_DEBUG |
| #define Dprintk(x...) printk(x) |
| #else |
| #define Dprintk(x...) |
| #endif |
| |
| #ifdef CONFIG_X86_LOCAL_APIC |
| |
| /* |
| * Basic functions accessing APICs. |
| */ |
| |
| static __inline void apic_write(unsigned long reg, unsigned long v) |
| { |
| *((volatile unsigned long *)(APIC_BASE+reg)) = v; |
| } |
| |
| static __inline void apic_write_atomic(unsigned long reg, unsigned long v) |
| { |
| xchg((volatile unsigned long *)(APIC_BASE+reg), v); |
| } |
| |
| static __inline unsigned long apic_read(unsigned long reg) |
| { |
| return *((volatile unsigned long *)(APIC_BASE+reg)); |
| } |
| |
| static __inline__ void apic_wait_icr_idle(void) |
| { |
| do { } while ( apic_read( APIC_ICR ) & APIC_ICR_BUSY ); |
| } |
| |
| #ifdef CONFIG_X86_GOOD_APIC |
| # define FORCE_READ_AROUND_WRITE 0 |
| # define apic_read_around(x) |
| # define apic_write_around(x,y) apic_write((x),(y)) |
| #else |
| # define FORCE_READ_AROUND_WRITE 1 |
| # define apic_read_around(x) apic_read(x) |
| # define apic_write_around(x,y) apic_write_atomic((x),(y)) |
| #endif |
| |
| static inline void ack_APIC_irq(void) |
| { |
| /* |
| * ack_APIC_irq() actually gets compiled as a single instruction: |
| * - a single rmw on Pentium/82489DX |
| * - a single write on P6+ cores (CONFIG_X86_GOOD_APIC) |
| * ... yummie. |
| */ |
| |
| /* Docs say use 0 for future compatibility */ |
| apic_write_around(APIC_EOI, 0); |
| } |
| |
| extern void (*wait_timer_tick)(void); |
| |
| extern int get_maxlvt(void); |
| extern void clear_local_APIC(void); |
| extern void connect_bsp_APIC (void); |
| extern void disconnect_bsp_APIC (void); |
| extern void disable_local_APIC (void); |
| extern int verify_local_APIC (void); |
| extern void cache_APIC_registers (void); |
| extern void sync_Arb_IDs (void); |
| extern void init_bsp_APIC (void); |
| extern void setup_local_APIC (void); |
| extern void init_apic_mappings (void); |
| extern void smp_local_timer_interrupt (struct pt_regs * regs); |
| extern void setup_boot_APIC_clock (void); |
| extern void setup_secondary_APIC_clock (void); |
| extern void setup_apic_nmi_watchdog (void); |
| extern void disable_lapic_nmi_watchdog(void); |
| extern void enable_lapic_nmi_watchdog(void); |
| extern void disable_timer_nmi_watchdog(void); |
| extern void enable_timer_nmi_watchdog(void); |
| extern inline void nmi_watchdog_tick (struct pt_regs * regs); |
| extern int APIC_init_uniprocessor (void); |
| extern void disable_APIC_timer(void); |
| extern void enable_APIC_timer(void); |
| |
| extern int check_nmi_watchdog (void); |
| extern void enable_NMI_through_LVT0 (void * dummy); |
| |
| extern unsigned int nmi_watchdog; |
| #define NMI_NONE 0 |
| #define NMI_IO_APIC 1 |
| #define NMI_LOCAL_APIC 2 |
| #define NMI_INVALID 3 |
| |
| #endif /* CONFIG_X86_LOCAL_APIC */ |
| |
| #endif /* __ASM_APIC_H */ |
| #endif /* __ASM_MACH_APIC_H */ |