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Ignore whitespace Rev 651 → Rev 652

/shark/trunk/oslib/kl/advtimer.c
486,14 → 486,18
{
unsigned long long dtsc;
unsigned long temp;
struct timespec temp_time;
SYS_FLAGS f;
 
if (use_tsc) {
f = ll_fsave();
 
__asm__("cpuid"::"a" (0), "b" (0), "c" (0), "d" (0));
ll_read_timespec(&temp_time); // Set new start TimeSpec
TIMESPEC_ASSIGN(&init_time,&temp_time);
rdtscll(init_tsc); // Set new start TSC
ll_read_timespec(&init_time); // Set new start TimeSpec
__asm__("cpuid"::"a" (0), "b" (0), "c" (0), "d" (0));
mul32div32to32(clk_per_msec,new_f,old_f,temp);
clk_per_msec = temp;
dtsc = (unsigned long long)(clk_per_msec) * 500;
503,7 → 507,7
clk_opt_3 = (unsigned int)((unsigned long long)(dtsc << 32) / 1000000000L);
clk_opt_4 = (unsigned int)((unsigned long long)(dtsc << 31) / 1000000000L);
clk_opt_5 = (unsigned int)((unsigned long long)(dtsc << 30) / 1000000000L);
 
ll_frestore(f);
}
}
/shark/trunk/oslib/ll/i386/advtimer.h
66,77 → 66,98
//Low level time read function: Optimized for CPU < 1 GHz
extern __inline__ void ll_read_timespec_1000(struct timespec *tspec)
{
extern unsigned int clk_opt_1,clk_opt_2;
extern unsigned long long *ptr_init_tsc;
extern unsigned int clk_opt_1,clk_opt_2;
extern unsigned long long *ptr_init_tsc;
if (clk_opt_1 == 0) {
NULL_TIMESPEC(tspec);
return;
}
if (clk_opt_1 == 0) {
NULL_TIMESPEC(tspec);
return;
}
__asm__("rdtsc\n\t"
"subl (%%edi),%%eax\n\t"
"sbbl 4(%%edi),%%edx\n\t"
"divl %%ebx\n\t"
"movl %%eax,%%ebx\n\t"
"xorl %%eax,%%eax\n\t"
"divl %%ecx\n\t"
: "=a" (tspec->tv_nsec), "=b" (tspec->tv_sec)
: "D" (ptr_init_tsc) , "b" (clk_opt_1), "c" (clk_opt_2)
: "edx" );
 
__asm__("rdtsc\n\t"
"subl (%%edi),%%eax\n\t"
"sbbl 4(%%edi),%%edx\n\t"
"divl %%ebx\n\t"
"movl %%eax,%%ebx\n\t"
"xorl %%eax,%%eax\n\t"
"divl %%ecx\n\t"
: "=a" (tspec->tv_nsec), "=b" (tspec->tv_sec)
: "D" (ptr_init_tsc) , "b" (clk_opt_1), "c" (clk_opt_2)
: "edx" );
if (init_time.tv_sec != 0 || init_time.tv_nsec != 0) {
__asm__("divl %%ecx\n\t"
"addl %%ebx,%%eax\n\t"
:"=a" (tspec->tv_sec), "=d" (tspec->tv_nsec)
:"a" (init_time.tv_nsec+tspec->tv_nsec), "b" (tspec->tv_sec+init_time.tv_sec), "c" (1000000000), "d" (0));
};
}
 
//Low level time read function: Optimized for CPU < 2 GHz
extern __inline__ void ll_read_timespec_2000(struct timespec *tspec)
{
extern unsigned int clk_opt_1,clk_opt_3;
extern unsigned long long *ptr_init_tsc;
extern unsigned int clk_opt_1,clk_opt_3;
extern unsigned long long *ptr_init_tsc;
if (clk_opt_1 == 0) {
NULL_TIMESPEC(tspec);
return;
}
if (clk_opt_1 == 0) {
NULL_TIMESPEC(tspec);
return;
}
__asm__("rdtsc\n\t"
"subl (%%edi),%%eax\n\t"
"sbbl 4(%%edi),%%edx\n\t"
"divl %%ebx\n\t"
"movl %%eax,%%ebx\n\t"
"xorl %%eax,%%eax\n\t"
"shrdl $1,%%edx,%%eax\n\t"
"shrl %%edx\n\t"
"divl %%ecx\n\t"
: "=a" (tspec->tv_nsec), "=b" (tspec->tv_sec)
: "D" (ptr_init_tsc) , "b" (clk_opt_1), "c" (clk_opt_3)
: "edx" );
__asm__("rdtsc\n\t"
"subl (%%edi),%%eax\n\t"
"sbbl 4(%%edi),%%edx\n\t"
"divl %%ebx\n\t"
"movl %%eax,%%ebx\n\t"
"xorl %%eax,%%eax\n\t"
"shrdl $1,%%edx,%%eax\n\t"
"shrl %%edx\n\t"
"divl %%ecx\n\t"
: "=a" (tspec->tv_nsec), "=b" (tspec->tv_sec)
: "D" (ptr_init_tsc) , "b" (clk_opt_1), "c" (clk_opt_3)
: "edx" );
if (init_time.tv_sec != 0 || init_time.tv_nsec != 0) {
__asm__("divl %%ecx\n\t"
"addl %%ebx,%%eax\n\t"
:"=a" (tspec->tv_sec), "=d" (tspec->tv_nsec)
:"a" (init_time.tv_nsec+tspec->tv_nsec), "b" (tspec->tv_sec+init_time.tv_sec), "c" (1000000000), "d" (0));
};
}
 
//Low level time read function: Optimized for CPU < 4 GHz
extern __inline__ void ll_read_timespec_4000(struct timespec *tspec)
{
extern unsigned int clk_opt_1,clk_opt_4;
extern unsigned long long *ptr_init_tsc;
extern unsigned int clk_opt_1,clk_opt_4;
extern unsigned long long *ptr_init_tsc;
if (clk_opt_1 == 0) {
NULL_TIMESPEC(tspec);
return;
}
if (clk_opt_1 == 0) {
NULL_TIMESPEC(tspec);
return;
}
__asm__("rdtsc\n\t"
"subl (%%edi),%%eax\n\t"
"sbbl 4(%%edi),%%edx\n\t"
"divl %%ebx\n\t"
"movl %%eax,%%ebx\n\t"
"xorl %%eax,%%eax\n\t"
"shrdl $2,%%edx,%%eax\n\t"
"shrl $2,%%edx\n\t"
"divl %%ecx\n\t"
: "=a" (tspec->tv_nsec), "=b" (tspec->tv_sec)
: "D" (ptr_init_tsc) , "b" (clk_opt_1), "c" (clk_opt_4)
: "edx" );
__asm__("rdtsc\n\t"
"subl (%%edi),%%eax\n\t"
"sbbl 4(%%edi),%%edx\n\t"
"divl %%ebx\n\t"
"movl %%eax,%%ebx\n\t"
"xorl %%eax,%%eax\n\t"
"shrdl $2,%%edx,%%eax\n\t"
"shrl $2,%%edx\n\t"
"divl %%ecx\n\t"
: "=a" (tspec->tv_nsec), "=b" (tspec->tv_sec)
: "D" (ptr_init_tsc) , "b" (clk_opt_1), "c" (clk_opt_4)
: "edx" );
if (init_time.tv_sec != 0 || init_time.tv_nsec != 0) {
__asm__("divl %%ecx\n\t"
"addl %%ebx,%%eax\n\t"
:"=a" (tspec->tv_sec), "=d" (tspec->tv_nsec)
:"a" (init_time.tv_nsec+tspec->tv_nsec), "b" (tspec->tv_sec+init_time.tv_sec), "c" (1000000000), "d" (0));
};
}
 
//Low level time read function
170,7 → 191,7
__asm__("divl %%ecx\n\t"
"addl %%ebx,%%eax\n\t"
:"=a" (tspec->tv_sec), "=d" (tspec->tv_nsec)
:"a" (init_time.tv_nsec+tspec->tv_nsec), "b" (tspec->tv_sec+init_time.tv_sec), "c" (0x3B9ACA00), "d" (0));
:"a" (init_time.tv_nsec+tspec->tv_nsec), "b" (tspec->tv_sec+init_time.tv_sec), "c" (1000000000), "d" (0));
};
}