| 6,15 → 6,12 |
|---|
| */ |
| |
| /* processor's cpuid instruction support */ |
| #define CPUID_PROCESSOR_SIGNATURE 1 /* function 1 */ |
| #define CPUID_F1_FAM 0x00000f00 /* family mask */ |
| #define CPUID_F1_XFAM 0x0ff00000 /* extended family mask */ |
| #define CPUID_F1_MOD 0x000000f0 /* model mask */ |
| #define CPUID_F1_STEP 0x0000000f /* stepping level mask */ |
| #define CPUID_XFAM_MOD 0x0ff00ff0 /* xtended fam, fam + model */ |
| #define ATHLON64_XFAM_MOD 0x00000f40 /* xtended fam, fam + model */ |
| #define OPTERON_XFAM_MOD 0x00000f50 /* xtended fam, fam + model */ |
| #define ATHLON64_REV_C0 8 |
| #define CPUID_PROCESSOR_SIGNATURE 1 /* function 1 */ |
| #define CPUID_XFAM 0x0ff00000 /* extended family */ |
| #define CPUID_XFAM_K8 0 |
| #define CPUID_XMOD 0x000f0000 /* extended model */ |
| #define CPUID_XMOD_REV_E 0x00020000 |
| #define CPUID_USE_XFAM_XMOD 0x00000f00 |
| #define CPUID_GET_MAX_CAPABILITIES 0x80000000 |
| #define CPUID_FREQ_VOLT_CAPABILITIES 0x80000007 |
| #define P_STATE_TRANSITION_CAPABLE 6 |
| 111,12 → 108,6 |
|---|
| u8 vid; |
| }; |
| |
| #ifdef DEBUG |
| #define dprintk(msg...) printk(msg) |
| #else |
| #define dprintk(msg...) do { } while(0) |
| #endif |
| |
| static inline int core_voltage_pre_transition(u32 reqvid); |
| static inline int core_voltage_post_transition(u32 reqvid); |
| static inline int core_frequency_transition(u32 reqfid); |