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Ignore whitespace Rev 316 → Rev 317

/shark/trunk/oslib/kl/advtimer.c
69,8 → 69,6
unsigned int start_8253, end_8253, delta_8253;
 
cli();
outp(0x61, (inp(0x61) & ~0x02) | 0x01);
 
outp(0x43,0xB0); /* binary, mode 0, LSB/MSB, Ch 2 */
124,8 → 122,6
message("Calibrated Clk_per_msec = %10d\n",clk_per_msec);
 
sti();
}
 
#define CMOS_INIT 0
142,8 → 138,6
 
unsigned char set;
 
cli();
 
CMOS_READ(0x0C,set);
 
barrier();
163,8 → 157,6
cmos_calibrate_status = CMOS_BEGIN;
}
sti();
 
}
 
//TSC Calibration using RTC
173,8 → 165,6
 
unsigned long long dtsc;
 
cli();
irq_bind(8, calibrate_tsc_IRQ8, INT_FORCE);
 
CMOS_READ(0x0A,save_CMOS_regA);
184,12 → 174,14
CMOS_WRITE(0x0B,0x42); // Enable Interrupt
 
irq_unmask(8);
 
sti();
 
while (cmos_calibrate_status != CMOS_END) {
barrier();
}
cli();
 
dtsc = irq8_end - irq8_start;
 
197,15 → 189,11
 
message("Calibrated CPU Clk/msec = %10d\n",clk_per_msec);
 
cli();
 
irq_mask(8);
 
CMOS_WRITE(0x0A,save_CMOS_regA);
CMOS_WRITE(0x0B,save_CMOS_regB);
 
sti();
 
}
 
int apic_get_maxlvt(void)
361,8 → 349,6
unsigned long long tsc_start = 0, tsc_end = 0, dtsc;
unsigned int tmp_value;
 
cli();
 
tmp_value = SET_APIC_TIMER_BASE(APIC_TIMER_BASE_DIV) | LOCAL_TIMER_VECTOR;
apic_write_around(APIC_LVTT, tmp_value);
 
391,8 → 377,6
 
disable_APIC_timer();
 
sti();
 
dtsc = tsc_end - tsc_start;
dapic = apic_start - apic_end;
 
445,7 → 429,7
#ifdef __APIC__
unsigned int msr_low_orig, tmp;
 
cli();
cli();
 
disable_APIC_timer();