Subversion Repositories shark

Rev

Go to most recent revision | Blame | Compare with Previous | Last modification | View Log | RSS feed

/*
 * Project: S.Ha.R.K.
 *
 * Coordinators:
 *   Giorgio Buttazzo    <giorgio@sssup.it>
 *   Paolo Gai           <pj@gandalf.sssup.it>
 *
 * Authors     :
 *   Paolo Gai           <pj@gandalf.sssup.it>
 *   (see the web pages for full authors list)
 *
 * ReTiS Lab (Scuola Superiore S.Anna - Pisa - Italy)
 *
 * http://www.sssup.it
 * http://retis.sssup.it
 * http://shark.sssup.it
 */


/**
 ------------
 CVS :        $Id: testact.c,v 1.1.1.1 2002-09-02 09:37:41 pj Exp $

 File:        $File$
 Revision:    $Revision: 1.1.1.1 $
 Last update: $Date: 2002-09-02 09:37:41 $
 ------------
**/


/*
 * Copyright (C) 2001 Paolo Gai
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */


/* the demo tests EDFACT with my Celeron 366 Mhz.
Aster1 meet all wcets and all deadlines
Aster2 miss all wcets but hits all the deadlines
Aster3 blocks on a semaphore so it miss all the deadlines and it accumulates
       pending activations
Aster4 does 5 states:
       1: is a cycle, long enough to cope a little more than 2 periods
       2-5: like aster1, they meets all the wcet and deadlines
       the debug pattern is something like
       WDDEEeIeIeI
       W wcet violated
       D deadline miss event
       E endcycle with automatic reactivation due to pending activations
       e normal endcycle
       I normal reactivation event


*/



#include <kernel/kern.h>
#include <semaphore.h>
#include "edfact.h"

PID p1,p2,p3,p4;

sem_t sem;

#define ASTER_LIM       77

TASK aster1(void *arg)
{
    int i = 10;
    int y = 10+exec_shadow;

    printf_xy(1,y,WHITE,"%d", exec_shadow);
    while (i < ASTER_LIM) {
        puts_xy(i,y,WHITE,"*");
        task_endcycle();

        puts_xy(i,y,WHITE," ");
        i++;
    }

    return 0;
}

TASK aster2(void *arg)
{
    int i = 10;
    int y = 10+exec_shadow;
    int x;

    printf_xy(1,y,WHITE,"%d", exec_shadow);
    while (i < ASTER_LIM) {
        puts_xy(i,y,WHITE,"*");
        for(x=0; x<1000000; x++);
        task_endcycle();

        puts_xy(i,y,WHITE," ");
        i++;
    }

    return 0;
}

TASK aster3(void *arg)
{
    int i = 10;
    int y = 10+exec_shadow;

    printf_xy(1,y,WHITE,"%d", exec_shadow);
    while (i < ASTER_LIM) {
        puts_xy(i,y,WHITE,"*");
        sem_wait(&sem);
        task_endcycle();

        puts_xy(i,y,WHITE," ");
        i++;
    }

    return 0;
}

TASK aster4(void *arg)
{
    int i = 10;
    int y = 10+exec_shadow;
    int x;
    int flag = 0;

    printf_xy(1,y,WHITE,"%d", exec_shadow);
    while (i < ASTER_LIM) {
        puts_xy(i,y,WHITE,"*");

        switch (flag) {
        case 0:
          kern_printf("!");
          for(x=0; x<5000000; x++) flag=1;
          break;
        case 1:
          flag = 2;
          break;
        case 2:
          flag = 3;
          break;
        case 3:
          flag = 4;
          break;
        case 4:
          flag = 0;
          break;
        }

        task_endcycle();

        puts_xy(i,y,WHITE," ");
        i++;
    }

    return 0;
}



TASK clock()
{
    printf_xy(50,19,WHITE,"PID miss wcet nact");
    while(1) {
        printf_xy(50,20,WHITE,"%3d %4d %4d %4d",
                  p1, EDFACT_get_dline_miss(p1),
                      EDFACT_get_wcet_miss(p1),
                      EDFACT_get_nact(p1));
        printf_xy(50,21,WHITE,"%3d %4d %4d %4d",
                  p2, EDFACT_get_dline_miss(p2),
                      EDFACT_get_wcet_miss(p2),
                      EDFACT_get_nact(p2));
        printf_xy(50,22,WHITE,"%3d %4d %4d %4d",
                  p3, EDFACT_get_dline_miss(p3),
                      EDFACT_get_wcet_miss(p3),
                      EDFACT_get_nact(p3));
        printf_xy(50,23,WHITE,"%3d %4d %4d %4d",
                  p4, EDFACT_get_dline_miss(p4),
                      EDFACT_get_wcet_miss(p4),
                      EDFACT_get_nact(p4));
    }
}

int main(int argc, char **argv)
{
    NRT_TASK_MODEL n;

    HARD_TASK_MODEL m;

    kern_printf("\nCtrl-C = end demo\n");

    hard_task_default_model(m);
    hard_task_def_mit(m,200000);
    hard_task_def_group(m,1);

    sem_init(&sem,0,0);

    hard_task_def_wcet(m,2000);
    p1 = task_create("1",aster1,&m,NULL);
    if (p1 == -1) {
        perror("Aster.C(main): Could not create task <aster> ...");
        sys_end();
    }

    hard_task_def_wcet(m,2000);
    p2 = task_create("1",aster2,&m,NULL);
    if (p2 == -1) {
        perror("Aster.C(main): Could not create task <aster> ...");
        sys_end();
    }

    hard_task_def_wcet(m,2000);
    p3 = task_create("1",aster3,&m,NULL);
    if (p3 == -1) {
        perror("Aster.C(main): Could not create task <aster> ...");
        sys_end();
    }

    hard_task_def_mit(m,20000);
    hard_task_def_wcet(m,500);
    p4 = task_create("1",aster4,&m,NULL);
    if (p4 == -1) {
        perror("Aster.C(main): Could not create task <aster> ...");
        sys_end();
    }

    group_activate(1);

    nrt_task_default_model(n);
    task_activate(task_create("Clock",clock,&n,NULL));
    return 0;
}